| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * linux/kernel/irq/chip.c | 
 | 3 |  * | 
 | 4 |  * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | 
 | 5 |  * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | 
 | 6 |  * | 
 | 7 |  * This file contains the core interrupt handling code, for irq-chip | 
 | 8 |  * based architectures. | 
 | 9 |  * | 
 | 10 |  * Detailed information is available in Documentation/DocBook/genericirq | 
 | 11 |  */ | 
 | 12 |  | 
 | 13 | #include <linux/irq.h> | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 14 | #include <linux/msi.h> | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 15 | #include <linux/module.h> | 
 | 16 | #include <linux/interrupt.h> | 
 | 17 | #include <linux/kernel_stat.h> | 
 | 18 |  | 
 | 19 | #include "internals.h" | 
 | 20 |  | 
 | 21 | /** | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 22 |  *	dynamic_irq_init - initialize a dynamically allocated irq | 
 | 23 |  *	@irq:	irq number to initialize | 
 | 24 |  */ | 
 | 25 | void dynamic_irq_init(unsigned int irq) | 
 | 26 | { | 
 | 27 | 	struct irq_desc *desc; | 
 | 28 | 	unsigned long flags; | 
 | 29 |  | 
 | 30 | 	if (irq >= NR_IRQS) { | 
 | 31 | 		printk(KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); | 
 | 32 | 		WARN_ON(1); | 
 | 33 | 		return; | 
 | 34 | 	} | 
 | 35 |  | 
 | 36 | 	/* Ensure we don't have left over values from a previous use of this irq */ | 
 | 37 | 	desc = irq_desc + irq; | 
 | 38 | 	spin_lock_irqsave(&desc->lock, flags); | 
 | 39 | 	desc->status = IRQ_DISABLED; | 
 | 40 | 	desc->chip = &no_irq_chip; | 
 | 41 | 	desc->handle_irq = handle_bad_irq; | 
 | 42 | 	desc->depth = 1; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 43 | 	desc->msi_desc = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 44 | 	desc->handler_data = NULL; | 
 | 45 | 	desc->chip_data = NULL; | 
 | 46 | 	desc->action = NULL; | 
 | 47 | 	desc->irq_count = 0; | 
 | 48 | 	desc->irqs_unhandled = 0; | 
 | 49 | #ifdef CONFIG_SMP | 
 | 50 | 	desc->affinity = CPU_MASK_ALL; | 
 | 51 | #endif | 
 | 52 | 	spin_unlock_irqrestore(&desc->lock, flags); | 
 | 53 | } | 
 | 54 |  | 
 | 55 | /** | 
 | 56 |  *	dynamic_irq_cleanup - cleanup a dynamically allocated irq | 
 | 57 |  *	@irq:	irq number to initialize | 
 | 58 |  */ | 
 | 59 | void dynamic_irq_cleanup(unsigned int irq) | 
 | 60 | { | 
 | 61 | 	struct irq_desc *desc; | 
 | 62 | 	unsigned long flags; | 
 | 63 |  | 
 | 64 | 	if (irq >= NR_IRQS) { | 
 | 65 | 		printk(KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); | 
 | 66 | 		WARN_ON(1); | 
 | 67 | 		return; | 
 | 68 | 	} | 
 | 69 |  | 
 | 70 | 	desc = irq_desc + irq; | 
 | 71 | 	spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 72 | 	if (desc->action) { | 
 | 73 | 		spin_unlock_irqrestore(&desc->lock, flags); | 
 | 74 | 		printk(KERN_ERR "Destroying IRQ%d without calling free_irq\n", | 
 | 75 | 			irq); | 
 | 76 | 		WARN_ON(1); | 
 | 77 | 		return; | 
 | 78 | 	} | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 79 | 	desc->msi_desc = NULL; | 
 | 80 | 	desc->handler_data = NULL; | 
 | 81 | 	desc->chip_data = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 82 | 	desc->handle_irq = handle_bad_irq; | 
 | 83 | 	desc->chip = &no_irq_chip; | 
 | 84 | 	spin_unlock_irqrestore(&desc->lock, flags); | 
 | 85 | } | 
 | 86 |  | 
 | 87 |  | 
 | 88 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 89 |  *	set_irq_chip - set the irq chip for an irq | 
 | 90 |  *	@irq:	irq number | 
 | 91 |  *	@chip:	pointer to irq chip description structure | 
 | 92 |  */ | 
 | 93 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | 
 | 94 | { | 
 | 95 | 	struct irq_desc *desc; | 
 | 96 | 	unsigned long flags; | 
 | 97 |  | 
 | 98 | 	if (irq >= NR_IRQS) { | 
 | 99 | 		printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); | 
 | 100 | 		WARN_ON(1); | 
 | 101 | 		return -EINVAL; | 
 | 102 | 	} | 
 | 103 |  | 
 | 104 | 	if (!chip) | 
 | 105 | 		chip = &no_irq_chip; | 
 | 106 |  | 
 | 107 | 	desc = irq_desc + irq; | 
 | 108 | 	spin_lock_irqsave(&desc->lock, flags); | 
 | 109 | 	irq_chip_set_defaults(chip); | 
 | 110 | 	desc->chip = chip; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 111 | 	spin_unlock_irqrestore(&desc->lock, flags); | 
 | 112 |  | 
 | 113 | 	return 0; | 
 | 114 | } | 
 | 115 | EXPORT_SYMBOL(set_irq_chip); | 
 | 116 |  | 
 | 117 | /** | 
 | 118 |  *	set_irq_type - set the irq type for an irq | 
 | 119 |  *	@irq:	irq number | 
 | 120 |  *	@type:	interrupt type - see include/linux/interrupt.h | 
 | 121 |  */ | 
 | 122 | int set_irq_type(unsigned int irq, unsigned int type) | 
 | 123 | { | 
 | 124 | 	struct irq_desc *desc; | 
 | 125 | 	unsigned long flags; | 
 | 126 | 	int ret = -ENXIO; | 
 | 127 |  | 
 | 128 | 	if (irq >= NR_IRQS) { | 
 | 129 | 		printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); | 
 | 130 | 		return -ENODEV; | 
 | 131 | 	} | 
 | 132 |  | 
 | 133 | 	desc = irq_desc + irq; | 
 | 134 | 	if (desc->chip->set_type) { | 
 | 135 | 		spin_lock_irqsave(&desc->lock, flags); | 
 | 136 | 		ret = desc->chip->set_type(irq, type); | 
 | 137 | 		spin_unlock_irqrestore(&desc->lock, flags); | 
 | 138 | 	} | 
 | 139 | 	return ret; | 
 | 140 | } | 
 | 141 | EXPORT_SYMBOL(set_irq_type); | 
 | 142 |  | 
 | 143 | /** | 
 | 144 |  *	set_irq_data - set irq type data for an irq | 
 | 145 |  *	@irq:	Interrupt number | 
 | 146 |  *	@data:	Pointer to interrupt specific data | 
 | 147 |  * | 
 | 148 |  *	Set the hardware irq controller data for an irq | 
 | 149 |  */ | 
 | 150 | int set_irq_data(unsigned int irq, void *data) | 
 | 151 | { | 
 | 152 | 	struct irq_desc *desc; | 
 | 153 | 	unsigned long flags; | 
 | 154 |  | 
 | 155 | 	if (irq >= NR_IRQS) { | 
 | 156 | 		printk(KERN_ERR | 
 | 157 | 		       "Trying to install controller data for IRQ%d\n", irq); | 
 | 158 | 		return -EINVAL; | 
 | 159 | 	} | 
 | 160 |  | 
 | 161 | 	desc = irq_desc + irq; | 
 | 162 | 	spin_lock_irqsave(&desc->lock, flags); | 
 | 163 | 	desc->handler_data = data; | 
 | 164 | 	spin_unlock_irqrestore(&desc->lock, flags); | 
 | 165 | 	return 0; | 
 | 166 | } | 
 | 167 | EXPORT_SYMBOL(set_irq_data); | 
 | 168 |  | 
 | 169 | /** | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 170 |  *	set_irq_data - set irq type data for an irq | 
 | 171 |  *	@irq:	Interrupt number | 
| Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 172 |  *	@entry:	Pointer to MSI descriptor data | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 173 |  * | 
 | 174 |  *	Set the hardware irq controller data for an irq | 
 | 175 |  */ | 
 | 176 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | 
 | 177 | { | 
 | 178 | 	struct irq_desc *desc; | 
 | 179 | 	unsigned long flags; | 
 | 180 |  | 
 | 181 | 	if (irq >= NR_IRQS) { | 
 | 182 | 		printk(KERN_ERR | 
 | 183 | 		       "Trying to install msi data for IRQ%d\n", irq); | 
 | 184 | 		return -EINVAL; | 
 | 185 | 	} | 
 | 186 | 	desc = irq_desc + irq; | 
 | 187 | 	spin_lock_irqsave(&desc->lock, flags); | 
 | 188 | 	desc->msi_desc = entry; | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 189 | 	if (entry) | 
 | 190 | 		entry->irq = irq; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 191 | 	spin_unlock_irqrestore(&desc->lock, flags); | 
 | 192 | 	return 0; | 
 | 193 | } | 
 | 194 |  | 
 | 195 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 196 |  *	set_irq_chip_data - set irq chip data for an irq | 
 | 197 |  *	@irq:	Interrupt number | 
 | 198 |  *	@data:	Pointer to chip specific data | 
 | 199 |  * | 
 | 200 |  *	Set the hardware irq chip data for an irq | 
 | 201 |  */ | 
 | 202 | int set_irq_chip_data(unsigned int irq, void *data) | 
 | 203 | { | 
 | 204 | 	struct irq_desc *desc = irq_desc + irq; | 
 | 205 | 	unsigned long flags; | 
 | 206 |  | 
 | 207 | 	if (irq >= NR_IRQS || !desc->chip) { | 
 | 208 | 		printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); | 
 | 209 | 		return -EINVAL; | 
 | 210 | 	} | 
 | 211 |  | 
 | 212 | 	spin_lock_irqsave(&desc->lock, flags); | 
 | 213 | 	desc->chip_data = data; | 
 | 214 | 	spin_unlock_irqrestore(&desc->lock, flags); | 
 | 215 |  | 
 | 216 | 	return 0; | 
 | 217 | } | 
 | 218 | EXPORT_SYMBOL(set_irq_chip_data); | 
 | 219 |  | 
 | 220 | /* | 
 | 221 |  * default enable function | 
 | 222 |  */ | 
 | 223 | static void default_enable(unsigned int irq) | 
 | 224 | { | 
 | 225 | 	struct irq_desc *desc = irq_desc + irq; | 
 | 226 |  | 
 | 227 | 	desc->chip->unmask(irq); | 
 | 228 | 	desc->status &= ~IRQ_MASKED; | 
 | 229 | } | 
 | 230 |  | 
 | 231 | /* | 
 | 232 |  * default disable function | 
 | 233 |  */ | 
 | 234 | static void default_disable(unsigned int irq) | 
 | 235 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 236 | } | 
 | 237 |  | 
 | 238 | /* | 
 | 239 |  * default startup function | 
 | 240 |  */ | 
 | 241 | static unsigned int default_startup(unsigned int irq) | 
 | 242 | { | 
 | 243 | 	irq_desc[irq].chip->enable(irq); | 
 | 244 |  | 
 | 245 | 	return 0; | 
 | 246 | } | 
 | 247 |  | 
 | 248 | /* | 
 | 249 |  * Fixup enable/disable function pointers | 
 | 250 |  */ | 
 | 251 | void irq_chip_set_defaults(struct irq_chip *chip) | 
 | 252 | { | 
 | 253 | 	if (!chip->enable) | 
 | 254 | 		chip->enable = default_enable; | 
 | 255 | 	if (!chip->disable) | 
 | 256 | 		chip->disable = default_disable; | 
 | 257 | 	if (!chip->startup) | 
 | 258 | 		chip->startup = default_startup; | 
 | 259 | 	if (!chip->shutdown) | 
 | 260 | 		chip->shutdown = chip->disable; | 
 | 261 | 	if (!chip->name) | 
 | 262 | 		chip->name = chip->typename; | 
| Zhang, Yanmin | b86432b | 2006-11-16 01:19:10 -0800 | [diff] [blame] | 263 | 	if (!chip->end) | 
 | 264 | 		chip->end = dummy_irq_chip.end; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 265 | } | 
 | 266 |  | 
 | 267 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | 
 | 268 | { | 
 | 269 | 	if (desc->chip->mask_ack) | 
 | 270 | 		desc->chip->mask_ack(irq); | 
 | 271 | 	else { | 
 | 272 | 		desc->chip->mask(irq); | 
 | 273 | 		desc->chip->ack(irq); | 
 | 274 | 	} | 
 | 275 | } | 
 | 276 |  | 
 | 277 | /** | 
 | 278 |  *	handle_simple_irq - Simple and software-decoded IRQs. | 
 | 279 |  *	@irq:	the interrupt number | 
 | 280 |  *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 281 |  * | 
 | 282 |  *	Simple interrupts are either sent from a demultiplexing interrupt | 
 | 283 |  *	handler or come from hardware, where no interrupt hardware control | 
 | 284 |  *	is necessary. | 
 | 285 |  * | 
 | 286 |  *	Note: The caller is expected to handle the ack, clear, mask and | 
 | 287 |  *	unmask issues if necessary. | 
 | 288 |  */ | 
 | 289 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 290 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 291 | { | 
 | 292 | 	struct irqaction *action; | 
 | 293 | 	irqreturn_t action_ret; | 
 | 294 | 	const unsigned int cpu = smp_processor_id(); | 
 | 295 |  | 
 | 296 | 	spin_lock(&desc->lock); | 
 | 297 |  | 
 | 298 | 	if (unlikely(desc->status & IRQ_INPROGRESS)) | 
 | 299 | 		goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 300 | 	kstat_cpu(cpu).irqs[irq]++; | 
 | 301 |  | 
 | 302 | 	action = desc->action; | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 303 | 	if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
 | 304 | 		if (desc->chip->mask) | 
 | 305 | 			desc->chip->mask(irq); | 
 | 306 | 		desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
 | 307 | 		desc->status |= IRQ_PENDING; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 308 | 		goto out_unlock; | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 309 | 	} | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 310 |  | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 311 | 	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING | IRQ_PENDING); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 312 | 	desc->status |= IRQ_INPROGRESS; | 
 | 313 | 	spin_unlock(&desc->lock); | 
 | 314 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 315 | 	action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 316 | 	if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 317 | 		note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 318 |  | 
 | 319 | 	spin_lock(&desc->lock); | 
 | 320 | 	desc->status &= ~IRQ_INPROGRESS; | 
 | 321 | out_unlock: | 
 | 322 | 	spin_unlock(&desc->lock); | 
 | 323 | } | 
 | 324 |  | 
 | 325 | /** | 
 | 326 |  *	handle_level_irq - Level type irq handler | 
 | 327 |  *	@irq:	the interrupt number | 
 | 328 |  *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 329 |  * | 
 | 330 |  *	Level type interrupts are active as long as the hardware line has | 
 | 331 |  *	the active level. This may require to mask the interrupt and unmask | 
 | 332 |  *	it after the associated handler has acknowledged the device, so the | 
 | 333 |  *	interrupt line is back to inactive. | 
 | 334 |  */ | 
 | 335 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 336 | handle_level_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 337 | { | 
 | 338 | 	unsigned int cpu = smp_processor_id(); | 
 | 339 | 	struct irqaction *action; | 
 | 340 | 	irqreturn_t action_ret; | 
 | 341 |  | 
 | 342 | 	spin_lock(&desc->lock); | 
 | 343 | 	mask_ack_irq(desc, irq); | 
 | 344 |  | 
 | 345 | 	if (unlikely(desc->status & IRQ_INPROGRESS)) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 346 | 		goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 347 | 	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
 | 348 | 	kstat_cpu(cpu).irqs[irq]++; | 
 | 349 |  | 
 | 350 | 	/* | 
 | 351 | 	 * If its disabled or no action available | 
 | 352 | 	 * keep it masked and get out of here | 
 | 353 | 	 */ | 
 | 354 | 	action = desc->action; | 
| Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 355 | 	if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
 | 356 | 		desc->status |= IRQ_PENDING; | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 357 | 		goto out_unlock; | 
| Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 358 | 	} | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 359 |  | 
 | 360 | 	desc->status |= IRQ_INPROGRESS; | 
| Benjamin Herrenschmidt | 5a43a06 | 2006-07-03 19:54:59 +1000 | [diff] [blame] | 361 | 	desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 362 | 	spin_unlock(&desc->lock); | 
 | 363 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 364 | 	action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 365 | 	if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 366 | 		note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 367 |  | 
 | 368 | 	spin_lock(&desc->lock); | 
 | 369 | 	desc->status &= ~IRQ_INPROGRESS; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 370 | 	if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | 
 | 371 | 		desc->chip->unmask(irq); | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 372 | out_unlock: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 373 | 	spin_unlock(&desc->lock); | 
 | 374 | } | 
 | 375 |  | 
 | 376 | /** | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 377 |  *	handle_fasteoi_irq - irq handler for transparent controllers | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 378 |  *	@irq:	the interrupt number | 
 | 379 |  *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 380 |  * | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 381 |  *	Only a single callback will be issued to the chip: an ->eoi() | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 382 |  *	call when the interrupt has been serviced. This enables support | 
 | 383 |  *	for modern forms of interrupt handlers, which handle the flow | 
 | 384 |  *	details in hardware, transparently. | 
 | 385 |  */ | 
 | 386 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 387 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 388 | { | 
 | 389 | 	unsigned int cpu = smp_processor_id(); | 
 | 390 | 	struct irqaction *action; | 
 | 391 | 	irqreturn_t action_ret; | 
 | 392 |  | 
 | 393 | 	spin_lock(&desc->lock); | 
 | 394 |  | 
 | 395 | 	if (unlikely(desc->status & IRQ_INPROGRESS)) | 
 | 396 | 		goto out; | 
 | 397 |  | 
 | 398 | 	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
 | 399 | 	kstat_cpu(cpu).irqs[irq]++; | 
 | 400 |  | 
 | 401 | 	/* | 
 | 402 | 	 * If its disabled or no action available | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 403 | 	 * then mask it and get out of here: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 404 | 	 */ | 
 | 405 | 	action = desc->action; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 406 | 	if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
 | 407 | 		desc->status |= IRQ_PENDING; | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 408 | 		if (desc->chip->mask) | 
 | 409 | 			desc->chip->mask(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 410 | 		goto out; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 411 | 	} | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 412 |  | 
 | 413 | 	desc->status |= IRQ_INPROGRESS; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 414 | 	desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 415 | 	spin_unlock(&desc->lock); | 
 | 416 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 417 | 	action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 418 | 	if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 419 | 		note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 420 |  | 
 | 421 | 	spin_lock(&desc->lock); | 
 | 422 | 	desc->status &= ~IRQ_INPROGRESS; | 
 | 423 | out: | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 424 | 	desc->chip->eoi(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 425 |  | 
 | 426 | 	spin_unlock(&desc->lock); | 
 | 427 | } | 
 | 428 |  | 
 | 429 | /** | 
 | 430 |  *	handle_edge_irq - edge type IRQ handler | 
 | 431 |  *	@irq:	the interrupt number | 
 | 432 |  *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 433 |  * | 
 | 434 |  *	Interrupt occures on the falling and/or rising edge of a hardware | 
 | 435 |  *	signal. The occurence is latched into the irq controller hardware | 
 | 436 |  *	and must be acked in order to be reenabled. After the ack another | 
 | 437 |  *	interrupt can happen on the same source even before the first one | 
 | 438 |  *	is handled by the assosiacted event handler. If this happens it | 
 | 439 |  *	might be necessary to disable (mask) the interrupt depending on the | 
 | 440 |  *	controller hardware. This requires to reenable the interrupt inside | 
 | 441 |  *	of the loop which handles the interrupts which have arrived while | 
 | 442 |  *	the handler was running. If all pending interrupts are handled, the | 
 | 443 |  *	loop is left. | 
 | 444 |  */ | 
 | 445 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 446 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 447 | { | 
 | 448 | 	const unsigned int cpu = smp_processor_id(); | 
 | 449 |  | 
 | 450 | 	spin_lock(&desc->lock); | 
 | 451 |  | 
 | 452 | 	desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
 | 453 |  | 
 | 454 | 	/* | 
 | 455 | 	 * If we're currently running this IRQ, or its disabled, | 
 | 456 | 	 * we shouldn't process the IRQ. Mark it pending, handle | 
 | 457 | 	 * the necessary masking and go out | 
 | 458 | 	 */ | 
 | 459 | 	if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | 
 | 460 | 		    !desc->action)) { | 
 | 461 | 		desc->status |= (IRQ_PENDING | IRQ_MASKED); | 
 | 462 | 		mask_ack_irq(desc, irq); | 
 | 463 | 		goto out_unlock; | 
 | 464 | 	} | 
 | 465 |  | 
 | 466 | 	kstat_cpu(cpu).irqs[irq]++; | 
 | 467 |  | 
 | 468 | 	/* Start handling the irq */ | 
 | 469 | 	desc->chip->ack(irq); | 
 | 470 |  | 
 | 471 | 	/* Mark the IRQ currently in progress.*/ | 
 | 472 | 	desc->status |= IRQ_INPROGRESS; | 
 | 473 |  | 
 | 474 | 	do { | 
 | 475 | 		struct irqaction *action = desc->action; | 
 | 476 | 		irqreturn_t action_ret; | 
 | 477 |  | 
 | 478 | 		if (unlikely(!action)) { | 
 | 479 | 			desc->chip->mask(irq); | 
 | 480 | 			goto out_unlock; | 
 | 481 | 		} | 
 | 482 |  | 
 | 483 | 		/* | 
 | 484 | 		 * When another irq arrived while we were handling | 
 | 485 | 		 * one, we could have masked the irq. | 
 | 486 | 		 * Renable it, if it was not disabled in meantime. | 
 | 487 | 		 */ | 
 | 488 | 		if (unlikely((desc->status & | 
 | 489 | 			       (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | 
 | 490 | 			      (IRQ_PENDING | IRQ_MASKED))) { | 
 | 491 | 			desc->chip->unmask(irq); | 
 | 492 | 			desc->status &= ~IRQ_MASKED; | 
 | 493 | 		} | 
 | 494 |  | 
 | 495 | 		desc->status &= ~IRQ_PENDING; | 
 | 496 | 		spin_unlock(&desc->lock); | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 497 | 		action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 498 | 		if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 499 | 			note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 500 | 		spin_lock(&desc->lock); | 
 | 501 |  | 
 | 502 | 	} while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | 
 | 503 |  | 
 | 504 | 	desc->status &= ~IRQ_INPROGRESS; | 
 | 505 | out_unlock: | 
 | 506 | 	spin_unlock(&desc->lock); | 
 | 507 | } | 
 | 508 |  | 
 | 509 | #ifdef CONFIG_SMP | 
 | 510 | /** | 
 | 511 |  *	handle_percpu_IRQ - Per CPU local irq handler | 
 | 512 |  *	@irq:	the interrupt number | 
 | 513 |  *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 514 |  * | 
 | 515 |  *	Per CPU interrupts on SMP machines without locking requirements | 
 | 516 |  */ | 
 | 517 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 518 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 519 | { | 
 | 520 | 	irqreturn_t action_ret; | 
 | 521 |  | 
 | 522 | 	kstat_this_cpu.irqs[irq]++; | 
 | 523 |  | 
 | 524 | 	if (desc->chip->ack) | 
 | 525 | 		desc->chip->ack(irq); | 
 | 526 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 527 | 	action_ret = handle_IRQ_event(irq, desc->action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 528 | 	if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 529 | 		note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 530 |  | 
 | 531 | 	if (desc->chip->eoi) | 
 | 532 | 		desc->chip->eoi(irq); | 
 | 533 | } | 
 | 534 |  | 
 | 535 | #endif /* CONFIG_SMP */ | 
 | 536 |  | 
 | 537 | void | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 538 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, | 
 | 539 | 		  const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 540 | { | 
 | 541 | 	struct irq_desc *desc; | 
 | 542 | 	unsigned long flags; | 
 | 543 |  | 
 | 544 | 	if (irq >= NR_IRQS) { | 
 | 545 | 		printk(KERN_ERR | 
 | 546 | 		       "Trying to install type control for IRQ%d\n", irq); | 
 | 547 | 		return; | 
 | 548 | 	} | 
 | 549 |  | 
 | 550 | 	desc = irq_desc + irq; | 
 | 551 |  | 
 | 552 | 	if (!handle) | 
 | 553 | 		handle = handle_bad_irq; | 
| Thomas Gleixner | 9d7ac8b | 2006-12-22 01:08:14 -0800 | [diff] [blame] | 554 | 	else if (desc->chip == &no_irq_chip) { | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 555 | 		printk(KERN_WARNING "Trying to install %sinterrupt handler " | 
| Geert Uytterhoeven | b039db8 | 2006-12-20 15:59:48 +0100 | [diff] [blame] | 556 | 		       "for IRQ%d\n", is_chained ? "chained " : "", irq); | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 557 | 		/* | 
 | 558 | 		 * Some ARM implementations install a handler for really dumb | 
 | 559 | 		 * interrupt hardware without setting an irq_chip. This worked | 
 | 560 | 		 * with the ARM no_irq_chip but the check in setup_irq would | 
 | 561 | 		 * prevent us to setup the interrupt at all. Switch it to | 
 | 562 | 		 * dummy_irq_chip for easy transition. | 
 | 563 | 		 */ | 
 | 564 | 		desc->chip = &dummy_irq_chip; | 
 | 565 | 	} | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 566 |  | 
 | 567 | 	spin_lock_irqsave(&desc->lock, flags); | 
 | 568 |  | 
 | 569 | 	/* Uninstall? */ | 
 | 570 | 	if (handle == handle_bad_irq) { | 
| Jan Beulich | 5575ddf | 2007-02-16 01:28:26 -0800 | [diff] [blame] | 571 | 		if (desc->chip != &no_irq_chip) | 
 | 572 | 			mask_ack_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 573 | 		desc->status |= IRQ_DISABLED; | 
 | 574 | 		desc->depth = 1; | 
 | 575 | 	} | 
 | 576 | 	desc->handle_irq = handle; | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 577 | 	desc->name = name; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 578 |  | 
 | 579 | 	if (handle != handle_bad_irq && is_chained) { | 
 | 580 | 		desc->status &= ~IRQ_DISABLED; | 
 | 581 | 		desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | 
 | 582 | 		desc->depth = 0; | 
 | 583 | 		desc->chip->unmask(irq); | 
 | 584 | 	} | 
 | 585 | 	spin_unlock_irqrestore(&desc->lock, flags); | 
 | 586 | } | 
 | 587 |  | 
 | 588 | void | 
 | 589 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | 
| David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 590 | 			 irq_flow_handler_t handle) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 591 | { | 
 | 592 | 	set_irq_chip(irq, chip); | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 593 | 	__set_irq_handler(irq, handle, 0, NULL); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 594 | } | 
 | 595 |  | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 596 | void | 
 | 597 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | 
 | 598 | 			      irq_flow_handler_t handle, const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 599 | { | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 600 | 	set_irq_chip(irq, chip); | 
 | 601 | 	__set_irq_handler(irq, handle, 0, name); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 602 | } |