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Antti Palosaari7f882c22012-03-30 09:10:08 -03001/*
2 * Afatech AF9035 DVB USB driver
3 *
4 * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21
22#ifndef AF9035_H
23#define AF9035_H
24
Antti Palosaari5da2aec2012-06-17 23:15:03 -030025#include "dvb_usb.h"
Antti Palosaari2a79eef2012-05-07 14:50:40 -030026#include "af9033.h"
27#include "tua9001.h"
28#include "fc0011.h"
29#include "mxl5007t.h"
30#include "tda18218.h"
Antti Palosaari7f882c22012-03-30 09:10:08 -030031
32struct reg_val {
33 u32 reg;
34 u8 val;
35};
36
37struct reg_val_mask {
38 u32 reg;
39 u8 val;
40 u8 mask;
41};
42
43struct usb_req {
44 u8 cmd;
45 u8 mbox;
46 u8 wlen;
47 u8 *wbuf;
48 u8 rlen;
49 u8 *rbuf;
50};
51
Antti Palosaari2a79eef2012-05-07 14:50:40 -030052struct state {
Antti Palosaari5da2aec2012-06-17 23:15:03 -030053 u8 seq; /* packet sequence number */
Antti Palosaari7f882c22012-03-30 09:10:08 -030054 bool dual_mode;
Antti Palosaari2a79eef2012-05-07 14:50:40 -030055
56 struct af9033_config af9033_config[2];
Antti Palosaari7f882c22012-03-30 09:10:08 -030057};
58
Antti Palosaari7f882c22012-03-30 09:10:08 -030059u32 clock_lut[] = {
60 20480000, /* FPGA */
61 16384000, /* 16.38 MHz */
62 20480000, /* 20.48 MHz */
63 36000000, /* 36.00 MHz */
64 30000000, /* 30.00 MHz */
65 26000000, /* 26.00 MHz */
66 28000000, /* 28.00 MHz */
67 32000000, /* 32.00 MHz */
68 34000000, /* 34.00 MHz */
69 24000000, /* 24.00 MHz */
70 22000000, /* 22.00 MHz */
71 12000000, /* 12.00 MHz */
72};
73
Antti Palosaarif2b61d02012-04-05 20:28:51 -030074u32 clock_lut_it9135[] = {
75 12000000, /* 12.00 MHz */
76 20480000, /* 20.48 MHz */
77 36000000, /* 36.00 MHz */
78 30000000, /* 30.00 MHz */
79 26000000, /* 26.00 MHz */
80 28000000, /* 28.00 MHz */
81 32000000, /* 32.00 MHz */
82 34000000, /* 34.00 MHz */
83 24000000, /* 24.00 MHz */
84 22000000, /* 22.00 MHz */
85};
86
Antti Palosaari7f882c22012-03-30 09:10:08 -030087/* EEPROM locations */
88#define EEPROM_IR_MODE 0x430d
89#define EEPROM_DUAL_MODE 0x4326
90#define EEPROM_IR_TYPE 0x4329
91#define EEPROM_1_IFFREQ_L 0x432d
92#define EEPROM_1_IFFREQ_H 0x432e
93#define EEPROM_1_TUNER_ID 0x4331
94#define EEPROM_2_IFFREQ_L 0x433d
95#define EEPROM_2_IFFREQ_H 0x433e
96#define EEPROM_2_TUNER_ID 0x4341
97
98/* USB commands */
99#define CMD_MEM_RD 0x00
100#define CMD_MEM_WR 0x01
101#define CMD_I2C_RD 0x02
102#define CMD_I2C_WR 0x03
Hans-Frieder Vogt3234bd22012-04-21 18:23:16 -0300103#define CMD_IR_GET 0x18
Antti Palosaari7f882c22012-03-30 09:10:08 -0300104#define CMD_FW_DL 0x21
105#define CMD_FW_QUERYINFO 0x22
106#define CMD_FW_BOOT 0x23
107#define CMD_FW_DL_BEGIN 0x24
108#define CMD_FW_DL_END 0x25
Antti Palosaarif2b61d02012-04-05 20:28:51 -0300109#define CMD_FW_SCATTER_WR 0x29
Antti Palosaari7f882c22012-03-30 09:10:08 -0300110
111#endif