blob: a9783947c086c96ade3cfe6c869c1f5c0baea6f9 [file] [log] [blame]
Russell Kingf32f4ce2009-05-16 12:14:21 +01001/*
2 * linux/arch/arm/kernel/smp_twd.c
3 *
4 * Copyright (C) 2002 ARM Ltd.
5 * All Rights Reserved
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <linux/init.h>
12#include <linux/kernel.h>
Linus Walleij5def51b2011-12-13 12:47:31 +010013#include <linux/clk.h>
Russell Kingf32f4ce2009-05-16 12:14:21 +010014#include <linux/delay.h>
15#include <linux/device.h>
Linus Walleij5def51b2011-12-13 12:47:31 +010016#include <linux/err.h>
Russell Kingf32f4ce2009-05-16 12:14:21 +010017#include <linux/smp.h>
18#include <linux/jiffies.h>
19#include <linux/clockchips.h>
20#include <linux/irq.h>
21#include <linux/io.h>
22
23#include <asm/smp_twd.h>
Marc Zyngier28af6902011-07-22 12:52:37 +010024#include <asm/localtimer.h>
Russell Kingf32f4ce2009-05-16 12:14:21 +010025#include <asm/hardware/gic.h>
26
Russell Kingf32f4ce2009-05-16 12:14:21 +010027/* set up by the platform code */
28void __iomem *twd_base;
29
Linus Walleij5def51b2011-12-13 12:47:31 +010030static struct clk *twd_clk;
Russell Kingf32f4ce2009-05-16 12:14:21 +010031static unsigned long twd_timer_rate;
32
Marc Zyngier28af6902011-07-22 12:52:37 +010033static struct clock_event_device __percpu **twd_evt;
34
Russell Kingf32f4ce2009-05-16 12:14:21 +010035static void twd_set_mode(enum clock_event_mode mode,
36 struct clock_event_device *clk)
37{
38 unsigned long ctrl;
39
Russell King4c5158d2009-05-17 10:58:54 +010040 switch (mode) {
Russell Kingf32f4ce2009-05-16 12:14:21 +010041 case CLOCK_EVT_MODE_PERIODIC:
42 /* timer load already set up */
43 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
44 | TWD_TIMER_CONTROL_PERIODIC;
Russell King03399c12011-01-25 10:35:36 +000045 __raw_writel(twd_timer_rate / HZ, twd_base + TWD_TIMER_LOAD);
Russell Kingf32f4ce2009-05-16 12:14:21 +010046 break;
47 case CLOCK_EVT_MODE_ONESHOT:
48 /* period set, and timer enabled in 'next_event' hook */
49 ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
50 break;
51 case CLOCK_EVT_MODE_UNUSED:
52 case CLOCK_EVT_MODE_SHUTDOWN:
53 default:
54 ctrl = 0;
55 }
56
57 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
58}
59
60static int twd_set_next_event(unsigned long evt,
61 struct clock_event_device *unused)
62{
63 unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
64
Russell King4c5158d2009-05-17 10:58:54 +010065 ctrl |= TWD_TIMER_CONTROL_ENABLE;
66
Russell Kingf32f4ce2009-05-16 12:14:21 +010067 __raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
Russell King4c5158d2009-05-17 10:58:54 +010068 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
Russell Kingf32f4ce2009-05-16 12:14:21 +010069
70 return 0;
71}
72
73/*
74 * local_timer_ack: checks for a local timer interrupt.
75 *
76 * If a local timer interrupt has occurred, acknowledge and return 1.
77 * Otherwise, return 0.
78 */
79int twd_timer_ack(void)
80{
81 if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
82 __raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
83 return 1;
84 }
85
86 return 0;
87}
88
Marc Zyngier28af6902011-07-22 12:52:37 +010089void twd_timer_stop(struct clock_event_device *clk)
90{
91 twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
92 disable_percpu_irq(clk->irq);
93}
94
Russell Kingf32f4ce2009-05-16 12:14:21 +010095static void __cpuinit twd_calibrate_rate(void)
96{
Russell King03399c12011-01-25 10:35:36 +000097 unsigned long count;
Russell Kingf32f4ce2009-05-16 12:14:21 +010098 u64 waitjiffies;
99
100 /*
101 * If this is the first time round, we need to work out how fast
102 * the timer ticks
103 */
104 if (twd_timer_rate == 0) {
Russell King4c5158d2009-05-17 10:58:54 +0100105 printk(KERN_INFO "Calibrating local timer... ");
Russell Kingf32f4ce2009-05-16 12:14:21 +0100106
107 /* Wait for a tick to start */
108 waitjiffies = get_jiffies_64() + 1;
109
110 while (get_jiffies_64() < waitjiffies)
111 udelay(10);
112
113 /* OK, now the tick has started, let's get the timer going */
114 waitjiffies += 5;
115
116 /* enable, no interrupt or reload */
117 __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
118
119 /* maximum value */
120 __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
121
122 while (get_jiffies_64() < waitjiffies)
123 udelay(10);
124
125 count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
126
127 twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
128
129 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
Vitaly Kuzmichev90c5ffe2011-07-07 14:56:05 +0100130 (twd_timer_rate / 10000) % 100);
Russell Kingf32f4ce2009-05-16 12:14:21 +0100131 }
Russell Kingf32f4ce2009-05-16 12:14:21 +0100132}
133
Marc Zyngier28af6902011-07-22 12:52:37 +0100134static irqreturn_t twd_handler(int irq, void *dev_id)
135{
136 struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
137
138 if (twd_timer_ack()) {
139 evt->event_handler(evt);
140 return IRQ_HANDLED;
141 }
142
143 return IRQ_NONE;
144}
145
Linus Walleij5def51b2011-12-13 12:47:31 +0100146static struct clk *twd_get_clock(void)
147{
148 struct clk *clk;
149 int err;
150
151 clk = clk_get_sys("smp_twd", NULL);
152 if (IS_ERR(clk)) {
153 pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
154 return clk;
155 }
156
157 err = clk_prepare(clk);
158 if (err) {
159 pr_err("smp_twd: clock failed to prepare: %d\n", err);
160 clk_put(clk);
161 return ERR_PTR(err);
162 }
163
164 err = clk_enable(clk);
165 if (err) {
166 pr_err("smp_twd: clock failed to enable: %d\n", err);
167 clk_unprepare(clk);
168 clk_put(clk);
169 return ERR_PTR(err);
170 }
171
172 return clk;
173}
174
Russell Kingf32f4ce2009-05-16 12:14:21 +0100175/*
176 * Setup the local clock events for a CPU.
177 */
178void __cpuinit twd_timer_setup(struct clock_event_device *clk)
179{
Marc Zyngier28af6902011-07-22 12:52:37 +0100180 struct clock_event_device **this_cpu_clk;
181
182 if (!twd_evt) {
183 int err;
184
185 twd_evt = alloc_percpu(struct clock_event_device *);
186 if (!twd_evt) {
187 pr_err("twd: can't allocate memory\n");
188 return;
189 }
190
191 err = request_percpu_irq(clk->irq, twd_handler,
192 "twd", twd_evt);
193 if (err) {
194 pr_err("twd: can't register interrupt %d (%d)\n",
195 clk->irq, err);
196 return;
197 }
198 }
199
Linus Walleij5def51b2011-12-13 12:47:31 +0100200 if (!twd_clk)
201 twd_clk = twd_get_clock();
202
203 if (!IS_ERR_OR_NULL(twd_clk))
204 twd_timer_rate = clk_get_rate(twd_clk);
205 else
206 twd_calibrate_rate();
Russell Kingf32f4ce2009-05-16 12:14:21 +0100207
Russell King4c5158d2009-05-17 10:58:54 +0100208 clk->name = "local_timer";
Russell King5388a6b2010-07-26 13:19:43 +0100209 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
210 CLOCK_EVT_FEAT_C3STOP;
Russell King4c5158d2009-05-17 10:58:54 +0100211 clk->rating = 350;
212 clk->set_mode = twd_set_mode;
213 clk->set_next_event = twd_set_next_event;
Russell Kingf32f4ce2009-05-16 12:14:21 +0100214
Marc Zyngier28af6902011-07-22 12:52:37 +0100215 this_cpu_clk = __this_cpu_ptr(twd_evt);
216 *this_cpu_clk = clk;
217
Linus Walleij54d15b12011-12-13 12:46:43 +0100218 clockevents_config_and_register(clk, twd_timer_rate,
219 0xf, 0xffffffff);
Marc Zyngier28af6902011-07-22 12:52:37 +0100220 enable_percpu_irq(clk->irq, 0);
Russell Kingf32f4ce2009-05-16 12:14:21 +0100221}