Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1 | /* |
| 2 | * cx18 init/start/stop/exit stream functions |
| 3 | * |
| 4 | * Derived from ivtv-streams.c |
| 5 | * |
| 6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> |
Andy Walls | 6afdeaf | 2010-05-23 18:53:35 -0300 | [diff] [blame] | 7 | * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA |
| 22 | * 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #include "cx18-driver.h" |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 26 | #include "cx18-io.h" |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 27 | #include "cx18-fileops.h" |
| 28 | #include "cx18-mailbox.h" |
| 29 | #include "cx18-i2c.h" |
| 30 | #include "cx18-queue.h" |
| 31 | #include "cx18-ioctl.h" |
| 32 | #include "cx18-streams.h" |
| 33 | #include "cx18-cards.h" |
| 34 | #include "cx18-scb.h" |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 35 | #include "cx18-dvb.h" |
| 36 | |
| 37 | #define CX18_DSP0_INTERRUPT_MASK 0xd0004C |
| 38 | |
Hans Verkuil | bec4366 | 2008-12-30 06:58:20 -0300 | [diff] [blame] | 39 | static struct v4l2_file_operations cx18_v4l2_enc_fops = { |
Hans Verkuil | daf20d9 | 2008-05-12 11:21:58 -0300 | [diff] [blame] | 40 | .owner = THIS_MODULE, |
| 41 | .read = cx18_v4l2_read, |
| 42 | .open = cx18_v4l2_open, |
Andy Walls | 3b6fe58 | 2008-06-21 08:36:31 -0300 | [diff] [blame] | 43 | /* FIXME change to video_ioctl2 if serialization lock can be removed */ |
Hans Verkuil | 78b055b | 2010-11-19 17:04:31 -0300 | [diff] [blame] | 44 | .unlocked_ioctl = cx18_v4l2_ioctl, |
Hans Verkuil | daf20d9 | 2008-05-12 11:21:58 -0300 | [diff] [blame] | 45 | .release = cx18_v4l2_close, |
| 46 | .poll = cx18_v4l2_enc_poll, |
Steven Toth | b7101de | 2011-04-06 08:32:56 -0300 | [diff] [blame] | 47 | .mmap = cx18_v4l2_mmap, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 48 | }; |
| 49 | |
| 50 | /* offset from 0 to register ts v4l2 minors on */ |
| 51 | #define CX18_V4L2_ENC_TS_OFFSET 16 |
| 52 | /* offset from 0 to register pcm v4l2 minors on */ |
| 53 | #define CX18_V4L2_ENC_PCM_OFFSET 24 |
| 54 | /* offset from 0 to register yuv v4l2 minors on */ |
| 55 | #define CX18_V4L2_ENC_YUV_OFFSET 32 |
| 56 | |
| 57 | static struct { |
| 58 | const char *name; |
| 59 | int vfl_type; |
Hans Verkuil | dd89601 | 2008-10-04 08:36:54 -0300 | [diff] [blame] | 60 | int num_offset; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 61 | int dma; |
| 62 | enum v4l2_buf_type buf_type; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 63 | } cx18_stream_info[] = { |
| 64 | { /* CX18_ENC_STREAM_TYPE_MPG */ |
| 65 | "encoder MPEG", |
| 66 | VFL_TYPE_GRABBER, 0, |
| 67 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 68 | }, |
| 69 | { /* CX18_ENC_STREAM_TYPE_TS */ |
| 70 | "TS", |
| 71 | VFL_TYPE_GRABBER, -1, |
| 72 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 73 | }, |
| 74 | { /* CX18_ENC_STREAM_TYPE_YUV */ |
| 75 | "encoder YUV", |
| 76 | VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET, |
| 77 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 78 | }, |
| 79 | { /* CX18_ENC_STREAM_TYPE_VBI */ |
| 80 | "encoder VBI", |
| 81 | VFL_TYPE_VBI, 0, |
| 82 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 83 | }, |
| 84 | { /* CX18_ENC_STREAM_TYPE_PCM */ |
| 85 | "encoder PCM audio", |
| 86 | VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET, |
| 87 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 88 | }, |
| 89 | { /* CX18_ENC_STREAM_TYPE_IDX */ |
| 90 | "encoder IDX", |
| 91 | VFL_TYPE_GRABBER, -1, |
| 92 | PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 93 | }, |
| 94 | { /* CX18_ENC_STREAM_TYPE_RAD */ |
| 95 | "encoder radio", |
| 96 | VFL_TYPE_RADIO, 0, |
| 97 | PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE, |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 98 | }, |
| 99 | }; |
| 100 | |
Simon Farnsworth | 1bf5842 | 2011-05-03 08:57:40 -0300 | [diff] [blame] | 101 | |
| 102 | void cx18_dma_free(struct videobuf_queue *q, |
| 103 | struct cx18_stream *s, struct cx18_videobuf_buffer *buf) |
| 104 | { |
| 105 | videobuf_waiton(q, &buf->vb, 0, 0); |
| 106 | videobuf_vmalloc_free(&buf->vb); |
| 107 | buf->vb.state = VIDEOBUF_NEEDS_INIT; |
| 108 | } |
| 109 | |
| 110 | static int cx18_prepare_buffer(struct videobuf_queue *q, |
| 111 | struct cx18_stream *s, |
| 112 | struct cx18_videobuf_buffer *buf, |
| 113 | u32 pixelformat, |
| 114 | unsigned int width, unsigned int height, |
| 115 | enum v4l2_field field) |
| 116 | { |
| 117 | struct cx18 *cx = s->cx; |
| 118 | int rc = 0; |
| 119 | |
| 120 | /* check settings */ |
| 121 | buf->bytes_used = 0; |
| 122 | |
| 123 | if ((width < 48) || (height < 32)) |
| 124 | return -EINVAL; |
| 125 | |
| 126 | buf->vb.size = (width * height * 2); |
| 127 | if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size)) |
| 128 | return -EINVAL; |
| 129 | |
| 130 | /* alloc + fill struct (if changed) */ |
| 131 | if (buf->vb.width != width || buf->vb.height != height || |
| 132 | buf->vb.field != field || s->pixelformat != pixelformat || |
| 133 | buf->tvnorm != cx->std) { |
| 134 | |
| 135 | buf->vb.width = width; |
| 136 | buf->vb.height = height; |
| 137 | buf->vb.field = field; |
| 138 | buf->tvnorm = cx->std; |
| 139 | s->pixelformat = pixelformat; |
| 140 | |
| 141 | cx18_dma_free(q, s, buf); |
| 142 | } |
| 143 | |
| 144 | if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size)) |
| 145 | return -EINVAL; |
| 146 | |
| 147 | if (buf->vb.field == 0) |
| 148 | buf->vb.field = V4L2_FIELD_INTERLACED; |
| 149 | |
| 150 | if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { |
| 151 | buf->vb.width = width; |
| 152 | buf->vb.height = height; |
| 153 | buf->vb.field = field; |
| 154 | buf->tvnorm = cx->std; |
| 155 | s->pixelformat = pixelformat; |
| 156 | |
| 157 | rc = videobuf_iolock(q, &buf->vb, NULL); |
| 158 | if (rc != 0) |
| 159 | goto fail; |
| 160 | } |
| 161 | buf->vb.state = VIDEOBUF_PREPARED; |
| 162 | return 0; |
| 163 | |
| 164 | fail: |
| 165 | cx18_dma_free(q, s, buf); |
| 166 | return rc; |
| 167 | |
| 168 | } |
| 169 | |
| 170 | /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576) |
| 171 | 1440 is a single line of 4:2:2 YUV at 720 luma samples wide |
| 172 | */ |
| 173 | #define VB_MIN_BUFFERS 32 |
| 174 | #define VB_MIN_BUFSIZE 4147200 |
| 175 | |
| 176 | static int buffer_setup(struct videobuf_queue *q, |
| 177 | unsigned int *count, unsigned int *size) |
| 178 | { |
| 179 | struct cx18_stream *s = q->priv_data; |
| 180 | struct cx18 *cx = s->cx; |
| 181 | |
| 182 | *size = 2 * cx->cxhdl.width * cx->cxhdl.height; |
| 183 | if (*count == 0) |
| 184 | *count = VB_MIN_BUFFERS; |
| 185 | |
| 186 | while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE) |
| 187 | (*count)--; |
| 188 | |
| 189 | q->field = V4L2_FIELD_INTERLACED; |
| 190 | q->last = V4L2_FIELD_INTERLACED; |
| 191 | |
| 192 | return 0; |
| 193 | } |
| 194 | |
| 195 | static int buffer_prepare(struct videobuf_queue *q, |
| 196 | struct videobuf_buffer *vb, |
| 197 | enum v4l2_field field) |
| 198 | { |
| 199 | struct cx18_videobuf_buffer *buf = |
| 200 | container_of(vb, struct cx18_videobuf_buffer, vb); |
| 201 | struct cx18_stream *s = q->priv_data; |
| 202 | struct cx18 *cx = s->cx; |
| 203 | |
| 204 | return cx18_prepare_buffer(q, s, buf, s->pixelformat, |
| 205 | cx->cxhdl.width, cx->cxhdl.height, field); |
| 206 | } |
| 207 | |
| 208 | static void buffer_release(struct videobuf_queue *q, |
| 209 | struct videobuf_buffer *vb) |
| 210 | { |
| 211 | struct cx18_videobuf_buffer *buf = |
| 212 | container_of(vb, struct cx18_videobuf_buffer, vb); |
| 213 | struct cx18_stream *s = q->priv_data; |
| 214 | |
| 215 | cx18_dma_free(q, s, buf); |
| 216 | } |
| 217 | |
| 218 | static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) |
| 219 | { |
| 220 | struct cx18_videobuf_buffer *buf = |
| 221 | container_of(vb, struct cx18_videobuf_buffer, vb); |
| 222 | struct cx18_stream *s = q->priv_data; |
| 223 | |
| 224 | buf->vb.state = VIDEOBUF_QUEUED; |
| 225 | |
| 226 | list_add_tail(&buf->vb.queue, &s->vb_capture); |
| 227 | } |
| 228 | |
| 229 | static struct videobuf_queue_ops cx18_videobuf_qops = { |
| 230 | .buf_setup = buffer_setup, |
| 231 | .buf_prepare = buffer_prepare, |
| 232 | .buf_queue = buffer_queue, |
| 233 | .buf_release = buffer_release, |
| 234 | }; |
| 235 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 236 | static void cx18_stream_init(struct cx18 *cx, int type) |
| 237 | { |
| 238 | struct cx18_stream *s = &cx->streams[type]; |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 239 | struct video_device *video_dev = s->video_dev; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 240 | |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 241 | /* we need to keep video_dev, so restore it afterwards */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 242 | memset(s, 0, sizeof(*s)); |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 243 | s->video_dev = video_dev; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 244 | |
| 245 | /* initialize cx18_stream fields */ |
Andy Walls | 754f996 | 2010-12-11 20:38:20 -0300 | [diff] [blame] | 246 | s->dvb = NULL; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 247 | s->cx = cx; |
| 248 | s->type = type; |
| 249 | s->name = cx18_stream_info[type].name; |
Andy Walls | d3c5e70 | 2008-08-23 16:42:29 -0300 | [diff] [blame] | 250 | s->handle = CX18_INVALID_TASK_HANDLE; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 251 | |
| 252 | s->dma = cx18_stream_info[type].dma; |
Andy Walls | 6ecd86d | 2008-12-07 23:30:17 -0300 | [diff] [blame] | 253 | s->buffers = cx->stream_buffers[type]; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 254 | s->buf_size = cx->stream_buf_size[type]; |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 255 | INIT_LIST_HEAD(&s->buf_pool); |
| 256 | s->bufs_per_mdl = 1; |
| 257 | s->mdl_size = s->buf_size * s->bufs_per_mdl; |
Andy Walls | 6ecd86d | 2008-12-07 23:30:17 -0300 | [diff] [blame] | 258 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 259 | init_waitqueue_head(&s->waitq); |
| 260 | s->id = -1; |
Andy Walls | 40c5520 | 2009-04-13 23:08:00 -0300 | [diff] [blame] | 261 | spin_lock_init(&s->q_free.lock); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 262 | cx18_queue_init(&s->q_free); |
Andy Walls | 40c5520 | 2009-04-13 23:08:00 -0300 | [diff] [blame] | 263 | spin_lock_init(&s->q_busy.lock); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 264 | cx18_queue_init(&s->q_busy); |
Andy Walls | 40c5520 | 2009-04-13 23:08:00 -0300 | [diff] [blame] | 265 | spin_lock_init(&s->q_full.lock); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 266 | cx18_queue_init(&s->q_full); |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 267 | spin_lock_init(&s->q_idle.lock); |
| 268 | cx18_queue_init(&s->q_idle); |
Andy Walls | 21a278b | 2009-04-15 20:45:10 -0300 | [diff] [blame] | 269 | |
| 270 | INIT_WORK(&s->out_work_order, cx18_out_work_handler); |
Steven Toth | b7101de | 2011-04-06 08:32:56 -0300 | [diff] [blame] | 271 | |
| 272 | INIT_LIST_HEAD(&s->vb_capture); |
| 273 | s->vb_timeout.function = cx18_vb_timeout; |
| 274 | s->vb_timeout.data = (unsigned long)s; |
| 275 | init_timer(&s->vb_timeout); |
| 276 | spin_lock_init(&s->vb_lock); |
Simon Farnsworth | 1bf5842 | 2011-05-03 08:57:40 -0300 | [diff] [blame] | 277 | if (type == CX18_ENC_STREAM_TYPE_YUV) { |
Simon Farnsworth | 612031c | 2011-05-10 10:49:50 -0300 | [diff] [blame^] | 278 | spin_lock_init(&s->vbuf_q_lock); |
| 279 | |
Simon Farnsworth | 1bf5842 | 2011-05-03 08:57:40 -0300 | [diff] [blame] | 280 | s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE; |
| 281 | videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops, |
| 282 | &cx->pci_dev->dev, &s->vbuf_q_lock, |
| 283 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
| 284 | V4L2_FIELD_INTERLACED, |
| 285 | sizeof(struct cx18_videobuf_buffer), |
| 286 | s, &cx->serialize_lock); |
Steven Toth | b7101de | 2011-04-06 08:32:56 -0300 | [diff] [blame] | 287 | |
Simon Farnsworth | 1bf5842 | 2011-05-03 08:57:40 -0300 | [diff] [blame] | 288 | /* Assume the previous pixel default */ |
| 289 | s->pixelformat = V4L2_PIX_FMT_HM12; |
| 290 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 291 | } |
| 292 | |
| 293 | static int cx18_prep_dev(struct cx18 *cx, int type) |
| 294 | { |
| 295 | struct cx18_stream *s = &cx->streams[type]; |
| 296 | u32 cap = cx->v4l2_cap; |
Hans Verkuil | dd89601 | 2008-10-04 08:36:54 -0300 | [diff] [blame] | 297 | int num_offset = cx18_stream_info[type].num_offset; |
Andy Walls | 5811cf9 | 2009-02-14 17:08:37 -0300 | [diff] [blame] | 298 | int num = cx->instance + cx18_first_minor + num_offset; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 299 | |
Andy Walls | 754f996 | 2010-12-11 20:38:20 -0300 | [diff] [blame] | 300 | /* |
| 301 | * These five fields are always initialized. |
| 302 | * For analog capture related streams, if video_dev == NULL then the |
| 303 | * stream is not in use. |
| 304 | * For the TS stream, if dvb == NULL then the stream is not in use. |
| 305 | * In those cases no other fields but these four can be used. |
| 306 | */ |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 307 | s->video_dev = NULL; |
Andy Walls | 754f996 | 2010-12-11 20:38:20 -0300 | [diff] [blame] | 308 | s->dvb = NULL; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 309 | s->cx = cx; |
| 310 | s->type = type; |
| 311 | s->name = cx18_stream_info[type].name; |
| 312 | |
| 313 | /* Check whether the radio is supported */ |
| 314 | if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO)) |
| 315 | return 0; |
| 316 | |
| 317 | /* Check whether VBI is supported */ |
| 318 | if (type == CX18_ENC_STREAM_TYPE_VBI && |
| 319 | !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE))) |
| 320 | return 0; |
| 321 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 322 | /* User explicitly selected 0 buffers for these streams, so don't |
| 323 | create them. */ |
| 324 | if (cx18_stream_info[type].dma != PCI_DMA_NONE && |
Andy Walls | 6ecd86d | 2008-12-07 23:30:17 -0300 | [diff] [blame] | 325 | cx->stream_buffers[type] == 0) { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 326 | CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name); |
| 327 | return 0; |
| 328 | } |
| 329 | |
| 330 | cx18_stream_init(cx, type); |
| 331 | |
Andy Walls | 754f996 | 2010-12-11 20:38:20 -0300 | [diff] [blame] | 332 | /* Allocate the cx18_dvb struct only for the TS on cards with DTV */ |
| 333 | if (type == CX18_ENC_STREAM_TYPE_TS) { |
| 334 | if (cx->card->hw_all & CX18_HW_DVB) { |
| 335 | s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL); |
| 336 | if (s->dvb == NULL) { |
| 337 | CX18_ERR("Couldn't allocate cx18_dvb structure" |
| 338 | " for %s\n", s->name); |
| 339 | return -ENOMEM; |
| 340 | } |
| 341 | } else { |
| 342 | /* Don't need buffers for the TS, if there is no DVB */ |
| 343 | s->buffers = 0; |
| 344 | } |
| 345 | } |
| 346 | |
Hans Verkuil | dd89601 | 2008-10-04 08:36:54 -0300 | [diff] [blame] | 347 | if (num_offset == -1) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 348 | return 0; |
| 349 | |
| 350 | /* allocate and initialize the v4l2 video device structure */ |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 351 | s->video_dev = video_device_alloc(); |
| 352 | if (s->video_dev == NULL) { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 353 | CX18_ERR("Couldn't allocate v4l2 video_device for %s\n", |
| 354 | s->name); |
| 355 | return -ENOMEM; |
| 356 | } |
| 357 | |
Andy Walls | 5811cf9 | 2009-02-14 17:08:37 -0300 | [diff] [blame] | 358 | snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s", |
| 359 | cx->v4l2_dev.name, s->name); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 360 | |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 361 | s->video_dev->num = num; |
Andy Walls | 5811cf9 | 2009-02-14 17:08:37 -0300 | [diff] [blame] | 362 | s->video_dev->v4l2_dev = &cx->v4l2_dev; |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 363 | s->video_dev->fops = &cx18_v4l2_enc_fops; |
| 364 | s->video_dev->release = video_device_release; |
| 365 | s->video_dev->tvnorms = V4L2_STD_ALL; |
Hans Verkuil | b1a873a | 2011-03-22 10:14:07 -0300 | [diff] [blame] | 366 | set_bit(V4L2_FL_USE_FH_PRIO, &s->video_dev->flags); |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 367 | cx18_set_funcs(s->video_dev); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 368 | return 0; |
| 369 | } |
| 370 | |
| 371 | /* Initialize v4l2 variables and register v4l2 devices */ |
| 372 | int cx18_streams_setup(struct cx18 *cx) |
| 373 | { |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 374 | int type, ret; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 375 | |
| 376 | /* Setup V4L2 Devices */ |
| 377 | for (type = 0; type < CX18_MAX_STREAMS; type++) { |
| 378 | /* Prepare device */ |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 379 | ret = cx18_prep_dev(cx, type); |
| 380 | if (ret < 0) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 381 | break; |
| 382 | |
| 383 | /* Allocate Stream */ |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 384 | ret = cx18_stream_alloc(&cx->streams[type]); |
| 385 | if (ret < 0) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 386 | break; |
| 387 | } |
| 388 | if (type == CX18_MAX_STREAMS) |
| 389 | return 0; |
| 390 | |
| 391 | /* One or more streams could not be initialized. Clean 'em all up. */ |
Hans Verkuil | 3f98387 | 2008-05-01 10:31:12 -0300 | [diff] [blame] | 392 | cx18_streams_cleanup(cx, 0); |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 393 | return ret; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 394 | } |
| 395 | |
| 396 | static int cx18_reg_dev(struct cx18 *cx, int type) |
| 397 | { |
| 398 | struct cx18_stream *s = &cx->streams[type]; |
| 399 | int vfl_type = cx18_stream_info[type].vfl_type; |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 400 | const char *name; |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 401 | int num, ret; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 402 | |
Andy Walls | 754f996 | 2010-12-11 20:38:20 -0300 | [diff] [blame] | 403 | if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) { |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 404 | ret = cx18_dvb_register(s); |
| 405 | if (ret < 0) { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 406 | CX18_ERR("DVB failed to register\n"); |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 407 | return ret; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 408 | } |
| 409 | } |
| 410 | |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 411 | if (s->video_dev == NULL) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 412 | return 0; |
| 413 | |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 414 | num = s->video_dev->num; |
Hans Verkuil | dd89601 | 2008-10-04 08:36:54 -0300 | [diff] [blame] | 415 | /* card number + user defined offset + device offset */ |
| 416 | if (type != CX18_ENC_STREAM_TYPE_MPG) { |
| 417 | struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; |
| 418 | |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 419 | if (s_mpg->video_dev) |
| 420 | num = s_mpg->video_dev->num |
| 421 | + cx18_stream_info[type].num_offset; |
Hans Verkuil | dd89601 | 2008-10-04 08:36:54 -0300 | [diff] [blame] | 422 | } |
Andy Walls | 5811cf9 | 2009-02-14 17:08:37 -0300 | [diff] [blame] | 423 | video_set_drvdata(s->video_dev, s); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 424 | |
| 425 | /* Register device. First try the desired minor, then any free one. */ |
Hans Verkuil | 6b5270d | 2009-09-06 07:54:00 -0300 | [diff] [blame] | 426 | ret = video_register_device_no_warn(s->video_dev, vfl_type, num); |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 427 | if (ret < 0) { |
Hans Verkuil | 581644d | 2009-06-19 11:54:00 -0300 | [diff] [blame] | 428 | CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n", |
Hans Verkuil | dd89601 | 2008-10-04 08:36:54 -0300 | [diff] [blame] | 429 | s->name, num); |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 430 | video_device_release(s->video_dev); |
| 431 | s->video_dev = NULL; |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 432 | return ret; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 433 | } |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 434 | |
| 435 | name = video_device_node_name(s->video_dev); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 436 | |
| 437 | switch (vfl_type) { |
| 438 | case VFL_TYPE_GRABBER: |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 439 | CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n", |
| 440 | name, s->name, cx->stream_buffers[type], |
Andy Walls | 22dce18 | 2009-11-09 23:55:30 -0300 | [diff] [blame] | 441 | cx->stream_buf_size[type] / 1024, |
| 442 | (cx->stream_buf_size[type] * 100 / 1024) % 100); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 443 | break; |
| 444 | |
| 445 | case VFL_TYPE_RADIO: |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 446 | CX18_INFO("Registered device %s for %s\n", name, s->name); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 447 | break; |
| 448 | |
| 449 | case VFL_TYPE_VBI: |
Andy Walls | 6ecd86d | 2008-12-07 23:30:17 -0300 | [diff] [blame] | 450 | if (cx->stream_buffers[type]) |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 451 | CX18_INFO("Registered device %s for %s " |
Andy Walls | 6ecd86d | 2008-12-07 23:30:17 -0300 | [diff] [blame] | 452 | "(%d x %d bytes)\n", |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 453 | name, s->name, cx->stream_buffers[type], |
Andy Walls | 6ecd86d | 2008-12-07 23:30:17 -0300 | [diff] [blame] | 454 | cx->stream_buf_size[type]); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 455 | else |
Laurent Pinchart | 38c7c03 | 2009-11-27 13:57:15 -0300 | [diff] [blame] | 456 | CX18_INFO("Registered device %s for %s\n", |
| 457 | name, s->name); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 458 | break; |
| 459 | } |
| 460 | |
| 461 | return 0; |
| 462 | } |
| 463 | |
| 464 | /* Register v4l2 devices */ |
| 465 | int cx18_streams_register(struct cx18 *cx) |
| 466 | { |
| 467 | int type; |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 468 | int err; |
| 469 | int ret = 0; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 470 | |
| 471 | /* Register V4L2 devices */ |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 472 | for (type = 0; type < CX18_MAX_STREAMS; type++) { |
| 473 | err = cx18_reg_dev(cx, type); |
| 474 | if (err && ret == 0) |
| 475 | ret = err; |
| 476 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 477 | |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 478 | if (ret == 0) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 479 | return 0; |
| 480 | |
| 481 | /* One or more streams could not be initialized. Clean 'em all up. */ |
Hans Verkuil | 3f98387 | 2008-05-01 10:31:12 -0300 | [diff] [blame] | 482 | cx18_streams_cleanup(cx, 1); |
Andy Walls | 9b4a7c8 | 2008-10-18 10:20:25 -0300 | [diff] [blame] | 483 | return ret; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 484 | } |
| 485 | |
| 486 | /* Unregister v4l2 devices */ |
Hans Verkuil | 3f98387 | 2008-05-01 10:31:12 -0300 | [diff] [blame] | 487 | void cx18_streams_cleanup(struct cx18 *cx, int unregister) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 488 | { |
| 489 | struct video_device *vdev; |
| 490 | int type; |
| 491 | |
| 492 | /* Teardown all streams */ |
| 493 | for (type = 0; type < CX18_MAX_STREAMS; type++) { |
Andy Walls | 7b1dde0 | 2009-12-31 01:35:08 -0300 | [diff] [blame] | 494 | |
Andy Walls | 754f996 | 2010-12-11 20:38:20 -0300 | [diff] [blame] | 495 | /* The TS has a cx18_dvb structure, not a video_device */ |
Andy Walls | 7b1dde0 | 2009-12-31 01:35:08 -0300 | [diff] [blame] | 496 | if (type == CX18_ENC_STREAM_TYPE_TS) { |
Andy Walls | 754f996 | 2010-12-11 20:38:20 -0300 | [diff] [blame] | 497 | if (cx->streams[type].dvb != NULL) { |
| 498 | if (unregister) |
| 499 | cx18_dvb_unregister(&cx->streams[type]); |
| 500 | kfree(cx->streams[type].dvb); |
| 501 | cx->streams[type].dvb = NULL; |
Andy Walls | 7b1dde0 | 2009-12-31 01:35:08 -0300 | [diff] [blame] | 502 | cx18_stream_free(&cx->streams[type]); |
| 503 | } |
| 504 | continue; |
Hans Verkuil | fac3639 | 2008-07-18 10:07:10 -0300 | [diff] [blame] | 505 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 506 | |
Andy Walls | 7b1dde0 | 2009-12-31 01:35:08 -0300 | [diff] [blame] | 507 | /* No struct video_device, but can have buffers allocated */ |
| 508 | if (type == CX18_ENC_STREAM_TYPE_IDX) { |
Andy Walls | 0f890ab | 2011-03-27 20:19:15 -0300 | [diff] [blame] | 509 | /* If the module params didn't inhibit IDX ... */ |
Andy Walls | 7b1dde0 | 2009-12-31 01:35:08 -0300 | [diff] [blame] | 510 | if (cx->stream_buffers[type] != 0) { |
| 511 | cx->stream_buffers[type] = 0; |
Andy Walls | 0f890ab | 2011-03-27 20:19:15 -0300 | [diff] [blame] | 512 | /* |
| 513 | * Before calling cx18_stream_free(), |
| 514 | * check if the IDX stream was actually set up. |
| 515 | * Needed, since the cx18_probe() error path |
| 516 | * exits through here as well as normal clean up |
| 517 | */ |
| 518 | if (cx->streams[type].buffers != 0) |
| 519 | cx18_stream_free(&cx->streams[type]); |
Andy Walls | 7b1dde0 | 2009-12-31 01:35:08 -0300 | [diff] [blame] | 520 | } |
| 521 | continue; |
| 522 | } |
| 523 | |
| 524 | /* If struct video_device exists, can have buffers allocated */ |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 525 | vdev = cx->streams[type].video_dev; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 526 | |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 527 | cx->streams[type].video_dev = NULL; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 528 | if (vdev == NULL) |
| 529 | continue; |
| 530 | |
Simon Farnsworth | 1bf5842 | 2011-05-03 08:57:40 -0300 | [diff] [blame] | 531 | if (type == CX18_ENC_STREAM_TYPE_YUV) |
| 532 | videobuf_mmap_free(&cx->streams[type].vbuf_q); |
| 533 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 534 | cx18_stream_free(&cx->streams[type]); |
| 535 | |
Hans Verkuil | 3f98387 | 2008-05-01 10:31:12 -0300 | [diff] [blame] | 536 | /* Unregister or release device */ |
| 537 | if (unregister) |
| 538 | video_unregister_device(vdev); |
| 539 | else |
| 540 | video_device_release(vdev); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 541 | } |
| 542 | } |
| 543 | |
| 544 | static void cx18_vbi_setup(struct cx18_stream *s) |
| 545 | { |
| 546 | struct cx18 *cx = s->cx; |
Andy Walls | dd07343 | 2008-12-12 16:24:04 -0300 | [diff] [blame] | 547 | int raw = cx18_raw_vbi(cx); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 548 | u32 data[CX2341X_MBOX_MAX_DATA]; |
| 549 | int lines; |
| 550 | |
| 551 | if (cx->is_60hz) { |
| 552 | cx->vbi.count = 12; |
| 553 | cx->vbi.start[0] = 10; |
| 554 | cx->vbi.start[1] = 273; |
| 555 | } else { /* PAL/SECAM */ |
| 556 | cx->vbi.count = 18; |
| 557 | cx->vbi.start[0] = 6; |
| 558 | cx->vbi.start[1] = 318; |
| 559 | } |
| 560 | |
| 561 | /* setup VBI registers */ |
Hans Verkuil | add632c | 2010-03-14 12:24:15 -0300 | [diff] [blame] | 562 | if (raw) |
| 563 | v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi); |
| 564 | else |
| 565 | v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 566 | |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 567 | /* |
| 568 | * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw |
| 569 | * VBI when the first analog capture channel starts, as once it starts |
| 570 | * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup |
| 571 | * (i.e. for the VBI capture channels). We also send it for each |
| 572 | * analog capture channel anyway just to make sure we get the proper |
| 573 | * behavior |
| 574 | */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 575 | if (raw) { |
| 576 | lines = cx->vbi.count * 2; |
| 577 | } else { |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 578 | /* |
| 579 | * For 525/60 systems, according to the VIP 2 & BT.656 std: |
| 580 | * The EAV RP code's Field bit toggles on line 4, a few lines |
| 581 | * after the Vertcal Blank bit has already toggled. |
| 582 | * Tell the encoder to capture 21-4+1=18 lines per field, |
| 583 | * since we want lines 10 through 21. |
| 584 | * |
Andy Walls | 5ab7405 | 2009-05-10 22:14:29 -0300 | [diff] [blame] | 585 | * For 625/50 systems, according to the VIP 2 & BT.656 std: |
| 586 | * The EAV RP code's Field bit toggles on line 1, a few lines |
| 587 | * after the Vertcal Blank bit has already toggled. |
Andy Walls | 929a3ad | 2009-05-16 21:06:57 -0300 | [diff] [blame] | 588 | * (We've actually set the digitizer so that the Field bit |
| 589 | * toggles on line 2.) Tell the encoder to capture 23-2+1=22 |
| 590 | * lines per field, since we want lines 6 through 23. |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 591 | */ |
Andy Walls | 929a3ad | 2009-05-16 21:06:57 -0300 | [diff] [blame] | 592 | lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 593 | } |
| 594 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 595 | data[0] = s->handle; |
| 596 | /* Lines per field */ |
| 597 | data[1] = (lines / 2) | ((lines / 2) << 16); |
| 598 | /* bytes per line */ |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 599 | data[2] = (raw ? vbi_active_samples |
| 600 | : (cx->is_60hz ? vbi_hblank_samples_60Hz |
| 601 | : vbi_hblank_samples_50Hz)); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 602 | /* Every X number of frames a VBI interrupt arrives |
| 603 | (frames as in 25 or 30 fps) */ |
| 604 | data[3] = 1; |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 605 | /* |
| 606 | * Set the SAV/EAV RP codes to look for as start/stop points |
| 607 | * when in VIP-1.1 mode |
| 608 | */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 609 | if (raw) { |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 610 | /* |
| 611 | * Start codes for beginning of "active" line in vertical blank |
| 612 | * 0x20 ( VerticalBlank ) |
| 613 | * 0x60 ( EvenField VerticalBlank ) |
| 614 | */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 615 | data[4] = 0x20602060; |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 616 | /* |
| 617 | * End codes for end of "active" raw lines and regular lines |
| 618 | * 0x30 ( VerticalBlank HorizontalBlank) |
| 619 | * 0x70 ( EvenField VerticalBlank HorizontalBlank) |
| 620 | * 0x90 (Task HorizontalBlank) |
| 621 | * 0xd0 (Task EvenField HorizontalBlank) |
| 622 | */ |
Andy Walls | af009cf | 2008-12-12 20:00:29 -0300 | [diff] [blame] | 623 | data[5] = 0x307090d0; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 624 | } else { |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 625 | /* |
| 626 | * End codes for active video, we want data in the hblank region |
| 627 | * 0xb0 (Task 0 VerticalBlank HorizontalBlank) |
| 628 | * 0xf0 (Task EvenField VerticalBlank HorizontalBlank) |
| 629 | * |
| 630 | * Since the V bit is only allowed to toggle in the EAV RP code, |
| 631 | * just before the first active region line, these two |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 632 | * are problematic: |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 633 | * 0x90 (Task HorizontalBlank) |
| 634 | * 0xd0 (Task EvenField HorizontalBlank) |
Andy Walls | 812b1f9 | 2009-02-08 22:40:04 -0300 | [diff] [blame] | 635 | * |
Andy Walls | af7c58b | 2009-02-28 20:13:50 -0300 | [diff] [blame] | 636 | * We have set the digitzer such that we don't have to worry |
| 637 | * about these problem codes. |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 638 | */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 639 | data[4] = 0xB0F0B0F0; |
Andy Walls | 302df97 | 2009-01-31 00:33:02 -0300 | [diff] [blame] | 640 | /* |
| 641 | * Start codes for beginning of active line in vertical blank |
| 642 | * 0xa0 (Task VerticalBlank ) |
| 643 | * 0xe0 (Task EvenField VerticalBlank ) |
| 644 | */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 645 | data[5] = 0xA0E0A0E0; |
| 646 | } |
| 647 | |
| 648 | CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n", |
| 649 | data[0], data[1], data[2], data[3], data[4], data[5]); |
| 650 | |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 651 | cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 652 | } |
| 653 | |
Andy Walls | ef99179 | 2009-12-31 18:27:13 -0300 | [diff] [blame] | 654 | void cx18_stream_rotate_idx_mdls(struct cx18 *cx) |
| 655 | { |
| 656 | struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; |
| 657 | struct cx18_mdl *mdl; |
| 658 | |
| 659 | if (!cx18_stream_enabled(s)) |
| 660 | return; |
| 661 | |
| 662 | /* Return if the firmware is not running low on MDLs */ |
| 663 | if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >= |
| 664 | CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN) |
| 665 | return; |
| 666 | |
| 667 | /* Return if there are no MDLs to rotate back to the firmware */ |
| 668 | if (atomic_read(&s->q_full.depth) < 2) |
| 669 | return; |
| 670 | |
| 671 | /* |
| 672 | * Take the oldest IDX MDL still holding data, and discard its index |
| 673 | * entries by scheduling the MDL to go back to the firmware |
| 674 | */ |
| 675 | mdl = cx18_dequeue(s, &s->q_full); |
| 676 | if (mdl != NULL) |
| 677 | cx18_enqueue(s, mdl, &s->q_free); |
| 678 | } |
| 679 | |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 680 | static |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 681 | struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s, |
| 682 | struct cx18_mdl *mdl) |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 683 | { |
| 684 | struct cx18 *cx = s->cx; |
| 685 | struct cx18_queue *q; |
| 686 | |
| 687 | /* Don't give it to the firmware, if we're not running a capture */ |
| 688 | if (s->handle == CX18_INVALID_TASK_HANDLE || |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 689 | test_bit(CX18_F_S_STOPPING, &s->s_flags) || |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 690 | !test_bit(CX18_F_S_STREAMING, &s->s_flags)) |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 691 | return cx18_enqueue(s, mdl, &s->q_free); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 692 | |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 693 | q = cx18_enqueue(s, mdl, &s->q_busy); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 694 | if (q != &s->q_busy) |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 695 | return q; /* The firmware has the max MDLs it can handle */ |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 696 | |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 697 | cx18_mdl_sync_for_device(s, mdl); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 698 | cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle, |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 699 | (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem, |
| 700 | s->bufs_per_mdl, mdl->id, s->mdl_size); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 701 | return q; |
| 702 | } |
| 703 | |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 704 | static |
| 705 | void _cx18_stream_load_fw_queue(struct cx18_stream *s) |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 706 | { |
Andy Walls | abb096d | 2008-12-12 15:50:27 -0300 | [diff] [blame] | 707 | struct cx18_queue *q; |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 708 | struct cx18_mdl *mdl; |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 709 | |
Andy Walls | c37b11b | 2009-11-04 23:13:58 -0300 | [diff] [blame] | 710 | if (atomic_read(&s->q_free.depth) == 0 || |
| 711 | atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM) |
Andy Walls | abb096d | 2008-12-12 15:50:27 -0300 | [diff] [blame] | 712 | return; |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 713 | |
Andy Walls | abb096d | 2008-12-12 15:50:27 -0300 | [diff] [blame] | 714 | /* Move from q_free to q_busy notifying the firmware, until the limit */ |
| 715 | do { |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 716 | mdl = cx18_dequeue(s, &s->q_free); |
| 717 | if (mdl == NULL) |
Andy Walls | abb096d | 2008-12-12 15:50:27 -0300 | [diff] [blame] | 718 | break; |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 719 | q = _cx18_stream_put_mdl_fw(s, mdl); |
Andy Walls | c37b11b | 2009-11-04 23:13:58 -0300 | [diff] [blame] | 720 | } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM |
Andy Walls | 0ef0289 | 2008-12-14 18:52:12 -0300 | [diff] [blame] | 721 | && q == &s->q_busy); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 722 | } |
| 723 | |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 724 | void cx18_out_work_handler(struct work_struct *work) |
| 725 | { |
Andy Walls | 21a278b | 2009-04-15 20:45:10 -0300 | [diff] [blame] | 726 | struct cx18_stream *s = |
| 727 | container_of(work, struct cx18_stream, out_work_order); |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 728 | |
Andy Walls | 21a278b | 2009-04-15 20:45:10 -0300 | [diff] [blame] | 729 | _cx18_stream_load_fw_queue(s); |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 730 | } |
| 731 | |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 732 | static void cx18_stream_configure_mdls(struct cx18_stream *s) |
| 733 | { |
| 734 | cx18_unload_queues(s); |
| 735 | |
Andy Walls | 22dce18 | 2009-11-09 23:55:30 -0300 | [diff] [blame] | 736 | switch (s->type) { |
| 737 | case CX18_ENC_STREAM_TYPE_YUV: |
| 738 | /* |
| 739 | * Height should be a multiple of 32 lines. |
| 740 | * Set the MDL size to the exact size needed for one frame. |
| 741 | * Use enough buffers per MDL to cover the MDL size |
| 742 | */ |
Simon Farnsworth | 1bf5842 | 2011-05-03 08:57:40 -0300 | [diff] [blame] | 743 | if (s->pixelformat == V4L2_PIX_FMT_HM12) |
| 744 | s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2; |
| 745 | else |
| 746 | s->mdl_size = 720 * s->cx->cxhdl.height * 2; |
Andy Walls | 22dce18 | 2009-11-09 23:55:30 -0300 | [diff] [blame] | 747 | s->bufs_per_mdl = s->mdl_size / s->buf_size; |
| 748 | if (s->mdl_size % s->buf_size) |
| 749 | s->bufs_per_mdl++; |
| 750 | break; |
Andy Walls | 127ce5f | 2009-11-11 00:22:57 -0300 | [diff] [blame] | 751 | case CX18_ENC_STREAM_TYPE_VBI: |
| 752 | s->bufs_per_mdl = 1; |
| 753 | if (cx18_raw_vbi(s->cx)) { |
| 754 | s->mdl_size = (s->cx->is_60hz ? 12 : 18) |
| 755 | * 2 * vbi_active_samples; |
| 756 | } else { |
| 757 | /* |
| 758 | * See comment in cx18_vbi_setup() below about the |
| 759 | * extra lines we capture in sliced VBI mode due to |
| 760 | * the lines on which EAV RP codes toggle. |
| 761 | */ |
| 762 | s->mdl_size = s->cx->is_60hz |
| 763 | ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz |
| 764 | : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz; |
| 765 | } |
| 766 | break; |
Andy Walls | 22dce18 | 2009-11-09 23:55:30 -0300 | [diff] [blame] | 767 | default: |
| 768 | s->bufs_per_mdl = 1; |
| 769 | s->mdl_size = s->buf_size * s->bufs_per_mdl; |
| 770 | break; |
| 771 | } |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 772 | |
| 773 | cx18_load_queues(s); |
| 774 | } |
| 775 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 776 | int cx18_start_v4l2_encode_stream(struct cx18_stream *s) |
| 777 | { |
| 778 | u32 data[MAX_MB_ARGUMENTS]; |
| 779 | struct cx18 *cx = s->cx; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 780 | int captype = 0; |
Andy Walls | e46c54a | 2009-12-31 02:14:51 -0300 | [diff] [blame] | 781 | struct cx18_stream *s_idx; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 782 | |
Andy Walls | 540bab9 | 2009-12-31 00:26:49 -0300 | [diff] [blame] | 783 | if (!cx18_stream_enabled(s)) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 784 | return -EINVAL; |
| 785 | |
| 786 | CX18_DEBUG_INFO("Start encoder stream %s\n", s->name); |
| 787 | |
| 788 | switch (s->type) { |
| 789 | case CX18_ENC_STREAM_TYPE_MPG: |
| 790 | captype = CAPTURE_CHANNEL_TYPE_MPEG; |
| 791 | cx->mpg_data_received = cx->vbi_data_inserted = 0; |
| 792 | cx->dualwatch_jiffies = jiffies; |
Hans Verkuil | a75b9be | 2010-12-31 10:22:52 -0300 | [diff] [blame] | 793 | cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 794 | cx->search_pack_header = 0; |
| 795 | break; |
| 796 | |
Andy Walls | e46c54a | 2009-12-31 02:14:51 -0300 | [diff] [blame] | 797 | case CX18_ENC_STREAM_TYPE_IDX: |
| 798 | captype = CAPTURE_CHANNEL_TYPE_INDEX; |
| 799 | break; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 800 | case CX18_ENC_STREAM_TYPE_TS: |
| 801 | captype = CAPTURE_CHANNEL_TYPE_TS; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 802 | break; |
| 803 | case CX18_ENC_STREAM_TYPE_YUV: |
| 804 | captype = CAPTURE_CHANNEL_TYPE_YUV; |
| 805 | break; |
| 806 | case CX18_ENC_STREAM_TYPE_PCM: |
| 807 | captype = CAPTURE_CHANNEL_TYPE_PCM; |
| 808 | break; |
| 809 | case CX18_ENC_STREAM_TYPE_VBI: |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 810 | #ifdef CX18_ENCODER_PARSES_SLICED |
Andy Walls | dd07343 | 2008-12-12 16:24:04 -0300 | [diff] [blame] | 811 | captype = cx18_raw_vbi(cx) ? |
| 812 | CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI; |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 813 | #else |
| 814 | /* |
| 815 | * Currently we set things up so that Sliced VBI from the |
| 816 | * digitizer is handled as Raw VBI by the encoder |
| 817 | */ |
| 818 | captype = CAPTURE_CHANNEL_TYPE_VBI; |
| 819 | #endif |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 820 | cx->vbi.frame = 0; |
| 821 | cx->vbi.inserted_frame = 0; |
| 822 | memset(cx->vbi.sliced_mpeg_size, |
| 823 | 0, sizeof(cx->vbi.sliced_mpeg_size)); |
| 824 | break; |
| 825 | default: |
| 826 | return -EINVAL; |
| 827 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 828 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 829 | /* Clear Streamoff flags in case left from last capture */ |
| 830 | clear_bit(CX18_F_S_STREAMOFF, &s->s_flags); |
| 831 | |
| 832 | cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE); |
| 833 | s->handle = data[0]; |
| 834 | cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype); |
| 835 | |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 836 | /* |
| 837 | * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and |
| 838 | * set up all the parameters, as it is not obvious which parameters the |
| 839 | * firmware shares across capture channel types and which it does not. |
| 840 | * |
| 841 | * Some of the cx18_vapi() calls below apply to only certain capture |
| 842 | * channel types. We're hoping there's no harm in calling most of them |
| 843 | * anyway, as long as the values are all consistent. Setting some |
| 844 | * shared parameters will have no effect once an analog capture channel |
| 845 | * has started streaming. |
| 846 | */ |
| 847 | if (captype != CAPTURE_CHANNEL_TYPE_TS) { |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 848 | cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0); |
| 849 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1); |
| 850 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0); |
| 851 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 852 | |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 853 | /* |
| 854 | * Audio related reset according to |
| 855 | * Documentation/video4linux/cx2341x/fw-encoder-api.txt |
| 856 | */ |
| 857 | if (atomic_read(&cx->ana_capturing) == 0) |
| 858 | cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, |
| 859 | s->handle, 12); |
| 860 | |
| 861 | /* |
| 862 | * Number of lines for Field 1 & Field 2 according to |
| 863 | * Documentation/video4linux/cx2341x/fw-encoder-api.txt |
Andy Walls | f37aa51 | 2009-02-07 01:15:44 -0300 | [diff] [blame] | 864 | * Field 1 is 312 for 625 line systems in BT.656 |
| 865 | * Field 2 is 313 for 625 line systems in BT.656 |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 866 | */ |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 867 | cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3, |
Andy Walls | f37aa51 | 2009-02-07 01:15:44 -0300 | [diff] [blame] | 868 | s->handle, 312, 313); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 869 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 870 | if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE) |
| 871 | cx18_vbi_setup(s); |
| 872 | |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 873 | /* |
Andy Walls | e46c54a | 2009-12-31 02:14:51 -0300 | [diff] [blame] | 874 | * Select to receive I, P, and B frame index entries, if the |
| 875 | * index stream is enabled. Otherwise disable index entry |
| 876 | * generation. |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 877 | */ |
Andy Walls | e46c54a | 2009-12-31 02:14:51 -0300 | [diff] [blame] | 878 | s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX]; |
Andy Walls | 5ada577 | 2010-01-01 13:25:41 -0300 | [diff] [blame] | 879 | cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2, |
| 880 | s->handle, cx18_stream_enabled(s_idx) ? 7 : 0); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 881 | |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 882 | /* Call out to the common CX2341x API setup for user controls */ |
Hans Verkuil | a75b9be | 2010-12-31 10:22:52 -0300 | [diff] [blame] | 883 | cx->cxhdl.priv = s; |
| 884 | cx2341x_handler_setup(&cx->cxhdl); |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 885 | |
| 886 | /* |
| 887 | * When starting a capture and we're set for radio, |
| 888 | * ensure the video is muted, despite the user control. |
| 889 | */ |
Hans Verkuil | a75b9be | 2010-12-31 10:22:52 -0300 | [diff] [blame] | 890 | if (!cx->cxhdl.video_mute && |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 891 | test_bit(CX18_F_I_RADIO_USER, &cx->i_flags)) |
| 892 | cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle, |
Hans Verkuil | a75b9be | 2010-12-31 10:22:52 -0300 | [diff] [blame] | 893 | (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1); |
Steven Toth | b7101de | 2011-04-06 08:32:56 -0300 | [diff] [blame] | 894 | |
| 895 | /* Enable the Video Format Converter for UYVY 4:2:2 support, |
| 896 | * rather than the default HM12 Macroblovk 4:2:0 support. |
| 897 | */ |
| 898 | if (captype == CAPTURE_CHANNEL_TYPE_YUV) { |
Simon Farnsworth | 1bf5842 | 2011-05-03 08:57:40 -0300 | [diff] [blame] | 899 | if (s->pixelformat == V4L2_PIX_FMT_UYVY) |
Steven Toth | b7101de | 2011-04-06 08:32:56 -0300 | [diff] [blame] | 900 | cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2, |
| 901 | s->handle, 1); |
| 902 | else |
| 903 | /* If in doubt, default to HM12 */ |
| 904 | cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2, |
| 905 | s->handle, 0); |
| 906 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 907 | } |
| 908 | |
Hans Verkuil | 31554ae | 2008-05-25 11:21:27 -0300 | [diff] [blame] | 909 | if (atomic_read(&cx->tot_capturing) == 0) { |
Hans Verkuil | a75b9be | 2010-12-31 10:22:52 -0300 | [diff] [blame] | 910 | cx2341x_handler_set_busy(&cx->cxhdl, 1); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 911 | clear_bit(CX18_F_I_EOS, &cx->i_flags); |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 912 | cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 913 | } |
| 914 | |
| 915 | cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle, |
Al Viro | 990c81c | 2008-05-21 00:32:01 -0300 | [diff] [blame] | 916 | (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem, |
| 917 | (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 918 | |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 919 | /* Init all the cpu_mdls for this stream */ |
Andy Walls | 52fcb3e | 2009-11-08 23:45:24 -0300 | [diff] [blame] | 920 | cx18_stream_configure_mdls(s); |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 921 | _cx18_stream_load_fw_queue(s); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 922 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 923 | /* begin_capture */ |
| 924 | if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) { |
| 925 | CX18_DEBUG_WARN("Error starting capture!\n"); |
Andy Walls | 3b5df8e | 2008-08-23 18:36:50 -0300 | [diff] [blame] | 926 | /* Ensure we're really not capturing before releasing MDLs */ |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 927 | set_bit(CX18_F_S_STOPPING, &s->s_flags); |
Andy Walls | 3b5df8e | 2008-08-23 18:36:50 -0300 | [diff] [blame] | 928 | if (s->type == CX18_ENC_STREAM_TYPE_MPG) |
| 929 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1); |
| 930 | else |
| 931 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 932 | clear_bit(CX18_F_S_STREAMING, &s->s_flags); |
| 933 | /* FIXME - CX18_F_S_STREAMOFF as well? */ |
Andy Walls | 3b5df8e | 2008-08-23 18:36:50 -0300 | [diff] [blame] | 934 | cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 935 | cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 936 | s->handle = CX18_INVALID_TASK_HANDLE; |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 937 | clear_bit(CX18_F_S_STOPPING, &s->s_flags); |
Andy Walls | 66c2a6b | 2008-12-08 23:02:45 -0300 | [diff] [blame] | 938 | if (atomic_read(&cx->tot_capturing) == 0) { |
| 939 | set_bit(CX18_F_I_EOS, &cx->i_flags); |
| 940 | cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); |
| 941 | } |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 942 | return -EINVAL; |
| 943 | } |
| 944 | |
| 945 | /* you're live! sit back and await interrupts :) */ |
Andy Walls | dcc0ef8 | 2009-02-06 18:33:43 -0300 | [diff] [blame] | 946 | if (captype != CAPTURE_CHANNEL_TYPE_TS) |
Hans Verkuil | 31554ae | 2008-05-25 11:21:27 -0300 | [diff] [blame] | 947 | atomic_inc(&cx->ana_capturing); |
| 948 | atomic_inc(&cx->tot_capturing); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 949 | return 0; |
| 950 | } |
Devin Heitmueller | 0f4cf67 | 2009-11-19 23:23:57 -0300 | [diff] [blame] | 951 | EXPORT_SYMBOL(cx18_start_v4l2_encode_stream); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 952 | |
| 953 | void cx18_stop_all_captures(struct cx18 *cx) |
| 954 | { |
| 955 | int i; |
| 956 | |
| 957 | for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) { |
| 958 | struct cx18_stream *s = &cx->streams[i]; |
| 959 | |
Andy Walls | 540bab9 | 2009-12-31 00:26:49 -0300 | [diff] [blame] | 960 | if (!cx18_stream_enabled(s)) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 961 | continue; |
| 962 | if (test_bit(CX18_F_S_STREAMING, &s->s_flags)) |
| 963 | cx18_stop_v4l2_encode_stream(s, 0); |
| 964 | } |
| 965 | } |
| 966 | |
| 967 | int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end) |
| 968 | { |
| 969 | struct cx18 *cx = s->cx; |
| 970 | unsigned long then; |
| 971 | |
Andy Walls | 540bab9 | 2009-12-31 00:26:49 -0300 | [diff] [blame] | 972 | if (!cx18_stream_enabled(s)) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 973 | return -EINVAL; |
| 974 | |
| 975 | /* This function assumes that you are allowed to stop the capture |
| 976 | and that we are actually capturing */ |
| 977 | |
| 978 | CX18_DEBUG_INFO("Stop Capture\n"); |
| 979 | |
Hans Verkuil | 31554ae | 2008-05-25 11:21:27 -0300 | [diff] [blame] | 980 | if (atomic_read(&cx->tot_capturing) == 0) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 981 | return 0; |
| 982 | |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 983 | set_bit(CX18_F_S_STOPPING, &s->s_flags); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 984 | if (s->type == CX18_ENC_STREAM_TYPE_MPG) |
| 985 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end); |
| 986 | else |
| 987 | cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle); |
| 988 | |
| 989 | then = jiffies; |
| 990 | |
| 991 | if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) { |
| 992 | CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n"); |
| 993 | } |
| 994 | |
Hans Verkuil | 31554ae | 2008-05-25 11:21:27 -0300 | [diff] [blame] | 995 | if (s->type != CX18_ENC_STREAM_TYPE_TS) |
| 996 | atomic_dec(&cx->ana_capturing); |
| 997 | atomic_dec(&cx->tot_capturing); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 998 | |
| 999 | /* Clear capture and no-read bits */ |
| 1000 | clear_bit(CX18_F_S_STREAMING, &s->s_flags); |
| 1001 | |
Andy Walls | f68d0cf | 2008-11-05 21:19:15 -0300 | [diff] [blame] | 1002 | /* Tell the CX23418 it can't use our buffers anymore */ |
| 1003 | cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle); |
| 1004 | |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1005 | cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle); |
Andy Walls | d3c5e70 | 2008-08-23 16:42:29 -0300 | [diff] [blame] | 1006 | s->handle = CX18_INVALID_TASK_HANDLE; |
Andy Walls | 8711615 | 2009-04-13 22:42:43 -0300 | [diff] [blame] | 1007 | clear_bit(CX18_F_S_STOPPING, &s->s_flags); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1008 | |
Hans Verkuil | 31554ae | 2008-05-25 11:21:27 -0300 | [diff] [blame] | 1009 | if (atomic_read(&cx->tot_capturing) > 0) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1010 | return 0; |
| 1011 | |
Hans Verkuil | a75b9be | 2010-12-31 10:22:52 -0300 | [diff] [blame] | 1012 | cx2341x_handler_set_busy(&cx->cxhdl, 0); |
Andy Walls | b152642 | 2008-08-30 16:03:44 -0300 | [diff] [blame] | 1013 | cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1014 | wake_up(&s->waitq); |
| 1015 | |
| 1016 | return 0; |
| 1017 | } |
Devin Heitmueller | 0f4cf67 | 2009-11-19 23:23:57 -0300 | [diff] [blame] | 1018 | EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream); |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1019 | |
| 1020 | u32 cx18_find_handle(struct cx18 *cx) |
| 1021 | { |
| 1022 | int i; |
| 1023 | |
| 1024 | /* find first available handle to be used for global settings */ |
| 1025 | for (i = 0; i < CX18_MAX_STREAMS; i++) { |
| 1026 | struct cx18_stream *s = &cx->streams[i]; |
| 1027 | |
Andy Walls | 3d05913 | 2009-01-10 21:54:39 -0300 | [diff] [blame] | 1028 | if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE)) |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1029 | return s->handle; |
| 1030 | } |
Andy Walls | d3c5e70 | 2008-08-23 16:42:29 -0300 | [diff] [blame] | 1031 | return CX18_INVALID_TASK_HANDLE; |
Hans Verkuil | 1c1e45d | 2008-04-28 20:24:33 -0300 | [diff] [blame] | 1032 | } |
Andy Walls | ee2d64f | 2008-11-16 01:38:19 -0300 | [diff] [blame] | 1033 | |
| 1034 | struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle) |
| 1035 | { |
| 1036 | int i; |
| 1037 | struct cx18_stream *s; |
| 1038 | |
| 1039 | if (handle == CX18_INVALID_TASK_HANDLE) |
| 1040 | return NULL; |
| 1041 | |
| 1042 | for (i = 0; i < CX18_MAX_STREAMS; i++) { |
| 1043 | s = &cx->streams[i]; |
| 1044 | if (s->handle != handle) |
| 1045 | continue; |
Andy Walls | 540bab9 | 2009-12-31 00:26:49 -0300 | [diff] [blame] | 1046 | if (cx18_stream_enabled(s)) |
Andy Walls | ee2d64f | 2008-11-16 01:38:19 -0300 | [diff] [blame] | 1047 | return s; |
| 1048 | } |
| 1049 | return NULL; |
| 1050 | } |