Sam Ravnborg | 1d05995 | 2011-02-25 23:01:19 -0800 | [diff] [blame] | 1 | #include <linux/platform_device.h> |
| 2 | |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 3 | #include <asm/btfixup.h> |
David Howells | d550bbd | 2012-03-28 18:30:03 +0100 | [diff] [blame] | 4 | #include <asm/cpu_type.h> |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 5 | |
Sam Ravnborg | 6baa9b2 | 2011-04-18 11:25:44 +0000 | [diff] [blame] | 6 | struct irq_bucket { |
| 7 | struct irq_bucket *next; |
| 8 | unsigned int real_irq; |
| 9 | unsigned int irq; |
| 10 | unsigned int pil; |
| 11 | }; |
| 12 | |
| 13 | #define SUN4D_MAX_BOARD 10 |
| 14 | #define SUN4D_MAX_IRQ ((SUN4D_MAX_BOARD + 2) << 5) |
| 15 | |
| 16 | /* Map between the irq identifier used in hw to the |
| 17 | * irq_bucket. The map is sufficient large to hold |
| 18 | * the sun4d hw identifiers. |
| 19 | */ |
| 20 | extern struct irq_bucket *irq_map[SUN4D_MAX_IRQ]; |
| 21 | |
| 22 | |
Sam Ravnborg | 0399bb5 | 2011-02-25 23:02:11 -0800 | [diff] [blame] | 23 | /* sun4m specific type definitions */ |
| 24 | |
| 25 | /* This maps direct to CPU specific interrupt registers */ |
| 26 | struct sun4m_irq_percpu { |
| 27 | u32 pending; |
| 28 | u32 clear; |
| 29 | u32 set; |
| 30 | }; |
| 31 | |
| 32 | /* This maps direct to global interrupt registers */ |
| 33 | struct sun4m_irq_global { |
| 34 | u32 pending; |
| 35 | u32 mask; |
| 36 | u32 mask_clear; |
| 37 | u32 mask_set; |
| 38 | u32 interrupt_target; |
| 39 | }; |
| 40 | |
| 41 | extern struct sun4m_irq_percpu __iomem *sun4m_irq_percpu[SUN4M_NCPUS]; |
| 42 | extern struct sun4m_irq_global __iomem *sun4m_irq_global; |
| 43 | |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame^] | 44 | /* The following definitions describe the individual platform features: */ |
| 45 | #define FEAT_L10_CLOCKSOURCE (1 << 0) /* L10 timer is used as a clocksource */ |
| 46 | #define FEAT_L10_CLOCKEVENT (1 << 1) /* L10 timer is used as a clockevent */ |
| 47 | #define FEAT_L14_ONESHOT (1 << 2) /* L14 timer clockevent can oneshot */ |
| 48 | |
Sam Ravnborg | bbdc266 | 2011-02-25 23:00:19 -0800 | [diff] [blame] | 49 | /* |
Sam Ravnborg | 472bc4f | 2012-04-04 13:21:13 +0200 | [diff] [blame] | 50 | * Platform specific configuration |
Sam Ravnborg | bbdc266 | 2011-02-25 23:00:19 -0800 | [diff] [blame] | 51 | * The individual platforms assign their platform |
| 52 | * specifics in their init functions. |
| 53 | */ |
Sam Ravnborg | 472bc4f | 2012-04-04 13:21:13 +0200 | [diff] [blame] | 54 | struct sparc_config { |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame^] | 55 | void (*init_timers)(void); |
Sam Ravnborg | 1d05995 | 2011-02-25 23:01:19 -0800 | [diff] [blame] | 56 | unsigned int (*build_device_irq)(struct platform_device *op, |
| 57 | unsigned int real_irq); |
Tkhai Kirill | 62f0828 | 2012-04-04 21:49:26 +0200 | [diff] [blame^] | 58 | |
| 59 | /* generic clockevent features - see FEAT_* above */ |
| 60 | int features; |
| 61 | |
| 62 | /* clock rate used for clock event timer */ |
| 63 | int clock_rate; |
| 64 | |
| 65 | /* one period for clock source timer */ |
| 66 | unsigned int cs_period; |
| 67 | |
| 68 | /* function to obtain offsett for cs period */ |
| 69 | unsigned int (*get_cycles_offset)(void); |
Sam Ravnborg | bbdc266 | 2011-02-25 23:00:19 -0800 | [diff] [blame] | 70 | }; |
Sam Ravnborg | 472bc4f | 2012-04-04 13:21:13 +0200 | [diff] [blame] | 71 | extern struct sparc_config sparc_config; |
Sam Ravnborg | bbdc266 | 2011-02-25 23:00:19 -0800 | [diff] [blame] | 72 | |
Sam Ravnborg | 6baa9b2 | 2011-04-18 11:25:44 +0000 | [diff] [blame] | 73 | unsigned int irq_alloc(unsigned int real_irq, unsigned int pil); |
| 74 | void irq_link(unsigned int irq); |
| 75 | void irq_unlink(unsigned int irq); |
| 76 | void handler_irq(unsigned int pil, struct pt_regs *regs); |
Sam Ravnborg | bbdc266 | 2011-02-25 23:00:19 -0800 | [diff] [blame] | 77 | |
Al Viro | 0f51681 | 2007-07-21 19:19:38 -0700 | [diff] [blame] | 78 | /* Dave Redman (djhr@tadpole.co.uk) |
| 79 | * changed these to function pointers.. it saves cycles and will allow |
| 80 | * the irq dependencies to be split into different files at a later date |
| 81 | * sun4c_irq.c, sun4m_irq.c etc so we could reduce the kernel size. |
| 82 | * Jakub Jelinek (jj@sunsite.mff.cuni.cz) |
| 83 | * Changed these to btfixup entities... It saves cycles :) |
| 84 | */ |
| 85 | |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 86 | BTFIXUPDEF_CALL(void, clear_clock_irq, void) |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 87 | BTFIXUPDEF_CALL(void, load_profile_irq, int, unsigned int) |
| 88 | |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 89 | static inline void clear_clock_irq(void) |
| 90 | { |
| 91 | BTFIXUP_CALL(clear_clock_irq)(); |
| 92 | } |
| 93 | |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 94 | static inline void load_profile_irq(int cpu, int limit) |
| 95 | { |
| 96 | BTFIXUP_CALL(load_profile_irq)(cpu, limit); |
| 97 | } |
| 98 | |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 99 | #ifdef CONFIG_SMP |
| 100 | BTFIXUPDEF_CALL(void, set_cpu_int, int, int) |
| 101 | BTFIXUPDEF_CALL(void, clear_cpu_int, int, int) |
| 102 | BTFIXUPDEF_CALL(void, set_irq_udt, int) |
| 103 | |
| 104 | #define set_cpu_int(cpu,level) BTFIXUP_CALL(set_cpu_int)(cpu,level) |
| 105 | #define clear_cpu_int(cpu,level) BTFIXUP_CALL(clear_cpu_int)(cpu,level) |
| 106 | #define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu) |
Daniel Hellstrom | 55dd23e | 2011-05-02 00:08:54 +0000 | [diff] [blame] | 107 | |
| 108 | /* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */ |
Kjetil Oftedal | 38f7f8f | 2011-08-29 00:16:28 +0200 | [diff] [blame] | 109 | #define SUN4D_IPI_IRQ 13 |
Daniel Hellstrom | 55dd23e | 2011-05-02 00:08:54 +0000 | [diff] [blame] | 110 | |
| 111 | extern void sun4d_ipi_interrupt(void); |
| 112 | |
Al Viro | 32231a6 | 2007-07-21 19:18:57 -0700 | [diff] [blame] | 113 | #endif |