blob: 23122f294a2416e8c370f657a5257bf293e11f12 [file] [log] [blame]
Kukjin Kimd11135c2011-02-14 14:59:52 +09001/* linux/arch/arm/mach-exynos4/mach-universal_c210.c
Kyungmin Park516607d2010-08-06 19:59:21 +09002 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
Kyungmin Park34d79312010-08-21 09:49:49 +090010#include <linux/platform_device.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090011#include <linux/serial_core.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090012#include <linux/input.h>
Kyungmin Park3b7998f2010-10-08 22:34:56 +090013#include <linux/i2c.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090014#include <linux/gpio_keys.h>
15#include <linux/gpio.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090016#include <linux/fb.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090017#include <linux/mfd/max8998.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090018#include <linux/regulator/machine.h>
19#include <linux/regulator/fixed.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090020#include <linux/regulator/max8952.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090021#include <linux/mmc/host.h>
Marek Szyprowskib908af42011-06-22 13:43:39 +090022#include <linux/i2c-gpio.h>
23#include <linux/i2c/mcs.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090024#include <linux/i2c/atmel_mxt_ts.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090025
26#include <asm/mach/arch.h>
Marc Zyngier4e44d2c2011-05-30 11:04:53 +010027#include <asm/hardware/gic.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090028#include <asm/mach-types.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090029
30#include <plat/regs-serial.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090031#include <plat/cpu.h>
Kyungmin Parkacf5eda2010-10-08 22:34:52 +090032#include <plat/devs.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090033#include <plat/iic.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090034#include <plat/gpio-cfg.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090035#include <plat/fb.h>
Kamil Debskib14f04d2011-07-21 16:43:20 +090036#include <plat/mfc.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090037#include <plat/sdhci.h>
Kamil Debskib14f04d2011-07-21 16:43:20 +090038#include <plat/pd.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090039#include <plat/regs-fb-v4.h>
Sylwester Nawrocki05132182011-09-27 07:18:55 +090040#include <plat/fimc-core.h>
41#include <plat/camport.h>
42#include <plat/mipi_csis.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090043
44#include <mach/map.h>
45
Sylwester Nawrocki05132182011-09-27 07:18:55 +090046#include <media/v4l2-mediabus.h>
47#include <media/s5p_fimc.h>
48#include <media/m5mols.h>
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +090049#include <media/s5k6aa.h>
Sylwester Nawrocki05132182011-09-27 07:18:55 +090050
Kukjin Kimcc511b82011-12-27 08:18:36 +010051#include "common.h"
52
Kyungmin Park516607d2010-08-06 19:59:21 +090053/* Following are default values for UCON, ULCON and UFCON UART registers */
54#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
55 S3C2410_UCON_RXILEVEL | \
56 S3C2410_UCON_TXIRQMODE | \
57 S3C2410_UCON_RXIRQMODE | \
58 S3C2410_UCON_RXFIFO_TOI | \
59 S3C2443_UCON_RXERR_IRQEN)
60
61#define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
62
63#define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
64 S5PV210_UFCON_TXTRIG256 | \
65 S5PV210_UFCON_RXTRIG256)
66
67static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
68 [0] = {
69 .hwport = 0,
70 .ucon = UNIVERSAL_UCON_DEFAULT,
71 .ulcon = UNIVERSAL_ULCON_DEFAULT,
72 .ufcon = UNIVERSAL_UFCON_DEFAULT,
73 },
74 [1] = {
75 .hwport = 1,
76 .ucon = UNIVERSAL_UCON_DEFAULT,
77 .ulcon = UNIVERSAL_ULCON_DEFAULT,
78 .ufcon = UNIVERSAL_UFCON_DEFAULT,
79 },
80 [2] = {
81 .hwport = 2,
82 .ucon = UNIVERSAL_UCON_DEFAULT,
83 .ulcon = UNIVERSAL_ULCON_DEFAULT,
84 .ufcon = UNIVERSAL_UFCON_DEFAULT,
85 },
86 [3] = {
87 .hwport = 3,
88 .ucon = UNIVERSAL_UCON_DEFAULT,
89 .ulcon = UNIVERSAL_ULCON_DEFAULT,
90 .ufcon = UNIVERSAL_UFCON_DEFAULT,
91 },
92};
93
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090094static struct regulator_consumer_supply max8952_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +090095 REGULATOR_SUPPLY("vdd_arm", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090096
97static struct max8952_platform_data universal_max8952_pdata __initdata = {
98 .gpio_vid0 = EXYNOS4_GPX0(3),
99 .gpio_vid1 = EXYNOS4_GPX0(4),
100 .gpio_en = -1, /* Not controllable, set "Always High" */
101 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
102 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
103 .sync_freq = 0, /* default: fastest */
104 .ramp_speed = 0, /* default: fastest */
105
106 .reg_data = {
107 .constraints = {
108 .name = "VARM_1.2V",
109 .min_uV = 770000,
110 .max_uV = 1400000,
111 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
112 .always_on = 1,
113 .boot_on = 1,
114 },
115 .num_consumer_supplies = 1,
116 .consumer_supplies = &max8952_consumer,
117 },
118};
119
120static struct regulator_consumer_supply lp3974_buck1_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +0900121 REGULATOR_SUPPLY("vdd_int", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900122
123static struct regulator_consumer_supply lp3974_buck2_consumer =
124 REGULATOR_SUPPLY("vddg3d", NULL);
125
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900126static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
127 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
128 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
129};
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900130
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900131static struct regulator_init_data lp3974_buck1_data = {
132 .constraints = {
133 .name = "VINT_1.1V",
134 .min_uV = 750000,
135 .max_uV = 1500000,
136 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
137 REGULATOR_CHANGE_STATUS,
138 .boot_on = 1,
139 .state_mem = {
140 .disabled = 1,
141 },
142 },
143 .num_consumer_supplies = 1,
144 .consumer_supplies = &lp3974_buck1_consumer,
145};
146
147static struct regulator_init_data lp3974_buck2_data = {
148 .constraints = {
149 .name = "VG3D_1.1V",
150 .min_uV = 750000,
151 .max_uV = 1500000,
152 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
153 REGULATOR_CHANGE_STATUS,
154 .boot_on = 1,
155 .state_mem = {
156 .disabled = 1,
157 },
158 },
159 .num_consumer_supplies = 1,
160 .consumer_supplies = &lp3974_buck2_consumer,
161};
162
163static struct regulator_init_data lp3974_buck3_data = {
164 .constraints = {
165 .name = "VCC_1.8V",
166 .min_uV = 1800000,
167 .max_uV = 1800000,
168 .apply_uV = 1,
169 .always_on = 1,
170 .state_mem = {
171 .enabled = 1,
172 },
173 },
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900174 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
175 .consumer_supplies = lp3974_buck3_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900176};
177
178static struct regulator_init_data lp3974_buck4_data = {
179 .constraints = {
180 .name = "VMEM_1.2V",
181 .min_uV = 1200000,
182 .max_uV = 1200000,
183 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
184 .apply_uV = 1,
185 .state_mem = {
186 .disabled = 1,
187 },
188 },
189};
190
191static struct regulator_init_data lp3974_ldo2_data = {
192 .constraints = {
193 .name = "VALIVE_1.2V",
194 .min_uV = 1200000,
195 .max_uV = 1200000,
196 .apply_uV = 1,
197 .always_on = 1,
198 .state_mem = {
199 .enabled = 1,
200 },
201 },
202};
203
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900204static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
205 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
206 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900207 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900208};
209
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900210static struct regulator_init_data lp3974_ldo3_data = {
211 .constraints = {
212 .name = "VUSB+MIPI_1.1V",
213 .min_uV = 1100000,
214 .max_uV = 1100000,
215 .apply_uV = 1,
216 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
217 .state_mem = {
218 .disabled = 1,
219 },
220 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900221 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
222 .consumer_supplies = lp3974_ldo3_consumer,
223};
224
225static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
226 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900227};
228
229static struct regulator_init_data lp3974_ldo4_data = {
230 .constraints = {
231 .name = "VADC_3.3V",
232 .min_uV = 3300000,
233 .max_uV = 3300000,
234 .apply_uV = 1,
235 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
236 .state_mem = {
237 .disabled = 1,
238 },
239 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900240 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
241 .consumer_supplies = lp3974_ldo4_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900242};
243
244static struct regulator_init_data lp3974_ldo5_data = {
245 .constraints = {
246 .name = "VTF_2.8V",
247 .min_uV = 2800000,
248 .max_uV = 2800000,
249 .apply_uV = 1,
250 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
251 .state_mem = {
252 .disabled = 1,
253 },
254 },
255};
256
257static struct regulator_init_data lp3974_ldo6_data = {
258 .constraints = {
259 .name = "LDO6",
260 .min_uV = 2000000,
261 .max_uV = 2000000,
262 .apply_uV = 1,
263 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
264 .state_mem = {
265 .disabled = 1,
266 },
267 },
268};
269
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900270static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
271 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
272};
273
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900274static struct regulator_init_data lp3974_ldo7_data = {
275 .constraints = {
276 .name = "VLCD+VMIPI_1.8V",
277 .min_uV = 1800000,
278 .max_uV = 1800000,
279 .apply_uV = 1,
280 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
281 .state_mem = {
282 .disabled = 1,
283 },
284 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900285 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
286 .consumer_supplies = lp3974_ldo7_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900287};
288
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900289static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
290 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
291};
292
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900293static struct regulator_init_data lp3974_ldo8_data = {
294 .constraints = {
295 .name = "VUSB+VDAC_3.3V",
296 .min_uV = 3300000,
297 .max_uV = 3300000,
298 .apply_uV = 1,
299 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
300 .state_mem = {
301 .disabled = 1,
302 },
303 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900304 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
305 .consumer_supplies = lp3974_ldo8_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900306};
307
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900308static struct regulator_consumer_supply lp3974_ldo9_consumer =
309 REGULATOR_SUPPLY("vddio", "0-003c");
310
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900311static struct regulator_init_data lp3974_ldo9_data = {
312 .constraints = {
313 .name = "VCC_2.8V",
314 .min_uV = 2800000,
315 .max_uV = 2800000,
316 .apply_uV = 1,
317 .always_on = 1,
318 .state_mem = {
319 .enabled = 1,
320 },
321 },
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900322 .num_consumer_supplies = 1,
323 .consumer_supplies = &lp3974_ldo9_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900324};
325
326static struct regulator_init_data lp3974_ldo10_data = {
327 .constraints = {
328 .name = "VPLL_1.1V",
329 .min_uV = 1100000,
330 .max_uV = 1100000,
331 .boot_on = 1,
332 .apply_uV = 1,
333 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
334 .state_mem = {
335 .disabled = 1,
336 },
337 },
338};
339
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900340static struct regulator_consumer_supply lp3974_ldo11_consumer =
341 REGULATOR_SUPPLY("dig_28", "0-001f");
342
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900343static struct regulator_init_data lp3974_ldo11_data = {
344 .constraints = {
345 .name = "CAM_AF_3.3V",
346 .min_uV = 3300000,
347 .max_uV = 3300000,
348 .apply_uV = 1,
349 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
350 .state_mem = {
351 .disabled = 1,
352 },
353 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900354 .num_consumer_supplies = 1,
355 .consumer_supplies = &lp3974_ldo11_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900356};
357
358static struct regulator_init_data lp3974_ldo12_data = {
359 .constraints = {
360 .name = "PS_2.8V",
361 .min_uV = 2800000,
362 .max_uV = 2800000,
363 .apply_uV = 1,
364 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
365 .state_mem = {
366 .disabled = 1,
367 },
368 },
369};
370
371static struct regulator_init_data lp3974_ldo13_data = {
372 .constraints = {
373 .name = "VHIC_1.2V",
374 .min_uV = 1200000,
375 .max_uV = 1200000,
376 .apply_uV = 1,
377 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
378 .state_mem = {
379 .disabled = 1,
380 },
381 },
382};
383
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900384static struct regulator_consumer_supply lp3974_ldo14_consumer =
385 REGULATOR_SUPPLY("dig_18", "0-001f");
386
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900387static struct regulator_init_data lp3974_ldo14_data = {
388 .constraints = {
389 .name = "CAM_I_HOST_1.8V",
390 .min_uV = 1800000,
391 .max_uV = 1800000,
392 .apply_uV = 1,
393 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
394 .state_mem = {
395 .disabled = 1,
396 },
397 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900398 .num_consumer_supplies = 1,
399 .consumer_supplies = &lp3974_ldo14_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900400};
401
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900402
403static struct regulator_consumer_supply lp3974_ldo15_consumer =
404 REGULATOR_SUPPLY("dig_12", "0-001f");
405
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900406static struct regulator_init_data lp3974_ldo15_data = {
407 .constraints = {
408 .name = "CAM_S_DIG+FM33_CORE_1.2V",
409 .min_uV = 1200000,
410 .max_uV = 1200000,
411 .apply_uV = 1,
412 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
413 .state_mem = {
414 .disabled = 1,
415 },
416 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900417 .num_consumer_supplies = 1,
418 .consumer_supplies = &lp3974_ldo15_consumer,
419};
420
421static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900422 REGULATOR_SUPPLY("vdda", "0-003c"),
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900423 REGULATOR_SUPPLY("a_sensor", "0-001f"),
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900424};
425
426static struct regulator_init_data lp3974_ldo16_data = {
427 .constraints = {
428 .name = "CAM_S_ANA_2.8V",
429 .min_uV = 2800000,
430 .max_uV = 2800000,
431 .apply_uV = 1,
432 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
433 .state_mem = {
434 .disabled = 1,
435 },
436 },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900437 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
438 .consumer_supplies = lp3974_ldo16_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900439};
440
441static struct regulator_init_data lp3974_ldo17_data = {
442 .constraints = {
443 .name = "VCC_3.0V_LCD",
444 .min_uV = 3000000,
445 .max_uV = 3000000,
446 .apply_uV = 1,
447 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
448 .boot_on = 1,
449 .state_mem = {
450 .disabled = 1,
451 },
452 },
453};
454
455static struct regulator_init_data lp3974_32khz_ap_data = {
456 .constraints = {
457 .name = "32KHz AP",
458 .always_on = 1,
459 .state_mem = {
460 .enabled = 1,
461 },
462 },
463};
464
465static struct regulator_init_data lp3974_32khz_cp_data = {
466 .constraints = {
467 .name = "32KHz CP",
468 .state_mem = {
469 .disabled = 1,
470 },
471 },
472};
473
474static struct regulator_init_data lp3974_vichg_data = {
475 .constraints = {
476 .name = "VICHG",
477 .state_mem = {
478 .disabled = 1,
479 },
480 },
481};
482
483static struct regulator_init_data lp3974_esafeout1_data = {
484 .constraints = {
485 .name = "SAFEOUT1",
486 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
487 .state_mem = {
488 .enabled = 1,
489 },
490 },
491};
492
493static struct regulator_init_data lp3974_esafeout2_data = {
494 .constraints = {
495 .name = "SAFEOUT2",
496 .boot_on = 1,
497 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
498 .state_mem = {
499 .enabled = 1,
500 },
501 },
502};
503
504static struct max8998_regulator_data lp3974_regulators[] = {
505 { MAX8998_LDO2, &lp3974_ldo2_data },
506 { MAX8998_LDO3, &lp3974_ldo3_data },
507 { MAX8998_LDO4, &lp3974_ldo4_data },
508 { MAX8998_LDO5, &lp3974_ldo5_data },
509 { MAX8998_LDO6, &lp3974_ldo6_data },
510 { MAX8998_LDO7, &lp3974_ldo7_data },
511 { MAX8998_LDO8, &lp3974_ldo8_data },
512 { MAX8998_LDO9, &lp3974_ldo9_data },
513 { MAX8998_LDO10, &lp3974_ldo10_data },
514 { MAX8998_LDO11, &lp3974_ldo11_data },
515 { MAX8998_LDO12, &lp3974_ldo12_data },
516 { MAX8998_LDO13, &lp3974_ldo13_data },
517 { MAX8998_LDO14, &lp3974_ldo14_data },
518 { MAX8998_LDO15, &lp3974_ldo15_data },
519 { MAX8998_LDO16, &lp3974_ldo16_data },
520 { MAX8998_LDO17, &lp3974_ldo17_data },
521 { MAX8998_BUCK1, &lp3974_buck1_data },
522 { MAX8998_BUCK2, &lp3974_buck2_data },
523 { MAX8998_BUCK3, &lp3974_buck3_data },
524 { MAX8998_BUCK4, &lp3974_buck4_data },
525 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
526 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
527 { MAX8998_ENVICHG, &lp3974_vichg_data },
528 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
529 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
530};
531
532static struct max8998_platform_data universal_lp3974_pdata = {
533 .num_regulators = ARRAY_SIZE(lp3974_regulators),
534 .regulators = lp3974_regulators,
535 .buck1_voltage1 = 1100000, /* INT */
536 .buck1_voltage2 = 1000000,
537 .buck1_voltage3 = 1100000,
538 .buck1_voltage4 = 1000000,
539 .buck1_set1 = EXYNOS4_GPX0(5),
540 .buck1_set2 = EXYNOS4_GPX0(6),
541 .buck2_voltage1 = 1200000, /* G3D */
542 .buck2_voltage2 = 1100000,
543 .buck1_default_idx = 0,
544 .buck2_set3 = EXYNOS4_GPE2(0),
545 .buck2_default_idx = 0,
546 .wakeup = true,
547};
548
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900549
550enum fixed_regulator_id {
551 FIXED_REG_ID_MMC0,
552 FIXED_REG_ID_HDMI_5V,
553 FIXED_REG_ID_CAM_S_IF,
554 FIXED_REG_ID_CAM_I_CORE,
555 FIXED_REG_ID_CAM_VT_DIO,
556};
557
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900558static struct regulator_consumer_supply hdmi_fixed_consumer =
559 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
560
561static struct regulator_init_data hdmi_fixed_voltage_init_data = {
562 .constraints = {
563 .name = "HDMI_5V",
564 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
565 },
566 .num_consumer_supplies = 1,
567 .consumer_supplies = &hdmi_fixed_consumer,
568};
569
570static struct fixed_voltage_config hdmi_fixed_voltage_config = {
571 .supply_name = "HDMI_EN1",
572 .microvolts = 5000000,
573 .gpio = EXYNOS4_GPE0(1),
574 .enable_high = true,
575 .init_data = &hdmi_fixed_voltage_init_data,
576};
577
578static struct platform_device hdmi_fixed_voltage = {
579 .name = "reg-fixed-voltage",
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900580 .id = FIXED_REG_ID_HDMI_5V,
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900581 .dev = {
582 .platform_data = &hdmi_fixed_voltage_config,
583 },
584};
585
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900586/* GPIO I2C 5 (PMIC) */
587static struct i2c_board_info i2c5_devs[] __initdata = {
588 {
589 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
590 .platform_data = &universal_max8952_pdata,
591 }, {
592 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
593 .platform_data = &universal_lp3974_pdata,
594 },
595};
596
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900597/* I2C3 (TSP) */
598static struct mxt_platform_data qt602240_platform_data = {
599 .x_line = 19,
600 .y_line = 11,
601 .x_size = 800,
602 .y_size = 480,
603 .blen = 0x11,
604 .threshold = 0x28,
605 .voltage = 2800000, /* 2.8V */
606 .orient = MXT_DIAGONAL,
607};
608
609static struct i2c_board_info i2c3_devs[] __initdata = {
610 {
611 I2C_BOARD_INFO("qt602240_ts", 0x4a),
612 .platform_data = &qt602240_platform_data,
613 },
614};
615
616static void __init universal_tsp_init(void)
617{
618 int gpio;
619
620 /* TSP_LDO_ON: XMDMADDR_11 */
621 gpio = EXYNOS4_GPE2(3);
Jingoo Han321655e2011-12-24 11:58:32 +0900622 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900623 gpio_export(gpio, 0);
624
625 /* TSP_INT: XMDMADDR_7 */
626 gpio = EXYNOS4_GPE1(7);
627 gpio_request(gpio, "TSP_INT");
628
629 s5p_register_gpio_interrupt(gpio);
630 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
631 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
632 i2c3_devs[0].irq = gpio_to_irq(gpio);
633}
634
635
Marek Szyprowskib908af42011-06-22 13:43:39 +0900636/* GPIO I2C 12 (3 Touchkey) */
637static uint32_t touchkey_keymap[] = {
638 /* MCS_KEY_MAP(value, keycode) */
639 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
640 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
641};
642
643static struct mcs_platform_data touchkey_data = {
644 .keymap = touchkey_keymap,
645 .keymap_size = ARRAY_SIZE(touchkey_keymap),
646 .key_maxval = 2,
647};
648
649/* GPIO I2C 3_TOUCH 2.8V */
650#define I2C_GPIO_BUS_12 12
651static struct i2c_gpio_platform_data i2c_gpio12_data = {
652 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
653 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
654};
655
656static struct platform_device i2c_gpio12 = {
657 .name = "i2c-gpio",
658 .id = I2C_GPIO_BUS_12,
659 .dev = {
660 .platform_data = &i2c_gpio12_data,
661 },
662};
663
664static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
665 {
666 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
667 .platform_data = &touchkey_data,
668 },
669};
670
671static void __init universal_touchkey_init(void)
672{
673 int gpio;
674
675 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
676 gpio_request(gpio, "3_TOUCH_INT");
677 s5p_register_gpio_interrupt(gpio);
678 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
679 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
680
681 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
Jingoo Han321655e2011-12-24 11:58:32 +0900682 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
Marek Szyprowskib908af42011-06-22 13:43:39 +0900683}
684
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900685static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
686 .frequency = 300 * 1000,
687 .sda_delay = 200,
688};
689
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900690/* GPIO KEYS */
Kyungmin Park34d79312010-08-21 09:49:49 +0900691static struct gpio_keys_button universal_gpio_keys_tables[] = {
692 {
693 .code = KEY_VOLUMEUP,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900694 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900695 .desc = "gpio-keys: KEY_VOLUMEUP",
696 .type = EV_KEY,
697 .active_low = 1,
698 .debounce_interval = 1,
699 }, {
700 .code = KEY_VOLUMEDOWN,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900701 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900702 .desc = "gpio-keys: KEY_VOLUMEDOWN",
703 .type = EV_KEY,
704 .active_low = 1,
705 .debounce_interval = 1,
706 }, {
707 .code = KEY_CONFIG,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900708 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900709 .desc = "gpio-keys: KEY_CONFIG",
710 .type = EV_KEY,
711 .active_low = 1,
712 .debounce_interval = 1,
713 }, {
714 .code = KEY_CAMERA,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900715 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900716 .desc = "gpio-keys: KEY_CAMERA",
717 .type = EV_KEY,
718 .active_low = 1,
719 .debounce_interval = 1,
720 }, {
721 .code = KEY_OK,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900722 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900723 .desc = "gpio-keys: KEY_OK",
724 .type = EV_KEY,
725 .active_low = 1,
726 .debounce_interval = 1,
727 },
728};
729
730static struct gpio_keys_platform_data universal_gpio_keys_data = {
731 .buttons = universal_gpio_keys_tables,
732 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
733};
734
735static struct platform_device universal_gpio_keys = {
736 .name = "gpio-keys",
737 .dev = {
738 .platform_data = &universal_gpio_keys_data,
739 },
740};
741
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900742/* eMMC */
743static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
744 .max_width = 8,
745 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
746 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
747 MMC_CAP_DISABLE),
748 .cd_type = S3C_SDHCI_CD_PERMANENT,
749 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
750};
751
752static struct regulator_consumer_supply mmc0_supplies[] = {
753 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
754};
755
756static struct regulator_init_data mmc0_fixed_voltage_init_data = {
757 .constraints = {
758 .name = "VMEM_VDD_2.8V",
759 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
760 },
761 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
762 .consumer_supplies = mmc0_supplies,
763};
764
765static struct fixed_voltage_config mmc0_fixed_voltage_config = {
766 .supply_name = "MASSMEMORY_EN",
767 .microvolts = 2800000,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900768 .gpio = EXYNOS4_GPE1(3),
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900769 .enable_high = true,
770 .init_data = &mmc0_fixed_voltage_init_data,
771};
772
773static struct platform_device mmc0_fixed_voltage = {
774 .name = "reg-fixed-voltage",
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900775 .id = FIXED_REG_ID_MMC0,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900776 .dev = {
777 .platform_data = &mmc0_fixed_voltage_config,
778 },
779};
780
781/* SD */
782static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
783 .max_width = 4,
784 .host_caps = MMC_CAP_4_BIT_DATA |
785 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
786 MMC_CAP_DISABLE,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900787 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900788 .ext_cd_gpio_invert = 1,
789 .cd_type = S3C_SDHCI_CD_GPIO,
790 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
791};
792
793/* WiFi */
794static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
795 .max_width = 4,
796 .host_caps = MMC_CAP_4_BIT_DATA |
797 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
798 MMC_CAP_DISABLE,
799 .cd_type = S3C_SDHCI_CD_EXTERNAL,
800};
801
802static void __init universal_sdhci_init(void)
803{
804 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
805 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
806 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
807}
808
Kyungmin Park3b7998f2010-10-08 22:34:56 +0900809/* I2C1 */
810static struct i2c_board_info i2c1_devs[] __initdata = {
811 /* Gyro, To be updated */
812};
813
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900814/* Frame Buffer */
815static struct s3c_fb_pd_win universal_fb_win0 = {
816 .win_mode = {
817 .left_margin = 16,
818 .right_margin = 16,
819 .upper_margin = 2,
820 .lower_margin = 28,
821 .hsync_len = 2,
822 .vsync_len = 1,
823 .xres = 480,
824 .yres = 800,
825 .refresh = 55,
826 },
827 .max_bpp = 32,
828 .default_bpp = 16,
Sylwester Nawrockibcd7bd32012-01-31 13:26:54 +0900829 .virtual_x = 480,
830 .virtual_y = 2 * 800,
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900831};
832
833static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
834 .win[0] = &universal_fb_win0,
835 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
836 VIDCON0_CLKSEL_LCD,
837 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
838 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
839 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
840};
841
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900842static struct regulator_consumer_supply cam_vt_dio_supply =
843 REGULATOR_SUPPLY("vdd_core", "0-003c");
844
845static struct regulator_init_data cam_vt_dio_reg_init_data = {
846 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
847 .num_consumer_supplies = 1,
848 .consumer_supplies = &cam_vt_dio_supply,
849};
850
851static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
852 .supply_name = "CAM_VT_D_IO",
853 .microvolts = 2800000,
854 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
855 .enable_high = 1,
856 .init_data = &cam_vt_dio_reg_init_data,
857};
858
859static struct platform_device cam_vt_dio_fixed_reg_dev = {
860 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
861 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
862};
863
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900864static struct regulator_consumer_supply cam_i_core_supply =
865 REGULATOR_SUPPLY("core", "0-001f");
866
867static struct regulator_init_data cam_i_core_reg_init_data = {
868 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
869 .num_consumer_supplies = 1,
870 .consumer_supplies = &cam_i_core_supply,
871};
872
873static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
874 .supply_name = "CAM_I_CORE_1.2V",
875 .microvolts = 1200000,
876 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
877 .enable_high = 1,
878 .init_data = &cam_i_core_reg_init_data,
879};
880
881static struct platform_device cam_i_core_fixed_reg_dev = {
882 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
883 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
884};
885
886static struct regulator_consumer_supply cam_s_if_supply =
887 REGULATOR_SUPPLY("d_sensor", "0-001f");
888
889static struct regulator_init_data cam_s_if_reg_init_data = {
890 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
891 .num_consumer_supplies = 1,
892 .consumer_supplies = &cam_s_if_supply,
893};
894
895static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
896 .supply_name = "CAM_S_IF_1.8V",
897 .microvolts = 1800000,
898 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
899 .enable_high = 1,
900 .init_data = &cam_s_if_reg_init_data,
901};
902
903static struct platform_device cam_s_if_fixed_reg_dev = {
904 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
905 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
906};
907
908static struct s5p_platform_mipi_csis mipi_csis_platdata = {
909 .clk_rate = 166000000UL,
910 .lanes = 2,
911 .alignment = 32,
912 .hs_settle = 12,
913 .phy_enable = s5p_csis_phy_enable,
914};
915
916#define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
917#define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
918#define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900919#define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
920#define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
921
922static int s5k6aa_set_power(int on)
923{
924 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
925 return 0;
926}
927
928static struct s5k6aa_platform_data s5k6aa_platdata = {
929 .mclk_frequency = 21600000UL,
930 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
931 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
932 .bus_type = V4L2_MBUS_PARALLEL,
933 .horiz_flip = 1,
934 .set_power = s5k6aa_set_power,
935};
936
937static struct i2c_board_info s5k6aa_board_info = {
938 I2C_BOARD_INFO("S5K6AA", 0x3C),
939 .platform_data = &s5k6aa_platdata,
940};
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900941
942static int m5mols_set_power(struct device *dev, int on)
943{
944 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
945 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
946 return 0;
947}
948
949static struct m5mols_platform_data m5mols_platdata = {
950 .gpio_reset = GPIO_CAM_MEGA_nRST,
951 .reset_polarity = 0,
952 .set_power = m5mols_set_power,
953};
954
955static struct i2c_board_info m5mols_board_info = {
956 I2C_BOARD_INFO("M5MOLS", 0x1F),
957 .platform_data = &m5mols_platdata,
958};
959
960static struct s5p_fimc_isp_info universal_camera_sensors[] = {
961 {
962 .mux_id = 0,
963 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
964 V4L2_MBUS_VSYNC_ACTIVE_LOW,
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900965 .bus_type = FIMC_ITU_601,
966 .board_info = &s5k6aa_board_info,
967 .i2c_bus_num = 0,
968 .clk_frequency = 24000000UL,
969 }, {
970 .mux_id = 0,
971 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
972 V4L2_MBUS_VSYNC_ACTIVE_LOW,
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900973 .bus_type = FIMC_MIPI_CSI2,
974 .board_info = &m5mols_board_info,
975 .i2c_bus_num = 0,
976 .clk_frequency = 21600000UL,
977 .csi_data_align = 32,
978 },
979};
980
981static struct s5p_platform_fimc fimc_md_platdata = {
982 .isp_info = universal_camera_sensors,
983 .num_clients = ARRAY_SIZE(universal_camera_sensors),
984};
985
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900986static struct gpio universal_camera_gpios[] = {
987 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
988 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
989 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
990 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +0900991 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
992 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900993};
994
Tushar Behera6325fc42012-03-09 08:02:37 -0800995static void __init universal_camera_init(void)
Sylwester Nawrocki05132182011-09-27 07:18:55 +0900996{
997 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
998 &s5p_device_mipi_csis0);
999 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1000 &s5p_device_fimc_md);
1001
1002 if (gpio_request_array(universal_camera_gpios,
1003 ARRAY_SIZE(universal_camera_gpios))) {
1004 pr_err("%s: GPIO request failed\n", __func__);
1005 return;
1006 }
1007
1008 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1009 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1010 else
1011 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1012
1013 /* Free GPIOs controlled directly by the sensor drivers. */
1014 gpio_free(GPIO_CAM_MEGA_nRST);
1015 gpio_free(GPIO_CAM_8M_ISP_INT);
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +09001016 gpio_free(GPIO_CAM_VGA_NRST);
1017 gpio_free(GPIO_CAM_VGA_NSTBY);
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001018
1019 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1020 pr_err("Camera port A setup failed\n");
1021}
1022
Kyungmin Park34d79312010-08-21 09:49:49 +09001023static struct platform_device *universal_devices[] __initdata = {
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001024 /* Samsung Platform Devices */
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001025 &s5p_device_mipi_csis0,
Marek Szyprowskiedd967b2011-06-22 13:43:39 +09001026 &s5p_device_fimc0,
1027 &s5p_device_fimc1,
1028 &s5p_device_fimc2,
1029 &s5p_device_fimc3,
Kamil Debski2cd11b02011-12-27 17:16:50 +09001030 &s5p_device_g2d,
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001031 &mmc0_fixed_voltage,
1032 &s3c_device_hsmmc0,
1033 &s3c_device_hsmmc2,
1034 &s3c_device_hsmmc3,
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001035 &s3c_device_i2c0,
Marek Szyprowski0b398b62011-06-22 13:43:39 +09001036 &s3c_device_i2c3,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +09001037 &s3c_device_i2c5,
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001038 &s5p_device_i2c_hdmiphy,
1039 &hdmi_fixed_voltage,
1040 &exynos4_device_pd[PD_TV],
1041 &s5p_device_hdmi,
1042 &s5p_device_sdo,
1043 &s5p_device_mixer,
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001044
1045 /* Universal Devices */
Marek Szyprowskib908af42011-06-22 13:43:39 +09001046 &i2c_gpio12,
Kyungmin Park34d79312010-08-21 09:49:49 +09001047 &universal_gpio_keys,
Kyungmin Parkacf5eda2010-10-08 22:34:52 +09001048 &s5p_device_onenand,
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +09001049 &s5p_device_fimd0,
Kamil Debskib14f04d2011-07-21 16:43:20 +09001050 &s5p_device_mfc,
1051 &s5p_device_mfc_l,
1052 &s5p_device_mfc_r,
1053 &exynos4_device_pd[PD_MFC],
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +09001054 &exynos4_device_pd[PD_LCD0],
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001055 &exynos4_device_pd[PD_CAM],
Sylwester Nawrocki9c01c962012-01-31 13:26:58 +09001056 &cam_vt_dio_fixed_reg_dev,
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001057 &cam_i_core_fixed_reg_dev,
1058 &cam_s_if_fixed_reg_dev,
1059 &s5p_device_fimc_md,
Kyungmin Park34d79312010-08-21 09:49:49 +09001060};
1061
Kyungmin Park516607d2010-08-06 19:59:21 +09001062static void __init universal_map_io(void)
1063{
Kukjin Kimcc511b82011-12-27 08:18:36 +01001064 exynos_init_io(NULL, 0);
Kyungmin Park516607d2010-08-06 19:59:21 +09001065 s3c24xx_init_clocks(24000000);
1066 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1067}
1068
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001069void s5p_tv_setup(void)
1070{
1071 /* direct HPD to HDMI chip */
Jingoo Han321655e2011-12-24 11:58:32 +09001072 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001073 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1074 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1075
1076 /* setup dependencies between TV devices */
1077 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
1078 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
1079}
1080
Kamil Debskib14f04d2011-07-21 16:43:20 +09001081static void __init universal_reserve(void)
1082{
1083 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1084}
1085
Kyungmin Park516607d2010-08-06 19:59:21 +09001086static void __init universal_machine_init(void)
1087{
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001088 universal_sdhci_init();
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001089 s5p_tv_setup();
Kyungmin Parka8928ce2010-12-22 13:34:23 +09001090
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001091 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
Kyungmin Park3b7998f2010-10-08 22:34:56 +09001092 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1093
Marek Szyprowski0b398b62011-06-22 13:43:39 +09001094 universal_tsp_init();
1095 s3c_i2c3_set_platdata(NULL);
1096 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1097
Marek Szyprowski4d838ec2011-03-04 10:19:52 +09001098 s3c_i2c5_set_platdata(NULL);
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +09001099 s5p_i2c_hdmiphy_set_platdata(NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +09001100 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1101
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +09001102 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1103
Marek Szyprowskib908af42011-06-22 13:43:39 +09001104 universal_touchkey_init();
1105 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1106 ARRAY_SIZE(i2c_gpio12_devs));
1107
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001108 universal_camera_init();
1109
Kyungmin Park34d79312010-08-21 09:49:49 +09001110 /* Last */
1111 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001112
Kamil Debskib14f04d2011-07-21 16:43:20 +09001113 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +09001114 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
Sylwester Nawrocki05132182011-09-27 07:18:55 +09001115
1116 s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1117 s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1118 s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1119 s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1120 s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
Kyungmin Park516607d2010-08-06 19:59:21 +09001121}
1122
1123MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1124 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
Nicolas Pitre2be5a4a2011-07-05 22:38:11 -04001125 .atag_offset = 0x100,
Kukjin Kimd11135c2011-02-14 14:59:52 +09001126 .init_irq = exynos4_init_irq,
Kyungmin Park516607d2010-08-06 19:59:21 +09001127 .map_io = universal_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +01001128 .handle_irq = gic_handle_irq,
Kyungmin Park516607d2010-08-06 19:59:21 +09001129 .init_machine = universal_machine_init,
Kukjin Kimd11135c2011-02-14 14:59:52 +09001130 .timer = &exynos4_timer,
Kamil Debskib14f04d2011-07-21 16:43:20 +09001131 .reserve = &universal_reserve,
Russell King9eb48592012-01-03 11:56:53 +01001132 .restart = exynos4_restart,
Kyungmin Park516607d2010-08-06 19:59:21 +09001133MACHINE_END