Srinivas Kandagatla | 65ebcc1 | 2013-06-25 12:15:10 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2013 STMicroelectronics (R&D) Limited. |
| 3 | * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * publishhed by the Free Software Foundation. |
| 8 | */ |
| 9 | #include "stih41x.dtsi" |
| 10 | #include "stih415-clock.dtsi" |
| 11 | #include "stih415-pinctrl.dtsi" |
| 12 | / { |
| 13 | |
| 14 | L2: cache-controller { |
| 15 | compatible = "arm,pl310-cache"; |
| 16 | reg = <0xfffe2000 0x1000>; |
| 17 | arm,data-latency = <3 2 2>; |
| 18 | arm,tag-latency = <1 1 1>; |
| 19 | cache-unified; |
| 20 | cache-level = <2>; |
| 21 | }; |
| 22 | |
| 23 | soc { |
| 24 | #address-cells = <1>; |
| 25 | #size-cells = <1>; |
| 26 | interrupt-parent = <&intc>; |
| 27 | ranges; |
| 28 | compatible = "simple-bus"; |
| 29 | |
| 30 | syscfg_sbc: sbc-syscfg@fe600000{ |
| 31 | compatible = "st,stih415-sbc-syscfg", "syscon"; |
| 32 | reg = <0xfe600000 0xb4>; |
| 33 | }; |
| 34 | |
| 35 | syscfg_front: front-syscfg@fee10000{ |
| 36 | compatible = "st,stih415-front-syscfg", "syscon"; |
| 37 | reg = <0xfee10000 0x194>; |
| 38 | }; |
| 39 | |
| 40 | syscfg_rear: rear-syscfg@fe830000{ |
| 41 | compatible = "st,stih415-rear-syscfg", "syscon"; |
| 42 | reg = <0xfe830000 0x190>; |
| 43 | }; |
| 44 | |
| 45 | /* MPE syscfgs */ |
| 46 | syscfg_left: left-syscfg@fd690000{ |
| 47 | compatible = "st,stih415-left-syscfg", "syscon"; |
| 48 | reg = <0xfd690000 0x78>; |
| 49 | }; |
| 50 | |
| 51 | syscfg_right: right-syscfg@fd320000{ |
| 52 | compatible = "st,stih415-right-syscfg", "syscon"; |
| 53 | reg = <0xfd320000 0x180>; |
| 54 | }; |
| 55 | |
| 56 | syscfg_system: system-syscfg@fdde0000 { |
| 57 | compatible = "st,stih415-system-syscfg", "syscon"; |
| 58 | reg = <0xfdde0000 0x15c>; |
| 59 | }; |
| 60 | |
| 61 | syscfg_lpm: lpm-syscfg@fe4b5100{ |
| 62 | compatible = "st,stih415-lpm-syscfg", "syscon"; |
| 63 | reg = <0xfe4b5100 0x08>; |
| 64 | }; |
| 65 | |
| 66 | serial2: serial@fed32000 { |
| 67 | compatible = "st,asc"; |
| 68 | status = "disabled"; |
| 69 | reg = <0xfed32000 0x2c>; |
| 70 | interrupts = <0 197 0>; |
| 71 | pinctrl-names = "default"; |
| 72 | pinctrl-0 = <&pinctrl_serial2>; |
| 73 | clocks = <&CLKS_ICN_REG_0>; |
| 74 | }; |
| 75 | |
| 76 | /* SBC comms block ASCs in SASG1 */ |
| 77 | sbc_serial1: serial@fe531000 { |
| 78 | compatible = "st,asc"; |
| 79 | status = "disabled"; |
| 80 | reg = <0xfe531000 0x2c>; |
| 81 | interrupts = <0 210 0>; |
| 82 | clocks = <&CLK_SYSIN>; |
| 83 | pinctrl-names = "default"; |
| 84 | pinctrl-0 = <&pinctrl_sbc_serial1>; |
| 85 | }; |
| 86 | }; |
| 87 | }; |