John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify it |
| 3 | * under the terms of the GNU General Public License version 2 as published |
| 4 | * by the Free Software Foundation. |
| 5 | * |
| 6 | * Copyright (C) 2010 John Crispin <blogic@openwrt.org> |
| 7 | */ |
| 8 | |
| 9 | #include <linux/init.h> |
| 10 | #include <linux/io.h> |
| 11 | #include <linux/ioport.h> |
| 12 | #include <linux/pm.h> |
John Crispin | 4af92e7 | 2011-11-10 21:33:07 +0100 | [diff] [blame] | 13 | #include <linux/export.h> |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 14 | #include <linux/delay.h> |
| 15 | #include <linux/of_address.h> |
| 16 | #include <linux/of_platform.h> |
| 17 | |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 18 | #include <asm/reboot.h> |
| 19 | |
| 20 | #include <lantiq_soc.h> |
| 21 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 22 | #include "../prom.h" |
| 23 | |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 24 | #define ltq_rcu_w32(x, y) ltq_w32((x), ltq_rcu_membase + (y)) |
| 25 | #define ltq_rcu_r32(x) ltq_r32(ltq_rcu_membase + (x)) |
| 26 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 27 | /* reset request register */ |
| 28 | #define RCU_RST_REQ 0x0010 |
| 29 | /* reset status register */ |
| 30 | #define RCU_RST_STAT 0x0014 |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 31 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 32 | /* reboot bit */ |
| 33 | #define RCU_RD_SRST BIT(30) |
| 34 | /* reset cause */ |
| 35 | #define RCU_STAT_SHIFT 26 |
| 36 | /* boot selection */ |
| 37 | #define RCU_BOOT_SEL_SHIFT 26 |
| 38 | #define RCU_BOOT_SEL_MASK 0x7 |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 39 | |
| 40 | static struct resource ltq_rcu_resource = { |
| 41 | .name = "rcu", |
| 42 | .start = LTQ_RCU_BASE_ADDR, |
| 43 | .end = LTQ_RCU_BASE_ADDR + LTQ_RCU_SIZE - 1, |
| 44 | .flags = IORESOURCE_MEM, |
| 45 | }; |
| 46 | |
| 47 | /* remapped base addr of the reset control unit */ |
| 48 | static void __iomem *ltq_rcu_membase; |
| 49 | |
| 50 | /* This function is used by the watchdog driver */ |
| 51 | int ltq_reset_cause(void) |
| 52 | { |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 53 | u32 val = ltq_rcu_r32(RCU_RST_STAT); |
| 54 | return val >> RCU_STAT_SHIFT; |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 55 | } |
| 56 | EXPORT_SYMBOL_GPL(ltq_reset_cause); |
| 57 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 58 | /* allow platform code to find out what source we booted from */ |
| 59 | unsigned char ltq_boot_select(void) |
| 60 | { |
| 61 | u32 val = ltq_rcu_r32(RCU_RST_STAT); |
| 62 | return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK; |
| 63 | } |
| 64 | |
| 65 | /* reset a io domain for u micro seconds */ |
| 66 | void ltq_reset_once(unsigned int module, ulong u) |
| 67 | { |
| 68 | ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ); |
| 69 | udelay(u); |
| 70 | ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ); |
| 71 | } |
| 72 | |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 73 | static void ltq_machine_restart(char *command) |
| 74 | { |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 75 | local_irq_disable(); |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 76 | ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | RCU_RD_SRST, RCU_RST_REQ); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 77 | unreachable(); |
| 78 | } |
| 79 | |
| 80 | static void ltq_machine_halt(void) |
| 81 | { |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 82 | local_irq_disable(); |
| 83 | unreachable(); |
| 84 | } |
| 85 | |
| 86 | static void ltq_machine_power_off(void) |
| 87 | { |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 88 | local_irq_disable(); |
| 89 | unreachable(); |
| 90 | } |
| 91 | |
| 92 | static int __init mips_reboot_setup(void) |
| 93 | { |
| 94 | /* insert and request the memory region */ |
| 95 | if (insert_resource(&iomem_resource, <q_rcu_resource) < 0) |
Ralf Baechle | ab75dc0 | 2011-11-17 15:07:31 +0000 | [diff] [blame] | 96 | panic("Failed to insert rcu memory"); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 97 | |
| 98 | if (request_mem_region(ltq_rcu_resource.start, |
| 99 | resource_size(<q_rcu_resource), "rcu") < 0) |
Ralf Baechle | ab75dc0 | 2011-11-17 15:07:31 +0000 | [diff] [blame] | 100 | panic("Failed to request rcu memory"); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 101 | |
| 102 | /* remap rcu register range */ |
| 103 | ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start, |
| 104 | resource_size(<q_rcu_resource)); |
| 105 | if (!ltq_rcu_membase) |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame^] | 106 | panic("Failed to remap core memory"); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 107 | |
| 108 | _machine_restart = ltq_machine_restart; |
| 109 | _machine_halt = ltq_machine_halt; |
| 110 | pm_power_off = ltq_machine_power_off; |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | |
| 115 | arch_initcall(mips_reboot_setup); |