blob: 2623f3bde3f9040c85d853a035bb548664aecb28 [file] [log] [blame]
Kukjin Kimbe4ab362011-08-24 17:25:09 +09001/*
Changhwan Youn31451af2011-10-04 17:09:26 +09002 * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
Kukjin Kimbe4ab362011-08-24 17:25:09 +09003 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/input.h>
15#include <linux/io.h>
Sachin Kamat6bba0ca2012-07-13 18:58:53 +090016#include <linux/lcd.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090017#include <linux/mfd/max8997.h>
18#include <linux/mmc/host.h>
19#include <linux/platform_device.h>
20#include <linux/pwm_backlight.h>
21#include <linux/regulator/machine.h>
22#include <linux/serial_core.h>
Sachin Kamata17b9852012-07-13 18:41:31 +090023#include <linux/platform_data/s3c-hsotg.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090024
25#include <asm/mach/arch.h>
Marc Zyngier4e44d2c2011-05-30 11:04:53 +010026#include <asm/hardware/gic.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090027#include <asm/mach-types.h>
28
29#include <plat/backlight.h>
30#include <plat/clock.h>
31#include <plat/cpu.h>
32#include <plat/devs.h>
Sachin Kamat6bba0ca2012-07-13 18:58:53 +090033#include <plat/fb.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090034#include <plat/gpio-cfg.h>
35#include <plat/iic.h>
36#include <plat/keypad.h>
Sachin Kamat691bcb32012-05-12 16:36:19 +090037#include <plat/mfc.h>
Sachin Kamat6bba0ca2012-07-13 18:58:53 +090038#include <plat/regs-fb.h>
Kukjin Kimbe4ab362011-08-24 17:25:09 +090039#include <plat/regs-serial.h>
40#include <plat/sdhci.h>
41
42#include <mach/map.h>
43
Kukjin Kimcc511b82011-12-27 08:18:36 +010044#include "common.h"
45
Kukjin Kimbe4ab362011-08-24 17:25:09 +090046/* Following are default values for UCON, ULCON and UFCON UART registers */
Changhwan Youn31451af2011-10-04 17:09:26 +090047#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090048 S3C2410_UCON_RXILEVEL | \
49 S3C2410_UCON_TXIRQMODE | \
50 S3C2410_UCON_RXIRQMODE | \
51 S3C2410_UCON_RXFIFO_TOI | \
52 S3C2443_UCON_RXERR_IRQEN)
53
Changhwan Youn31451af2011-10-04 17:09:26 +090054#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
Kukjin Kimbe4ab362011-08-24 17:25:09 +090055
Changhwan Youn31451af2011-10-04 17:09:26 +090056#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
Kukjin Kimbe4ab362011-08-24 17:25:09 +090057 S5PV210_UFCON_TXTRIG4 | \
58 S5PV210_UFCON_RXTRIG4)
59
Changhwan Youn31451af2011-10-04 17:09:26 +090060static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090061 [0] = {
62 .hwport = 0,
63 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090064 .ucon = SMDK4X12_UCON_DEFAULT,
65 .ulcon = SMDK4X12_ULCON_DEFAULT,
66 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090067 },
68 [1] = {
69 .hwport = 1,
70 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090071 .ucon = SMDK4X12_UCON_DEFAULT,
72 .ulcon = SMDK4X12_ULCON_DEFAULT,
73 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090074 },
75 [2] = {
76 .hwport = 2,
77 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090078 .ucon = SMDK4X12_UCON_DEFAULT,
79 .ulcon = SMDK4X12_ULCON_DEFAULT,
80 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090081 },
82 [3] = {
83 .hwport = 3,
84 .flags = 0,
Changhwan Youn31451af2011-10-04 17:09:26 +090085 .ucon = SMDK4X12_UCON_DEFAULT,
86 .ulcon = SMDK4X12_ULCON_DEFAULT,
87 .ufcon = SMDK4X12_UFCON_DEFAULT,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090088 },
89};
90
Changhwan Youn31451af2011-10-04 17:09:26 +090091static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +090092 .cd_type = S3C_SDHCI_CD_INTERNAL,
Kukjin Kimbe4ab362011-08-24 17:25:09 +090093#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
94 .max_width = 8,
95 .host_caps = MMC_CAP_8_BIT_DATA,
96#endif
97};
98
Changhwan Youn31451af2011-10-04 17:09:26 +090099static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900100 .cd_type = S3C_SDHCI_CD_INTERNAL,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900101};
102
103static struct regulator_consumer_supply max8997_buck1 =
104 REGULATOR_SUPPLY("vdd_arm", NULL);
105
106static struct regulator_consumer_supply max8997_buck2 =
107 REGULATOR_SUPPLY("vdd_int", NULL);
108
109static struct regulator_consumer_supply max8997_buck3 =
110 REGULATOR_SUPPLY("vdd_g3d", NULL);
111
112static struct regulator_init_data max8997_buck1_data = {
113 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900114 .name = "VDD_ARM_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900115 .min_uV = 925000,
116 .max_uV = 1350000,
117 .always_on = 1,
118 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
119 .state_mem = {
120 .disabled = 1,
121 },
122 },
123 .num_consumer_supplies = 1,
124 .consumer_supplies = &max8997_buck1,
125};
126
127static struct regulator_init_data max8997_buck2_data = {
128 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900129 .name = "VDD_INT_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900130 .min_uV = 950000,
131 .max_uV = 1150000,
132 .always_on = 1,
133 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
134 .state_mem = {
135 .disabled = 1,
136 },
137 },
138 .num_consumer_supplies = 1,
139 .consumer_supplies = &max8997_buck2,
140};
141
142static struct regulator_init_data max8997_buck3_data = {
143 .constraints = {
Changhwan Youn31451af2011-10-04 17:09:26 +0900144 .name = "VDD_G3D_SMDK4X12",
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900145 .min_uV = 950000,
146 .max_uV = 1150000,
147 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
148 REGULATOR_CHANGE_STATUS,
149 .state_mem = {
150 .disabled = 1,
151 },
152 },
153 .num_consumer_supplies = 1,
154 .consumer_supplies = &max8997_buck3,
155};
156
Changhwan Youn31451af2011-10-04 17:09:26 +0900157static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900158 { MAX8997_BUCK1, &max8997_buck1_data },
159 { MAX8997_BUCK2, &max8997_buck2_data },
160 { MAX8997_BUCK3, &max8997_buck3_data },
161};
162
Changhwan Youn31451af2011-10-04 17:09:26 +0900163static struct max8997_platform_data smdk4x12_max8997_pdata = {
164 .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
165 .regulators = smdk4x12_max8997_regulators,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900166
167 .buck1_voltage[0] = 1100000, /* 1.1V */
168 .buck1_voltage[1] = 1100000, /* 1.1V */
169 .buck1_voltage[2] = 1100000, /* 1.1V */
170 .buck1_voltage[3] = 1100000, /* 1.1V */
171 .buck1_voltage[4] = 1100000, /* 1.1V */
172 .buck1_voltage[5] = 1100000, /* 1.1V */
173 .buck1_voltage[6] = 1000000, /* 1.0V */
174 .buck1_voltage[7] = 950000, /* 0.95V */
175
176 .buck2_voltage[0] = 1100000, /* 1.1V */
177 .buck2_voltage[1] = 1000000, /* 1.0V */
178 .buck2_voltage[2] = 950000, /* 0.95V */
179 .buck2_voltage[3] = 900000, /* 0.9V */
180 .buck2_voltage[4] = 1100000, /* 1.1V */
181 .buck2_voltage[5] = 1000000, /* 1.0V */
182 .buck2_voltage[6] = 950000, /* 0.95V */
183 .buck2_voltage[7] = 900000, /* 0.9V */
184
185 .buck5_voltage[0] = 1100000, /* 1.1V */
186 .buck5_voltage[1] = 1100000, /* 1.1V */
187 .buck5_voltage[2] = 1100000, /* 1.1V */
188 .buck5_voltage[3] = 1100000, /* 1.1V */
189 .buck5_voltage[4] = 1100000, /* 1.1V */
190 .buck5_voltage[5] = 1100000, /* 1.1V */
191 .buck5_voltage[6] = 1100000, /* 1.1V */
192 .buck5_voltage[7] = 1100000, /* 1.1V */
193};
194
Changhwan Youn31451af2011-10-04 17:09:26 +0900195static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900196 {
197 I2C_BOARD_INFO("max8997", 0x66),
Changhwan Youn31451af2011-10-04 17:09:26 +0900198 .platform_data = &smdk4x12_max8997_pdata,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900199 }
200};
201
Changhwan Youn31451af2011-10-04 17:09:26 +0900202static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900203 { I2C_BOARD_INFO("wm8994", 0x1a), }
204};
205
Changhwan Youn31451af2011-10-04 17:09:26 +0900206static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900207 /* nothing here yet */
208};
209
Changhwan Youn31451af2011-10-04 17:09:26 +0900210static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900211 /* nothing here yet */
212};
213
Changhwan Youn31451af2011-10-04 17:09:26 +0900214static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900215 .no = EXYNOS4_GPD0(1),
216 .func = S3C_GPIO_SFN(2),
217};
218
Changhwan Youn31451af2011-10-04 17:09:26 +0900219static struct platform_pwm_backlight_data smdk4x12_bl_data = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900220 .pwm_id = 1,
221 .pwm_period_ns = 1000,
222};
223
Changhwan Youn31451af2011-10-04 17:09:26 +0900224static uint32_t smdk4x12_keymap[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900225 /* KEY(row, col, keycode) */
Sachin Kamat33fe1a42012-06-20 09:12:33 +0900226 KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3),
227 KEY(1, 6, KEY_4), KEY(1, 7, KEY_5),
228 KEY(2, 5, KEY_D), KEY(2, 6, KEY_A), KEY(2, 7, KEY_B),
229 KEY(0, 7, KEY_E), KEY(0, 5, KEY_C)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900230};
231
Changhwan Youn31451af2011-10-04 17:09:26 +0900232static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
233 .keymap = smdk4x12_keymap,
234 .keymap_size = ARRAY_SIZE(smdk4x12_keymap),
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900235};
236
Changhwan Youn31451af2011-10-04 17:09:26 +0900237static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
238 .keymap_data = &smdk4x12_keymap_data,
Sachin Kamat33fe1a42012-06-20 09:12:33 +0900239 .rows = 3,
240 .cols = 8,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900241};
242
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900243static struct s3c_fb_pd_win smdk4x12_fb_win0 = {
244 .xres = 480,
245 .yres = 800,
246 .virtual_x = 480,
247 .virtual_y = 800 * 2,
248 .max_bpp = 32,
249 .default_bpp = 24,
250};
251
252static struct fb_videomode smdk4x12_lcd_timing = {
253 .left_margin = 8,
254 .right_margin = 8,
255 .upper_margin = 6,
256 .lower_margin = 6,
257 .hsync_len = 6,
258 .vsync_len = 4,
259 .xres = 480,
260 .yres = 800,
261};
262
263static struct s3c_fb_platdata smdk4x12_lcd_pdata __initdata = {
264 .win[0] = &smdk4x12_fb_win0,
265 .vtiming = &smdk4x12_lcd_timing,
266 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
267 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
268 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
269};
270
Sachin Kamata17b9852012-07-13 18:41:31 +0900271/* USB OTG */
272static struct s3c_hsotg_plat smdk4x12_hsotg_pdata;
273
Changhwan Youn31451af2011-10-04 17:09:26 +0900274static struct platform_device *smdk4x12_devices[] __initdata = {
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900275 &s3c_device_hsmmc2,
276 &s3c_device_hsmmc3,
277 &s3c_device_i2c0,
278 &s3c_device_i2c1,
279 &s3c_device_i2c3,
280 &s3c_device_i2c7,
281 &s3c_device_rtc,
Sachin Kamata17b9852012-07-13 18:41:31 +0900282 &s3c_device_usb_hsotg,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900283 &s3c_device_wdt,
Sachin Kamat8e84e7d2012-05-12 16:36:22 +0900284 &s5p_device_fimc0,
285 &s5p_device_fimc1,
286 &s5p_device_fimc2,
287 &s5p_device_fimc3,
288 &s5p_device_fimc_md,
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900289 &s5p_device_fimd0,
Sachin Kamat691bcb32012-05-12 16:36:19 +0900290 &s5p_device_mfc,
291 &s5p_device_mfc_l,
292 &s5p_device_mfc_r,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900293 &samsung_device_keypad,
294};
295
Changhwan Youn31451af2011-10-04 17:09:26 +0900296static void __init smdk4x12_map_io(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900297{
298 clk_xusbxti.rate = 24000000;
299
Kukjin Kimcc511b82011-12-27 08:18:36 +0100300 exynos_init_io(NULL, 0);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900301 s3c24xx_init_clocks(clk_xusbxti.rate);
Changhwan Youn31451af2011-10-04 17:09:26 +0900302 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900303}
304
Sachin Kamat691bcb32012-05-12 16:36:19 +0900305static void __init smdk4x12_reserve(void)
306{
307 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
308}
309
Changhwan Youn31451af2011-10-04 17:09:26 +0900310static void __init smdk4x12_machine_init(void)
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900311{
312 s3c_i2c0_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900313 i2c_register_board_info(0, smdk4x12_i2c_devs0,
314 ARRAY_SIZE(smdk4x12_i2c_devs0));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900315
316 s3c_i2c1_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900317 i2c_register_board_info(1, smdk4x12_i2c_devs1,
318 ARRAY_SIZE(smdk4x12_i2c_devs1));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900319
320 s3c_i2c3_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900321 i2c_register_board_info(3, smdk4x12_i2c_devs3,
322 ARRAY_SIZE(smdk4x12_i2c_devs3));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900323
324 s3c_i2c7_set_platdata(NULL);
Changhwan Youn31451af2011-10-04 17:09:26 +0900325 i2c_register_board_info(7, smdk4x12_i2c_devs7,
326 ARRAY_SIZE(smdk4x12_i2c_devs7));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900327
Changhwan Youn31451af2011-10-04 17:09:26 +0900328 samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900329
Changhwan Youn31451af2011-10-04 17:09:26 +0900330 samsung_keypad_set_platdata(&smdk4x12_keypad_data);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900331
Changhwan Youn31451af2011-10-04 17:09:26 +0900332 s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
333 s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900334
Sachin Kamata17b9852012-07-13 18:41:31 +0900335 s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
336
Sachin Kamat6bba0ca2012-07-13 18:58:53 +0900337 s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata);
338
Changhwan Youn31451af2011-10-04 17:09:26 +0900339 platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900340}
341
342MACHINE_START(SMDK4212, "SMDK4212")
343 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
Changhwan Youn31451af2011-10-04 17:09:26 +0900344 .atag_offset = 0x100,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900345 .init_irq = exynos4_init_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900346 .map_io = smdk4x12_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100347 .handle_irq = gic_handle_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900348 .init_machine = smdk4x12_machine_init,
349 .timer = &exynos4_timer,
Russell King9eb48592012-01-03 11:56:53 +0100350 .restart = exynos4_restart,
Sachin Kamat691bcb32012-05-12 16:36:19 +0900351 .reserve = &smdk4x12_reserve,
Changhwan Youn31451af2011-10-04 17:09:26 +0900352MACHINE_END
353
354MACHINE_START(SMDK4412, "SMDK4412")
355 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
356 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
357 .atag_offset = 0x100,
358 .init_irq = exynos4_init_irq,
359 .map_io = smdk4x12_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100360 .handle_irq = gic_handle_irq,
Changhwan Youn31451af2011-10-04 17:09:26 +0900361 .init_machine = smdk4x12_machine_init,
Shawn Guobb13fab2012-04-26 10:35:40 +0800362 .init_late = exynos_init_late,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900363 .timer = &exynos4_timer,
Russell King9eb48592012-01-03 11:56:53 +0100364 .restart = exynos4_restart,
Sachin Kamat691bcb32012-05-12 16:36:19 +0900365 .reserve = &smdk4x12_reserve,
Kukjin Kimbe4ab362011-08-24 17:25:09 +0900366MACHINE_END