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review.evervolv.com / android_kernel_oneplus_msm8996 / 6bbb1370c3083190cae8487c2c61c0d24f869e68 / . / drivers / net / wireless / iwlegacy / 3945.h
blob: d65565f7c8712fc8419ec4b6ff07fa1b6ee2eb5d [file] [log] [blame]
Stanislaw Gruszka6bbb1372011-08-30 14:12:12 +0200[diff] [blame^]1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#ifndef __il_3945_h__
28#define __il_3945_h__
29
30#include <linux/pci.h> /* for struct pci_device_id */
31#include <linux/kernel.h>
32#include <net/ieee80211_radiotap.h>
33
34/* Hardware specific file defines the PCI IDs table for that hardware module */
35extern const struct pci_device_id il3945_hw_card_ids[];
36
37#include "iwl-csr.h"
38#include "iwl-prph.h"
39#include "iwl-fh.h"
40#include "iwl-debug.h"
41#include "iwl-power.h"
42#include "iwl-dev.h"
43#include "iwl-led.h"
44#include "iwl-eeprom.h"
45
46/* Highest firmware API version supported */
47#define IL3945_UCODE_API_MAX 2
48
49/* Lowest firmware API version supported */
50#define IL3945_UCODE_API_MIN 1
51
52#define IL3945_FW_PRE "iwlwifi-3945-"
53#define _IL3945_MODULE_FIRMWARE(api) IL3945_FW_PRE #api ".ucode"
54#define IL3945_MODULE_FIRMWARE(api) _IL3945_MODULE_FIRMWARE(api)
55
56/* Default noise level to report when noise measurement is not available.
57 * This may be because we're:
58 * 1) Not associated (4965, no beacon stats being sent to driver)
59 * 2) Scanning (noise measurement does not apply to associated channel)
60 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
61 * Use default noise value of -127 ... this is below the range of measurable
62 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
63 * Also, -127 works better than 0 when averaging frames with/without
64 * noise info (e.g. averaging might be done in app); measured dBm values are
65 * always negative ... using a negative value as the default keeps all
66 * averages within an s8's (used in some apps) range of negative values. */
67#define IL_NOISE_MEAS_NOT_AVAILABLE (-127)
68
69/* Module parameters accessible from iwl-*.c */
70extern struct il_mod_params il3945_mod_params;
71
72struct il3945_rate_scale_data {
73 u64 data;
74 s32 success_counter;
75 s32 success_ratio;
76 s32 counter;
77 s32 average_tpt;
78 unsigned long stamp;
79};
80
81struct il3945_rs_sta {
82 spinlock_t lock;
83 struct il_priv *il;
84 s32 *expected_tpt;
85 unsigned long last_partial_flush;
86 unsigned long last_flush;
87 u32 flush_time;
88 u32 last_tx_packets;
89 u32 tx_packets;
90 u8 tgg;
91 u8 flush_pending;
92 u8 start_rate;
93 struct timer_list rate_scale_flush;
94 struct il3945_rate_scale_data win[RATE_COUNT_3945];
95#ifdef CONFIG_MAC80211_DEBUGFS
96 struct dentry *rs_sta_dbgfs_stats_table_file;
97#endif
98
99 /* used to be in sta_info */
100 int last_txrate_idx;
101};
102
103
104/*
105 * The common struct MUST be first because it is shared between
106 * 3945 and 4965!
107 */
108struct il3945_sta_priv {
109 struct il_station_priv_common common;
110 struct il3945_rs_sta rs_sta;
111};
112
113enum il3945_antenna {
114 IL_ANTENNA_DIVERSITY,
115 IL_ANTENNA_MAIN,
116 IL_ANTENNA_AUX
117};
118
119/*
120 * RTS threshold here is total size [2347] minus 4 FCS bytes
121 * Per spec:
122 * a value of 0 means RTS on all data/management packets
123 * a value > max MSDU size means no RTS
124 * else RTS for data/management frames where MPDU is larger
125 * than RTS value.
126 */
127#define DEFAULT_RTS_THRESHOLD 2347U
128#define MIN_RTS_THRESHOLD 0U
129#define MAX_RTS_THRESHOLD 2347U
130#define MAX_MSDU_SIZE 2304U
131#define MAX_MPDU_SIZE 2346U
132#define DEFAULT_BEACON_INTERVAL 100U
133#define DEFAULT_SHORT_RETRY_LIMIT 7U
134#define DEFAULT_LONG_RETRY_LIMIT 4U
135
136#define IL_TX_FIFO_AC0 0
137#define IL_TX_FIFO_AC1 1
138#define IL_TX_FIFO_AC2 2
139#define IL_TX_FIFO_AC3 3
140#define IL_TX_FIFO_HCCA_1 5
141#define IL_TX_FIFO_HCCA_2 6
142#define IL_TX_FIFO_NONE 7
143
144#define IEEE80211_DATA_LEN 2304
145#define IEEE80211_4ADDR_LEN 30
146#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
147#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
148
149struct il3945_frame {
150 union {
151 struct ieee80211_hdr frame;
152 struct il3945_tx_beacon_cmd beacon;
153 u8 raw[IEEE80211_FRAME_LEN];
154 u8 cmd[360];
155 } u;
156 struct list_head list;
157};
158
159#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
160#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
161#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
162
163#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
164#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
165#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
166
167#define IL_SUPPORTED_RATES_IE_LEN 8
168
169#define SCAN_INTERVAL 100
170
171#define MAX_TID_COUNT 9
172
173#define IL_INVALID_RATE 0xFF
174#define IL_INVALID_VALUE -1
175
176#define STA_PS_STATUS_WAKE 0
177#define STA_PS_STATUS_SLEEP 1
178
179struct il3945_ibss_seq {
180 u8 mac[ETH_ALEN];
181 u16 seq_num;
182 u16 frag_num;
183 unsigned long packet_time;
184 struct list_head list;
185};
186
187#define IL_RX_HDR(x) ((struct il3945_rx_frame_hdr *)(\
188 x->u.rx_frame.stats.payload + \
189 x->u.rx_frame.stats.phy_count))
190#define IL_RX_END(x) ((struct il3945_rx_frame_end *)(\
191 IL_RX_HDR(x)->payload + \
192 le16_to_cpu(IL_RX_HDR(x)->len)))
193#define IL_RX_STATS(x) (&x->u.rx_frame.stats)
194#define IL_RX_DATA(x) (IL_RX_HDR(x)->payload)
195
196
197/******************************************************************************
198 *
199 * Functions implemented in iwl3945-base.c which are forward declared here
200 * for use by iwl-*.c
201 *
202 *****************************************************************************/
203extern int il3945_calc_db_from_ratio(int sig_ratio);
204extern void il3945_rx_replenish(void *data);
205extern void il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq);
206extern unsigned int il3945_fill_beacon_frame(struct il_priv *il,
207 struct ieee80211_hdr *hdr, int left);
208extern int il3945_dump_nic_event_log(struct il_priv *il, bool full_log,
209 char **buf, bool display);
210extern void il3945_dump_nic_error_log(struct il_priv *il);
211
212/******************************************************************************
213 *
214 * Functions implemented in iwl-[34]*.c which are forward declared here
215 * for use by iwl3945-base.c
216 *
217 * NOTE: The implementation of these functions are hardware specific
218 * which is why they are in the hardware specific files (vs. iwl-base.c)
219 *
220 * Naming convention --
221 * il3945_ <-- Its part of iwlwifi (should be changed to il3945_)
222 * il3945_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
223 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
224 * il3945_bg_ <-- Called from work queue context
225 * il3945_mac_ <-- mac80211 callback
226 *
227 ****************************************************************************/
228extern void il3945_hw_rx_handler_setup(struct il_priv *il);
229extern void il3945_hw_setup_deferred_work(struct il_priv *il);
230extern void il3945_hw_cancel_deferred_work(struct il_priv *il);
231extern int il3945_hw_rxq_stop(struct il_priv *il);
232extern int il3945_hw_set_hw_params(struct il_priv *il);
233extern int il3945_hw_nic_init(struct il_priv *il);
234extern int il3945_hw_nic_stop_master(struct il_priv *il);
235extern void il3945_hw_txq_ctx_free(struct il_priv *il);
236extern void il3945_hw_txq_ctx_stop(struct il_priv *il);
237extern int il3945_hw_nic_reset(struct il_priv *il);
238extern int il3945_hw_txq_attach_buf_to_tfd(struct il_priv *il,
239 struct il_tx_queue *txq,
240 dma_addr_t addr, u16 len,
241 u8 reset, u8 pad);
242extern void il3945_hw_txq_free_tfd(struct il_priv *il,
243 struct il_tx_queue *txq);
244extern int il3945_hw_get_temperature(struct il_priv *il);
245extern int il3945_hw_tx_queue_init(struct il_priv *il,
246 struct il_tx_queue *txq);
247extern unsigned int il3945_hw_get_beacon_cmd(struct il_priv *il,
248 struct il3945_frame *frame, u8 rate);
249void il3945_hw_build_tx_cmd_rate(struct il_priv *il,
250 struct il_device_cmd *cmd,
251 struct ieee80211_tx_info *info,
252 struct ieee80211_hdr *hdr,
253 int sta_id, int tx_id);
254extern int il3945_hw_reg_send_txpower(struct il_priv *il);
255extern int il3945_hw_reg_set_txpower(struct il_priv *il, s8 power);
256extern void il3945_hw_rx_stats(struct il_priv *il,
257 struct il_rx_buf *rxb);
258void il3945_reply_stats(struct il_priv *il,
259 struct il_rx_buf *rxb);
260extern void il3945_disable_events(struct il_priv *il);
261extern int il4965_get_temperature(const struct il_priv *il);
262extern void il3945_post_associate(struct il_priv *il);
263extern void il3945_config_ap(struct il_priv *il);
264
265extern int il3945_commit_rxon(struct il_priv *il,
266 struct il_rxon_context *ctx);
267
268/**
269 * il3945_hw_find_station - Find station id for a given BSSID
270 * @bssid: MAC address of station ID to find
271 *
272 * NOTE: This should not be hardware specific but the code has
273 * not yet been merged into a single common layer for managing the
274 * station tables.
275 */
276extern u8 il3945_hw_find_station(struct il_priv *il, const u8 *bssid);
277
278extern struct ieee80211_ops il3945_hw_ops;
279
280extern __le32 il3945_get_antenna_flags(const struct il_priv *il);
281extern int il3945_init_hw_rate_table(struct il_priv *il);
282extern void il3945_reg_txpower_periodic(struct il_priv *il);
283extern int il3945_txpower_set_from_eeprom(struct il_priv *il);
284
285extern const struct il_channel_info *il3945_get_channel_info(
286 const struct il_priv *il, enum ieee80211_band band, u16 channel);
287
288extern int il3945_rs_next_rate(struct il_priv *il, int rate);
289
290/* scanning */
291int il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif);
292void il3945_post_scan(struct il_priv *il);
293
294/* rates */
295extern const struct il3945_rate_info il3945_rates[RATE_COUNT_3945];
296
297
298
299/* RSSI to dBm */
300#define IL39_RSSI_OFFSET 95
301
302/*
303 * EEPROM related constants, enums, and structures.
304 */
305#define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7)
306
307/*
308 * Mapping of a Tx power level, at factory calibration temperature,
309 * to a radio/DSP gain table idx.
310 * One for each of 5 "sample" power levels in each band.
311 * v_det is measured at the factory, using the 3945's built-in power amplifier
312 * (PA) output voltage detector. This same detector is used during Tx of
313 * long packets in normal operation to provide feedback as to proper output
314 * level.
315 * Data copied from EEPROM.
316 * DO NOT ALTER THIS STRUCTURE!!!
317 */
318struct il3945_eeprom_txpower_sample {
319 u8 gain_idx; /* idx into power (gain) setup table ... */
320 s8 power; /* ... for this pwr level for this chnl group */
321 u16 v_det; /* PA output voltage */
322} __packed;
323
324/*
325 * Mappings of Tx power levels -> nominal radio/DSP gain table idxes.
326 * One for each channel group (a.k.a. "band") (1 for BG, 4 for A).
327 * Tx power setup code interpolates between the 5 "sample" power levels
328 * to determine the nominal setup for a requested power level.
329 * Data copied from EEPROM.
330 * DO NOT ALTER THIS STRUCTURE!!!
331 */
332struct il3945_eeprom_txpower_group {
333 struct il3945_eeprom_txpower_sample samples[5]; /* 5 power levels */
334 s32 a, b, c, d, e; /* coefficients for voltage->power
335 * formula (signed) */
336 s32 Fa, Fb, Fc, Fd, Fe; /* these modify coeffs based on
337 * frequency (signed) */
338 s8 saturation_power; /* highest power possible by h/w in this
339 * band */
340 u8 group_channel; /* "representative" channel # in this band */
341 s16 temperature; /* h/w temperature at factory calib this band
342 * (signed) */
343} __packed;
344
345/*
346 * Temperature-based Tx-power compensation data, not band-specific.
347 * These coefficients are use to modify a/b/c/d/e coeffs based on
348 * difference between current temperature and factory calib temperature.
349 * Data copied from EEPROM.
350 */
351struct il3945_eeprom_temperature_corr {
352 u32 Ta;
353 u32 Tb;
354 u32 Tc;
355 u32 Td;
356 u32 Te;
357} __packed;
358
359/*
360 * EEPROM map
361 */
362struct il3945_eeprom {
363 u8 reserved0[16];
364 u16 device_id; /* abs.ofs: 16 */
365 u8 reserved1[2];
366 u16 pmc; /* abs.ofs: 20 */
367 u8 reserved2[20];
368 u8 mac_address[6]; /* abs.ofs: 42 */
369 u8 reserved3[58];
370 u16 board_revision; /* abs.ofs: 106 */
371 u8 reserved4[11];
372 u8 board_pba_number[9]; /* abs.ofs: 119 */
373 u8 reserved5[8];
374 u16 version; /* abs.ofs: 136 */
375 u8 sku_cap; /* abs.ofs: 138 */
376 u8 leds_mode; /* abs.ofs: 139 */
377 u16 oem_mode;
378 u16 wowlan_mode; /* abs.ofs: 142 */
379 u16 leds_time_interval; /* abs.ofs: 144 */
380 u8 leds_off_time; /* abs.ofs: 146 */
381 u8 leds_on_time; /* abs.ofs: 147 */
382 u8 almgor_m_version; /* abs.ofs: 148 */
383 u8 antenna_switch_type; /* abs.ofs: 149 */
384 u8 reserved6[42];
385 u8 sku_id[4]; /* abs.ofs: 192 */
386
387/*
388 * Per-channel regulatory data.
389 *
390 * Each channel that *might* be supported by 3945 has a fixed location
391 * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory
392 * txpower (MSB).
393 *
394 * Entries immediately below are for 20 MHz channel width.
395 *
396 * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
397 */
398 u16 band_1_count; /* abs.ofs: 196 */
399 struct il_eeprom_channel band_1_channels[14]; /* abs.ofs: 198 */
400
401/*
402 * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196,
403 * 5.0 GHz channels 7, 8, 11, 12, 16
404 * (4915-5080MHz) (none of these is ever supported)
405 */
406 u16 band_2_count; /* abs.ofs: 226 */
407 struct il_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */
408
409/*
410 * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
411 * (5170-5320MHz)
412 */
413 u16 band_3_count; /* abs.ofs: 254 */
414 struct il_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */
415
416/*
417 * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
418 * (5500-5700MHz)
419 */
420 u16 band_4_count; /* abs.ofs: 280 */
421 struct il_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */
422
423/*
424 * 5.7 GHz channels 145, 149, 153, 157, 161, 165
425 * (5725-5825MHz)
426 */
427 u16 band_5_count; /* abs.ofs: 304 */
428 struct il_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */
429
430 u8 reserved9[194];
431
432/*
433 * 3945 Txpower calibration data.
434 */
435#define IL_NUM_TX_CALIB_GROUPS 5
436 struct il3945_eeprom_txpower_group groups[IL_NUM_TX_CALIB_GROUPS];
437/* abs.ofs: 512 */
438 struct il3945_eeprom_temperature_corr corrections; /* abs.ofs: 832 */
439 u8 reserved16[172]; /* fill out to full 1024 byte block */
440} __packed;
441
442#define IL3945_EEPROM_IMG_SIZE 1024
443
444/* End of EEPROM */
445
446#define PCI_CFG_REV_ID_BIT_BASIC_SKU (0x40) /* bit 6 */
447#define PCI_CFG_REV_ID_BIT_RTP (0x80) /* bit 7 */
448
449/* 4 DATA + 1 CMD. There are 2 HCCA queues that are not used. */
450#define IL39_NUM_QUEUES 5
451#define IL39_CMD_QUEUE_NUM 4
452
453#define IL_DEFAULT_TX_RETRY 15
454
455/*********************************************/
456
457#define RFD_SIZE 4
458#define NUM_TFD_CHUNKS 4
459
460#define RX_QUEUE_SIZE 256
461#define RX_QUEUE_MASK 255
462#define RX_QUEUE_SIZE_LOG 8
463
464#define TFD_CTL_COUNT_SET(n) (n << 24)
465#define TFD_CTL_COUNT_GET(ctl) ((ctl >> 24) & 7)
466#define TFD_CTL_PAD_SET(n) (n << 28)
467#define TFD_CTL_PAD_GET(ctl) (ctl >> 28)
468
469/* Sizes and addresses for instruction and data memory (SRAM) in
470 * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
471#define IL39_RTC_INST_LOWER_BOUND (0x000000)
472#define IL39_RTC_INST_UPPER_BOUND (0x014000)
473
474#define IL39_RTC_DATA_LOWER_BOUND (0x800000)
475#define IL39_RTC_DATA_UPPER_BOUND (0x808000)
476
477#define IL39_RTC_INST_SIZE (IL39_RTC_INST_UPPER_BOUND - \
478 IL39_RTC_INST_LOWER_BOUND)
479#define IL39_RTC_DATA_SIZE (IL39_RTC_DATA_UPPER_BOUND - \
480 IL39_RTC_DATA_LOWER_BOUND)
481
482#define IL39_MAX_INST_SIZE IL39_RTC_INST_SIZE
483#define IL39_MAX_DATA_SIZE IL39_RTC_DATA_SIZE
484
485/* Size of uCode instruction memory in bootstrap state machine */
486#define IL39_MAX_BSM_SIZE IL39_RTC_INST_SIZE
487
488static inline int il3945_hw_valid_rtc_data_addr(u32 addr)
489{
490 return (addr >= IL39_RTC_DATA_LOWER_BOUND &&
491 addr < IL39_RTC_DATA_UPPER_BOUND);
492}
493
494/* Base physical address of il3945_shared is provided to FH_TSSR_CBB_BASE
495 * and &il3945_shared.rx_read_ptr[0] is provided to FH_RCSR_RPTR_ADDR(0) */
496struct il3945_shared {
497 __le32 tx_base_ptr[8];
498} __packed;
499
500static inline u8 il3945_hw_get_rate(__le16 rate_n_flags)
501{
502 return le16_to_cpu(rate_n_flags) & 0xFF;
503}
504
505static inline u16 il3945_hw_get_rate_n_flags(__le16 rate_n_flags)
506{
507 return le16_to_cpu(rate_n_flags);
508}
509
510static inline __le16 il3945_hw_set_rate_n_flags(u8 rate, u16 flags)
511{
512 return cpu_to_le16((u16)rate|flags);
513}
514
515/************************************/
516/* iwl3945 Flow Handler Definitions */
517/************************************/
518
519/**
520 * This I/O area is directly read/writable by driver (e.g. Linux uses writel())
521 * Addresses are offsets from device's PCI hardware base address.
522 */
523#define FH39_MEM_LOWER_BOUND (0x0800)
524#define FH39_MEM_UPPER_BOUND (0x1000)
525
526#define FH39_CBCC_TBL (FH39_MEM_LOWER_BOUND + 0x140)
527#define FH39_TFDB_TBL (FH39_MEM_LOWER_BOUND + 0x180)
528#define FH39_RCSR_TBL (FH39_MEM_LOWER_BOUND + 0x400)
529#define FH39_RSSR_TBL (FH39_MEM_LOWER_BOUND + 0x4c0)
530#define FH39_TCSR_TBL (FH39_MEM_LOWER_BOUND + 0x500)
531#define FH39_TSSR_TBL (FH39_MEM_LOWER_BOUND + 0x680)
532
533/* TFDB (Transmit Frame Buffer Descriptor) */
534#define FH39_TFDB(_ch, buf) (FH39_TFDB_TBL + \
535 ((_ch) * 2 + (buf)) * 0x28)
536#define FH39_TFDB_CHNL_BUF_CTRL_REG(_ch) (FH39_TFDB_TBL + 0x50 * (_ch))
537
538/* CBCC channel is [0,2] */
539#define FH39_CBCC(_ch) (FH39_CBCC_TBL + (_ch) * 0x8)
540#define FH39_CBCC_CTRL(_ch) (FH39_CBCC(_ch) + 0x00)
541#define FH39_CBCC_BASE(_ch) (FH39_CBCC(_ch) + 0x04)
542
543/* RCSR channel is [0,2] */
544#define FH39_RCSR(_ch) (FH39_RCSR_TBL + (_ch) * 0x40)
545#define FH39_RCSR_CONFIG(_ch) (FH39_RCSR(_ch) + 0x00)
546#define FH39_RCSR_RBD_BASE(_ch) (FH39_RCSR(_ch) + 0x04)
547#define FH39_RCSR_WPTR(_ch) (FH39_RCSR(_ch) + 0x20)
548#define FH39_RCSR_RPTR_ADDR(_ch) (FH39_RCSR(_ch) + 0x24)
549
550#define FH39_RSCSR_CHNL0_WPTR (FH39_RCSR_WPTR(0))
551
552/* RSSR */
553#define FH39_RSSR_CTRL (FH39_RSSR_TBL + 0x000)
554#define FH39_RSSR_STATUS (FH39_RSSR_TBL + 0x004)
555
556/* TCSR */
557#define FH39_TCSR(_ch) (FH39_TCSR_TBL + (_ch) * 0x20)
558#define FH39_TCSR_CONFIG(_ch) (FH39_TCSR(_ch) + 0x00)
559#define FH39_TCSR_CREDIT(_ch) (FH39_TCSR(_ch) + 0x04)
560#define FH39_TCSR_BUFF_STTS(_ch) (FH39_TCSR(_ch) + 0x08)
561
562/* TSSR */
563#define FH39_TSSR_CBB_BASE (FH39_TSSR_TBL + 0x000)
564#define FH39_TSSR_MSG_CONFIG (FH39_TSSR_TBL + 0x008)
565#define FH39_TSSR_TX_STATUS (FH39_TSSR_TBL + 0x010)
566
567
568/* DBM */
569
570#define FH39_SRVC_CHNL (6)
571
572#define FH39_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE (20)
573#define FH39_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH (4)
574
575#define FH39_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN (0x08000000)
576
577#define FH39_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE (0x80000000)
578
579#define FH39_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE (0x20000000)
580
581#define FH39_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 (0x01000000)
582
583#define FH39_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST (0x00001000)
584
585#define FH39_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH (0x00000000)
586
587#define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF (0x00000000)
588#define FH39_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRIVER (0x00000001)
589
590#define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE_VAL (0x00000000)
591#define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL (0x00000008)
592
593#define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD (0x00200000)
594
595#define FH39_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT (0x00000000)
596
597#define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE (0x00000000)
598#define FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE (0x80000000)
599
600#define FH39_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID (0x00004000)
601
602#define FH39_TCSR_CHNL_TX_BUF_STS_REG_BIT_TFDB_WPTR (0x00000001)
603
604#define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON (0xFF000000)
605#define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON (0x00FF0000)
606
607#define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B (0x00000400)
608
609#define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON (0x00000100)
610#define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON (0x00000080)
611
612#define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH (0x00000020)
613#define FH39_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH (0x00000005)
614
615#define FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) (BIT(_ch) << 24)
616#define FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch) (BIT(_ch) << 16)
617
618#define FH39_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_ch) \
619 (FH39_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_ch) | \
620 FH39_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_ch))
621
622#define FH39_RSSR_CHNL0_RX_STATUS_CHNL_IDLE (0x01000000)
623
624struct il3945_tfd_tb {
625 __le32 addr;
626 __le32 len;
627} __packed;
628
629struct il3945_tfd {
630 __le32 control_flags;
631 struct il3945_tfd_tb tbs[4];
632 u8 __pad[28];
633} __packed;
634
635#ifdef CONFIG_IWLEGACY_DEBUGFS
636ssize_t il3945_ucode_rx_stats_read(struct file *file, char __user *user_buf,
637 size_t count, loff_t *ppos);
638ssize_t il3945_ucode_tx_stats_read(struct file *file, char __user *user_buf,
639 size_t count, loff_t *ppos);
640ssize_t il3945_ucode_general_stats_read(struct file *file,
641 char __user *user_buf, size_t count,
642 loff_t *ppos);
643#else
644static ssize_t il3945_ucode_rx_stats_read(struct file *file,
645 char __user *user_buf, size_t count,
646 loff_t *ppos)
647{
648 return 0;
649}
650static ssize_t il3945_ucode_tx_stats_read(struct file *file,
651 char __user *user_buf, size_t count,
652 loff_t *ppos)
653{
654 return 0;
655}
656static ssize_t il3945_ucode_general_stats_read(struct file *file,
657 char __user *user_buf,
658 size_t count, loff_t *ppos)
659{
660 return 0;
661}
662#endif
663
664/* Requires full declaration of il_priv before including */
665#include "iwl-io.h"
666
667#endif