blob: b5aacf72ae6f5db492a374c93ad2b505558e81c5 [file] [log] [blame]
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
Paul Mackerras14cf11a2005-09-26 16:04:21 +100016#include <linux/signal.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/errno.h>
20#include <linux/string.h>
21#include <linux/types.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100022#include <linux/mman.h>
23#include <linux/mm.h>
Johannes Berg543b9fd2007-05-03 22:31:38 +100024#include <linux/suspend.h>
Tony Breedsad7f7162008-02-05 16:16:48 +110025#include <linux/hrtimer.h>
Stephen Rothwelld1dead52005-09-29 00:35:31 +100026#ifdef CONFIG_PPC64
Paul Mackerras14cf11a2005-09-26 16:04:21 +100027#include <linux/time.h>
28#include <linux/hardirq.h>
Stephen Rothwelld1dead52005-09-29 00:35:31 +100029#endif
Christoph Lameterd4d298f2008-04-29 01:04:08 -070030#include <linux/kbuild.h>
Stephen Rothwelld1dead52005-09-29 00:35:31 +100031
Paul Mackerras14cf11a2005-09-26 16:04:21 +100032#include <asm/io.h>
33#include <asm/page.h>
34#include <asm/pgtable.h>
35#include <asm/processor.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100036#include <asm/cputable.h>
37#include <asm/thread_info.h>
Paul Mackerras033ef332005-10-26 17:05:24 +100038#include <asm/rtas.h>
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +110039#include <asm/vdso_datapage.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100040#ifdef CONFIG_PPC64
41#include <asm/paca.h>
42#include <asm/lppaca.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100043#include <asm/cache.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100044#include <asm/compat.h>
Michael Neuling11a27ad2006-08-09 17:00:30 +100045#include <asm/mmu.h>
Olof Johanssonf04da0b2006-09-13 13:32:39 -050046#include <asm/hvcall.h>
Paul Mackerras19ccb762011-07-23 17:42:46 +100047#include <asm/xics.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100048#endif
Benjamin Herrenschmidted79ba92011-09-19 17:45:04 +000049#ifdef CONFIG_PPC_POWERNV
50#include <asm/opal.h>
51#endif
Alexander Graf989044e2010-08-30 12:01:56 +020052#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
Hollis Blanchard366d4b92009-01-03 16:23:08 -060053#include <linux/kvm_host.h>
Alexander Graf06046752010-04-16 00:11:44 +020054#endif
Alexander Graf989044e2010-08-30 12:01:56 +020055#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
56#include <asm/kvm_book3s.h>
Hollis Blancharddb93f572008-11-05 09:36:18 -060057#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100058
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +100059#ifdef CONFIG_PPC32
Kumar Galafca622c2008-04-30 05:23:21 -050060#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
61#include "head_booke.h"
62#endif
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +100063#endif
Kumar Galafca622c2008-04-30 05:23:21 -050064
Kumar Gala55fd7662009-10-16 18:48:40 -050065#if defined(CONFIG_PPC_FSL_BOOK3E)
Trent Piepho19f54652008-12-08 19:34:55 -080066#include "../mm/mmu_decl.h"
67#endif
68
Paul Mackerras14cf11a2005-09-26 16:04:21 +100069int main(void)
70{
Paul Mackerras14cf11a2005-09-26 16:04:21 +100071 DEFINE(THREAD, offsetof(struct task_struct, thread));
Paul Mackerras14cf11a2005-09-26 16:04:21 +100072 DEFINE(MM, offsetof(struct task_struct, mm));
Benjamin Herrenschmidt5e696612008-12-18 19:13:24 +000073 DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
Stephen Rothwelld1dead52005-09-29 00:35:31 +100074#ifdef CONFIG_PPC64
Stephen Rothwelld1dead52005-09-29 00:35:31 +100075 DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
Paul Mackerras9c1e1052009-08-17 15:17:54 +100076 DEFINE(SIGSEGV, SIGSEGV);
77 DEFINE(NMI_MASK, NMI_MASK);
Alexey Kardashevskiyefcac652011-03-02 15:18:48 +000078 DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
Anton Blanchard71433282012-09-03 16:51:10 +000079 DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
Haren Myneni92779242012-12-06 21:49:56 +000080 DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +100081#else
Roman Zippelf7e42172007-05-09 02:35:17 -070082 DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
Benjamin Herrenschmidtcbc95652013-09-24 15:17:21 +100083 DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
84 DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
Stephen Rothwelld1dead52005-09-29 00:35:31 +100085#endif /* CONFIG_PPC64 */
86
Paul Mackerras14cf11a2005-09-26 16:04:21 +100087 DEFINE(KSP, offsetof(struct thread_struct, ksp));
Paul Mackerras14cf11a2005-09-26 16:04:21 +100088 DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
Ashish Kalra1325a682011-04-22 16:48:27 -050089#ifdef CONFIG_BOOKE
90 DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
91#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100092 DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
Paul Mackerrasde79f7b2013-09-10 20:20:42 +100093 DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fp_state));
Paul Mackerras18461962013-09-10 20:21:10 +100094 DEFINE(THREAD_FPSAVEAREA, offsetof(struct thread_struct, fp_save_area));
Paul Mackerrasde79f7b2013-09-10 20:20:42 +100095 DEFINE(FPSTATE_FPSCR, offsetof(struct thread_fp_state, fpscr));
Paul Mackerras14cf11a2005-09-26 16:04:21 +100096#ifdef CONFIG_ALTIVEC
Paul Mackerrasde79f7b2013-09-10 20:20:42 +100097 DEFINE(THREAD_VRSTATE, offsetof(struct thread_struct, vr_state));
Paul Mackerras18461962013-09-10 20:21:10 +100098 DEFINE(THREAD_VRSAVEAREA, offsetof(struct thread_struct, vr_save_area));
Paul Mackerras14cf11a2005-09-26 16:04:21 +100099 DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000100 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000101 DEFINE(VRSTATE_VSCR, offsetof(struct thread_vr_state, vscr));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000102#endif /* CONFIG_ALTIVEC */
Michael Neulingc6e67712008-06-25 14:07:18 +1000103#ifdef CONFIG_VSX
Michael Neulingc6e67712008-06-25 14:07:18 +1000104 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
105#endif /* CONFIG_VSX */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000106#ifdef CONFIG_PPC64
107 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
108#else /* CONFIG_PPC64 */
109 DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000110#ifdef CONFIG_SPE
111 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
112 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
113 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
114 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
115#endif /* CONFIG_SPE */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000116#endif /* CONFIG_PPC64 */
Bharat Bhushan13d543c2013-05-22 09:50:59 +0530117#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
Bharat Bhushan51ae8d42013-07-04 11:45:46 +0530118 DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, debug.dbcr0));
Bharat Bhushan13d543c2013-05-22 09:50:59 +0530119#endif
Alexander Graf97e49252010-04-16 00:11:51 +0200120#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
121 DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
122#endif
Bharat Bhushanffe129e2013-01-15 22:20:42 +0000123#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
Scott Woodd30f6e42011-12-20 15:34:43 +0000124 DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
125#endif
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000126
Ian Munsie2468dcf2013-02-07 15:46:58 +0000127#ifdef CONFIG_PPC_BOOK3S_64
128 DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar));
Michael Ellerman93533742013-04-30 20:17:04 +0000129 DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));
130 DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));
131 DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));
Michael Ellerman59affcd2013-05-21 16:31:12 +0000132 DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar));
133 DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar));
134 DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
135 DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
136 DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
Ian Munsie2468dcf2013-02-07 15:46:58 +0000137#endif
Michael Neuling8b3c34c2013-02-13 16:21:32 +0000138#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
Michael Neulingafc07702013-02-13 16:21:34 +0000139 DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
Michael Neuling8b3c34c2013-02-13 16:21:32 +0000140 DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
141 DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
142 DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
Michael Neuling28e61cc2013-08-09 17:29:31 +1000143 DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar));
144 DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
145 DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
Michael Neuling8b3c34c2013-02-13 16:21:32 +0000146 DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000147 DEFINE(THREAD_TRANSACT_VRSTATE, offsetof(struct thread_struct,
148 transact_vr));
Michael Neuling8b3c34c2013-02-13 16:21:32 +0000149 DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct,
150 transact_vrsave));
Paul Mackerrasde79f7b2013-09-10 20:20:42 +1000151 DEFINE(THREAD_TRANSACT_FPSTATE, offsetof(struct thread_struct,
152 transact_fp));
Michael Neuling8b3c34c2013-02-13 16:21:32 +0000153 /* Local pt_regs on stack for Transactional Memory funcs. */
154 DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
155 sizeof(struct pt_regs) + 16);
156#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
Ian Munsie2468dcf2013-02-07 15:46:58 +0000157
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000158 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
Paul Mackerrasf39224a2006-04-18 21:49:11 +1000159 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000160 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000161 DEFINE(TI_TASK, offsetof(struct thread_info, task));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000162 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000163
164#ifdef CONFIG_PPC64
165 DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
166 DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
167 DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
168 DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
169 DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
170 DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000171 /* paca */
172 DEFINE(PACA_SIZE, sizeof(struct paca_struct));
Paul Mackerras9e368f22011-06-29 00:40:08 +0000173 DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000174 DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
175 DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
176 DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
177 DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
178 DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000179 DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
180 DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
181 DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
Paul Mackerras1f6a93e2008-08-30 11:40:24 +1000182 DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
183 DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
Paul Mackerrasd04c56f2006-10-04 16:47:49 +1000184 DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
Benjamin Herrenschmidt7230c562012-03-06 18:27:59 +1100185 DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000186 DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
Benjamin Herrenschmidtd0f13e32007-05-08 16:27:27 +1000187#ifdef CONFIG_PPC_MM_SLICES
188 DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
189 context.low_slices_psize));
190 DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
191 context.high_slices_psize));
192 DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000193#endif /* CONFIG_PPC_MM_SLICES */
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +0000194
195#ifdef CONFIG_PPC_BOOK3E
196 DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
197 DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
198 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
199 DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
200 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
201 DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
202 DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
203 DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
204 DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
205 DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
Scott Wood28efc352013-10-11 19:22:38 -0500206 DEFINE(PACA_TCD_PTR, offsetof(struct paca_struct, tcd_ptr));
207
208 DEFINE(TCD_ESEL_NEXT,
209 offsetof(struct tlb_core_data, esel_next));
210 DEFINE(TCD_ESEL_MAX,
211 offsetof(struct tlb_core_data, esel_max));
212 DEFINE(TCD_ESEL_FIRST,
213 offsetof(struct tlb_core_data, esel_first));
214 DEFINE(TCD_LOCK, offsetof(struct tlb_core_data, lock));
Benjamin Herrenschmidtdce66702009-07-23 23:15:42 +0000215#endif /* CONFIG_PPC_BOOK3E */
216
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000217#ifdef CONFIG_PPC_STD_MMU_64
218 DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
219 DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
220 DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
221 DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
222 DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
223#ifdef CONFIG_PPC_MM_SLICES
Benjamin Herrenschmidtd0f13e32007-05-08 16:27:27 +1000224 DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
225#else
226 DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
Benjamin Herrenschmidtd0f13e32007-05-08 16:27:27 +1000227#endif /* CONFIG_PPC_MM_SLICES */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000228 DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
229 DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
230 DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
David Gibson3356bb92006-01-13 10:26:42 +1100231 DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
Michael Neuling2f6093c2006-08-07 16:19:19 +1000232 DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
Michael Neuling11a27ad2006-08-09 17:00:30 +1000233 DEFINE(SLBSHADOW_STACKVSID,
234 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
235 DEFINE(SLBSHADOW_STACKESID,
236 offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000237 DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000238 DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000239 DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
Paul Mackerrasa8606e22011-06-29 00:22:05 +0000240 DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000241 DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000242#endif /* CONFIG_PPC_STD_MMU_64 */
243 DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
Mahesh Salgaonkar1e9b4502013-10-30 20:04:08 +0530244#ifdef CONFIG_PPC_BOOK3S_64
245 DEFINE(PACAMCEMERGSP, offsetof(struct paca_struct, mc_emergency_sp));
246 DEFINE(PACA_IN_MCE, offsetof(struct paca_struct, in_mce));
247#endif
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000248 DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
Michael Neuling1fc711f2010-05-13 19:40:11 +0000249 DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000250 DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
251 DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000252 DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
253 DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
Benjamin Herrenschmidt91c60b52009-06-02 21:17:41 +0000254 DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
Paul Mackerras2fde6d22011-12-05 19:47:26 +0000255 DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
Mihai Caraman01272622012-09-06 02:49:44 +0000256 DEFINE(PACA_SPRG3, offsetof(struct paca_struct, sprg3));
Paul Mackerras033ef332005-10-26 17:05:24 +1000257#endif /* CONFIG_PPC64 */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000258
259 /* RTAS */
260 DEFINE(RTASBASE, offsetof(struct rtas_t, base));
261 DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000262
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000263 /* Interrupt register frame */
Kumar Gala91120cc2008-04-24 06:33:49 +1000264 DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000265 DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
Alexander Graf218d1692010-04-16 00:11:55 +0200266#ifdef CONFIG_PPC64
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000267 /* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
268 DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
269 DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
Mike Kravetz57852a82006-09-06 16:23:12 -0700270
271 /* hcall statistics */
272 DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
273 DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
274 DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
275 DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000276#endif /* CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000277 DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
278 DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
279 DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
280 DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
281 DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
282 DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
283 DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
284 DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
285 DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
286 DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
287 DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
288 DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
289 DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
290 DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000291#ifndef CONFIG_PPC64
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000292 DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
293 DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
294 DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
295 DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
296 DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
297 DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
298 DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
299 DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
300 DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
301 DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
302 DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
303 DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
304 DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
305 DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
306 DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
307 DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
308 DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
309 DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000310#endif /* CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000311 /*
312 * Note: these symbols include _ because they overlap with special
313 * register names
314 */
315 DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
316 DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
317 DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
318 DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
319 DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000320 DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
321 DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
322 DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000323 DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
324 DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
Paul Mackerrasd73e0c92005-10-28 22:45:25 +1000325 DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000326#ifndef CONFIG_PPC64
327 DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
328 /*
329 * The PowerPC 400-class & Book-E processors have neither the DAR
330 * nor the DSISR SPRs. Hence, we overload them to hold the similar
331 * DEAR and ESR SPRs for such processors. For critical interrupts
332 * we use them to hold SRR0 and SRR1.
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000333 */
334 DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
335 DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000336#else /* CONFIG_PPC64 */
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000337 DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
338
339 /* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
340 DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
341 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
342#endif /* CONFIG_PPC64 */
343
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +1000344#if defined(CONFIG_PPC32)
Kumar Galafca622c2008-04-30 05:23:21 -0500345#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
346 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
347 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
348 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
349 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
350 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
351 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
352 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
353 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
354 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
355 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
356 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
357 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
358 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
359 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
360 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
361 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
362#endif
Benjamin Herrenschmidt57e2a992009-07-28 11:59:34 +1000363#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000364 DEFINE(CLONE_VM, CLONE_VM);
365 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000366
367#ifndef CONFIG_PPC64
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000368 DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000369#endif /* ! CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000370
371 /* About the CPU features table */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000372 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
373 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
Olof Johanssonf39b7a52006-08-11 00:07:08 -0500374 DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000375
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000376 DEFINE(pbe_address, offsetof(struct pbe, address));
377 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
378 DEFINE(pbe_next, offsetof(struct pbe, next));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000379
Johannes Berg543b9fd2007-05-03 22:31:38 +1000380#ifndef CONFIG_PPC64
Paul Mackerrasfd582ec2005-10-11 22:08:12 +1000381 DEFINE(TASK_SIZE, TASK_SIZE);
Stephen Rothwelld1dead52005-09-29 00:35:31 +1000382 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100383#endif /* ! CONFIG_PPC64 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000384
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100385 /* datapage offsets for use by vdso */
386 DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
387 DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
388 DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
389 DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
390 DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
391 DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
392 DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
393 DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
394 DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
395 DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
Paul Mackerras597bc5c2008-10-27 23:56:03 +0000396 DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
Paul Mackerras8fd63a92010-06-20 19:03:08 +0000397 DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
Olof Johanssonfbe48172007-11-20 12:24:45 +1100398 DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
399 DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
400 DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
401 DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100402#ifdef CONFIG_PPC64
403 DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000404 DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
405 DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
406 DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
407 DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
Benjamin Herrenschmidt0c37ec22005-11-14 14:55:58 +1100408 DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
409 DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100410 DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
411 DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
412#else
413 DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
414 DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
Benjamin Herrenschmidt0c37ec22005-11-14 14:55:58 +1100415 DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
416 DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100417#endif
418 /* timeval/timezone offsets for use by vdso */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000419 DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
420 DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100421
422 /* Other bits used by the vdso */
423 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
424 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
425 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
Tony Breeds151db1f2008-02-08 09:24:52 +1100426 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
Benjamin Herrenschmidta7f290d2005-11-11 21:15:21 +1100427
David Woodhouse007d88d2007-01-01 18:45:34 +0000428#ifdef CONFIG_BUG
429 DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
430#endif
Stephen Rothwell16a15a32007-08-20 14:58:36 +1000431
Stephen Rothwellee7a76d2007-09-18 17:22:59 +1000432 DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
Becky Bruce4ee70842008-09-24 11:01:24 -0500433 DEFINE(PTE_SIZE, sizeof(pte_t));
Kumar Galabee86f12007-12-06 13:11:04 -0600434
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500435#ifdef CONFIG_KVM
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500436 DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
437 DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
Scott Woodd30f6e42011-12-20 15:34:43 +0000438 DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500439 DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
Scott Woodeab17672011-04-27 17:24:10 -0500440 DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
Paul Mackerrasefff1912013-10-15 20:43:02 +1100441 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fp.fpr));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000442#ifdef CONFIG_ALTIVEC
Paul Mackerrasefff1912013-10-15 20:43:02 +1100443 DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr.vr));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000444#endif
445 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
446 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
447 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
Michael Neulingb005255e2014-01-08 21:25:21 +1100448 DEFINE(VCPU_TAR, offsetof(struct kvm_vcpu, arch.tar));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000449 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
450 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
Aneesh Kumar K.V9975f5e2013-10-07 22:17:52 +0530451#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
Paul Mackerrasde56a942011-06-29 00:21:34 +0000452 DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
453 DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
454 DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
455 DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
456 DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
457 DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
458 DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
459#endif
Paul Mackerrasc8ae0ac2013-07-11 21:49:43 +1000460 DEFINE(VCPU_SHARED_SPRG3, offsetof(struct kvm_vcpu_arch_shared, sprg3));
Scott Woodb5904972011-11-08 18:23:30 -0600461 DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));
462 DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));
463 DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));
464 DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));
Hollis Blanchard49dd2c42008-07-25 13:54:53 -0500465 DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
Liu Yudd9ebf1f2011-06-14 18:35:14 -0500466 DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
Alexander Graf96bc4512010-07-29 14:47:42 +0200467 DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
Alexander Graf666e7252010-07-29 14:47:43 +0200468 DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
Scott Woodecee2732011-06-14 18:34:29 -0500469 DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500470
Scott Woodb5904972011-11-08 18:23:30 -0600471 DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));
472 DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));
473 DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));
474 DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));
475 DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));
476 DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));
477
Scott Woodd30f6e42011-12-20 15:34:43 +0000478 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
479 DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
480
Alexander Graf00c3a372010-04-16 00:11:42 +0200481 /* book3s */
Aneesh Kumar K.V9975f5e2013-10-07 22:17:52 +0530482#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
Paul Mackerrasde56a942011-06-29 00:21:34 +0000483 DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
484 DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
485 DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
486 DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
487 DEFINE(KVM_TLBIE_LOCK, offsetof(struct kvm, arch.tlbie_lock));
Paul Mackerras1b400ba2012-11-21 23:28:08 +0000488 DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits));
Paul Mackerrasaa04b4c2011-06-29 00:25:44 +0000489 DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
490 DEFINE(KVM_RMOR, offsetof(struct kvm, arch.rmor));
Paul Mackerras697d3892011-12-12 12:36:37 +0000491 DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000492 DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
493 DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
Paul Mackerras7657f402012-03-05 21:42:25 +0000494 DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
Paul Mackerrasc35635e2013-04-18 19:51:04 +0000495 DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
Anton Blanchardd6829162014-01-08 21:25:30 +1100496 DEFINE(VCPU_INTR_MSR, offsetof(struct kvm_vcpu, arch.intr_msr));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000497#endif
Alexander Graf00c3a372010-04-16 00:11:42 +0200498#ifdef CONFIG_PPC_BOOK3S
Paul Mackerrasde56a942011-06-29 00:21:34 +0000499 DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000500 DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
501 DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
Michael Neulingb005255e2014-01-08 21:25:21 +1100502 DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic));
503 DEFINE(VCPU_VTB, offsetof(struct kvm_vcpu, arch.vtb));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000504 DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
505 DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
506 DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
Michael Neulingb005255e2014-01-08 21:25:21 +1100507 DEFINE(VCPU_IAMR, offsetof(struct kvm_vcpu, arch.iamr));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000508 DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
509 DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
Paul Mackerras8563bf52014-01-08 21:25:29 +1100510 DEFINE(VCPU_DABRX, offsetof(struct kvm_vcpu, arch.dabrx));
Michael Neulingb005255e2014-01-08 21:25:21 +1100511 DEFINE(VCPU_DAWR, offsetof(struct kvm_vcpu, arch.dawr));
512 DEFINE(VCPU_DAWRX, offsetof(struct kvm_vcpu, arch.dawrx));
513 DEFINE(VCPU_CIABR, offsetof(struct kvm_vcpu, arch.ciabr));
Alexander Graf62908902009-10-30 05:47:18 +0000514 DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000515 DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
516 DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
Paul Mackerrasaa04b4c2011-06-29 00:25:44 +0000517 DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
Paul Mackerras19ccb762011-07-23 17:42:46 +1000518 DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));
519 DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000520 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
521 DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
Michael Neulingb005255e2014-01-08 21:25:21 +1100522 DEFINE(VCPU_SPMC, offsetof(struct kvm_vcpu, arch.spmc));
Paul Mackerras14941782013-09-06 13:11:18 +1000523 DEFINE(VCPU_SIAR, offsetof(struct kvm_vcpu, arch.siar));
524 DEFINE(VCPU_SDAR, offsetof(struct kvm_vcpu, arch.sdar));
Michael Neulingb005255e2014-01-08 21:25:21 +1100525 DEFINE(VCPU_SIER, offsetof(struct kvm_vcpu, arch.sier));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000526 DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
527 DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
528 DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000529 DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
530 DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
531 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
532 DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
Paul Mackerras0acb9112013-02-04 18:10:51 +0000533 DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
Paul Mackerras4b8473c2013-09-20 14:52:39 +1000534 DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
Michael Neulingb005255e2014-01-08 21:25:21 +1100535 DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
536 DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
Michael Neulingb005255e2014-01-08 21:25:21 +1100537 DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr));
538 DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr));
539 DEFINE(VCPU_BESCR, offsetof(struct kvm_vcpu, arch.bescr));
540 DEFINE(VCPU_CSIGR, offsetof(struct kvm_vcpu, arch.csigr));
541 DEFINE(VCPU_TACR, offsetof(struct kvm_vcpu, arch.tacr));
542 DEFINE(VCPU_TCSCR, offsetof(struct kvm_vcpu, arch.tcscr));
543 DEFINE(VCPU_ACOP, offsetof(struct kvm_vcpu, arch.acop));
544 DEFINE(VCPU_WORT, offsetof(struct kvm_vcpu, arch.wort));
Paul Mackerrasa2d56022013-09-20 14:52:43 +1000545 DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1));
Paul Mackerras371fefd2011-06-29 00:23:08 +0000546 DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
547 DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
548 DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
Paul Mackerras19ccb762011-07-23 17:42:46 +1000549 DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
Paul Mackerrase0b7ec02014-01-08 21:25:20 +1100550 DEFINE(VCORE_KVM, offsetof(struct kvmppc_vcore, kvm));
Paul Mackerras93b0f4d2013-09-06 13:17:46 +1000551 DEFINE(VCORE_TB_OFFSET, offsetof(struct kvmppc_vcore, tb_offset));
Paul Mackerrasa0144e22013-09-20 14:52:38 +1000552 DEFINE(VCORE_LPCR, offsetof(struct kvmppc_vcore, lpcr));
Paul Mackerras388cc6e2013-09-21 14:35:02 +1000553 DEFINE(VCORE_PCR, offsetof(struct kvmppc_vcore, pcr));
Michael Neulingb005255e2014-01-08 21:25:21 +1100554 DEFINE(VCORE_DPDES, offsetof(struct kvmppc_vcore, dpdes));
Paul Mackerrasde56a942011-06-29 00:21:34 +0000555 DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
556 DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
557 DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
Michael Neuling7b490412014-01-08 21:25:32 +1100558#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
559 DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
560 DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
561 DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
562 DEFINE(VCPU_GPR_TM, offsetof(struct kvm_vcpu, arch.gpr_tm));
563 DEFINE(VCPU_FPRS_TM, offsetof(struct kvm_vcpu, arch.fp_tm.fpr));
564 DEFINE(VCPU_VRS_TM, offsetof(struct kvm_vcpu, arch.vr_tm.vr));
565 DEFINE(VCPU_VRSAVE_TM, offsetof(struct kvm_vcpu, arch.vrsave_tm));
566 DEFINE(VCPU_CR_TM, offsetof(struct kvm_vcpu, arch.cr_tm));
567 DEFINE(VCPU_LR_TM, offsetof(struct kvm_vcpu, arch.lr_tm));
568 DEFINE(VCPU_CTR_TM, offsetof(struct kvm_vcpu, arch.ctr_tm));
569 DEFINE(VCPU_AMR_TM, offsetof(struct kvm_vcpu, arch.amr_tm));
570 DEFINE(VCPU_PPR_TM, offsetof(struct kvm_vcpu, arch.ppr_tm));
571 DEFINE(VCPU_DSCR_TM, offsetof(struct kvm_vcpu, arch.dscr_tm));
572 DEFINE(VCPU_TAR_TM, offsetof(struct kvm_vcpu, arch.tar_tm));
573#endif
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000574
575#ifdef CONFIG_PPC_BOOK3S_64
Aneesh Kumar K.V7aa79932013-10-07 22:17:51 +0530576#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
Paul Mackerrasa2d56022013-09-20 14:52:43 +1000577 DEFINE(PACA_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000578# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
Paul Mackerrasde56a942011-06-29 00:21:34 +0000579#else
580# define SVCPU_FIELD(x, f)
581#endif
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000582# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
583#else /* 32-bit */
584# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
585# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
Alexander Graf06046752010-04-16 00:11:44 +0200586#endif
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000587
588 SVCPU_FIELD(SVCPU_CR, cr);
589 SVCPU_FIELD(SVCPU_XER, xer);
590 SVCPU_FIELD(SVCPU_CTR, ctr);
591 SVCPU_FIELD(SVCPU_LR, lr);
592 SVCPU_FIELD(SVCPU_PC, pc);
593 SVCPU_FIELD(SVCPU_R0, gpr[0]);
594 SVCPU_FIELD(SVCPU_R1, gpr[1]);
595 SVCPU_FIELD(SVCPU_R2, gpr[2]);
596 SVCPU_FIELD(SVCPU_R3, gpr[3]);
597 SVCPU_FIELD(SVCPU_R4, gpr[4]);
598 SVCPU_FIELD(SVCPU_R5, gpr[5]);
599 SVCPU_FIELD(SVCPU_R6, gpr[6]);
600 SVCPU_FIELD(SVCPU_R7, gpr[7]);
601 SVCPU_FIELD(SVCPU_R8, gpr[8]);
602 SVCPU_FIELD(SVCPU_R9, gpr[9]);
603 SVCPU_FIELD(SVCPU_R10, gpr[10]);
604 SVCPU_FIELD(SVCPU_R11, gpr[11]);
605 SVCPU_FIELD(SVCPU_R12, gpr[12]);
606 SVCPU_FIELD(SVCPU_R13, gpr[13]);
607 SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
608 SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
609 SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
610 SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
611#ifdef CONFIG_PPC_BOOK3S_32
612 SVCPU_FIELD(SVCPU_SR, sr);
613#endif
614#ifdef CONFIG_PPC64
615 SVCPU_FIELD(SVCPU_SLB, slb);
616 SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
617#endif
618
619 HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
620 HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
Paul Mackerrasde56a942011-06-29 00:21:34 +0000621 HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000622 HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
623 HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
624 HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
Aneesh Kumar K.V36e7bb32013-11-11 19:29:47 +0530625 HSTATE_FIELD(HSTATE_SCRATCH2, scratch2);
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000626 HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
Paul Mackerras02143942011-07-23 17:41:44 +1000627 HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
Paul Mackerras19ccb762011-07-23 17:42:46 +1000628 HSTATE_FIELD(HSTATE_NAPPING, napping);
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000629
Aneesh Kumar K.V9975f5e2013-10-07 22:17:52 +0530630#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
Paul Mackerras7657f402012-03-05 21:42:25 +0000631 HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
632 HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
Paul Mackerrasde56a942011-06-29 00:21:34 +0000633 HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
Paul Mackerras371fefd2011-06-29 00:23:08 +0000634 HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
635 HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
Benjamin Herrenschmidt54695c32013-04-17 20:30:50 +0000636 HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
637 HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
Paul Mackerrase0b7ec02014-01-08 21:25:20 +1100638 HSTATE_FIELD(HSTATE_PTID, ptid);
Paul Mackerrasde56a942011-06-29 00:21:34 +0000639 HSTATE_FIELD(HSTATE_MMCR, host_mmcr);
640 HSTATE_FIELD(HSTATE_PMC, host_pmc);
641 HSTATE_FIELD(HSTATE_PURR, host_purr);
642 HSTATE_FIELD(HSTATE_SPURR, host_spurr);
643 HSTATE_FIELD(HSTATE_DSCR, host_dscr);
644 HSTATE_FIELD(HSTATE_DABR, dabr);
645 HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
Paul Mackerras19ccb762011-07-23 17:42:46 +1000646 DEFINE(IPI_PRIORITY, IPI_PRIORITY);
Aneesh Kumar K.V9975f5e2013-10-07 22:17:52 +0530647#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
Paul Mackerrasde56a942011-06-29 00:21:34 +0000648
Paul Mackerras0acb9112013-02-04 18:10:51 +0000649#ifdef CONFIG_PPC_BOOK3S_64
650 HSTATE_FIELD(HSTATE_CFAR, cfar);
Paul Mackerras4b8473c2013-09-20 14:52:39 +1000651 HSTATE_FIELD(HSTATE_PPR, ppr);
Paul Mackerras0acb9112013-02-04 18:10:51 +0000652#endif /* CONFIG_PPC_BOOK3S_64 */
653
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000654#else /* CONFIG_PPC_BOOK3S */
Alexander Graf7e57cba2010-01-08 02:58:03 +0100655 DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
656 DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
Alexander Graf06046752010-04-16 00:11:44 +0200657 DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
658 DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
659 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
660 DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
661 DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
662 DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
Bharat Bhushan15b708b2013-02-27 18:13:10 +0000663 DEFINE(VCPU_CRIT_SAVE, offsetof(struct kvm_vcpu, arch.crit_save));
Alexander Graf00c3a372010-04-16 00:11:42 +0200664#endif /* CONFIG_PPC_BOOK3S */
Paul Mackerras3c42bf82011-06-29 00:20:58 +0000665#endif /* CONFIG_KVM */
Alexander Grafd17051c2010-07-29 14:47:57 +0200666
667#ifdef CONFIG_KVM_GUEST
668 DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
669 scratch1));
670 DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
671 scratch2));
672 DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
673 scratch3));
674 DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
675 int_pending));
676 DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
677 DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
678 critical));
Alexander Grafcbe487f2010-08-03 10:39:35 +0200679 DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
Alexander Grafd17051c2010-07-29 14:47:57 +0200680#endif
681
Ilya Yanokca9153a2008-12-11 04:55:41 +0300682#ifdef CONFIG_44x
683 DEFINE(PGD_T_LOG2, PGD_T_LOG2);
684 DEFINE(PTE_T_LOG2, PTE_T_LOG2);
685#endif
Kumar Gala55fd7662009-10-16 18:48:40 -0500686#ifdef CONFIG_PPC_FSL_BOOK3E
Kumar Gala78f62232010-05-13 14:38:21 -0500687 DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
688 DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
689 DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
690 DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
691 DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
692 DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
693#endif
Hollis Blanchardbbf45ba2008-04-16 23:28:09 -0500694
Scott Wood4cd35f62011-06-14 18:34:31 -0500695#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
696 DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
697 DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
698 DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
699 DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
700#endif
701
Scott Woodd30f6e42011-12-20 15:34:43 +0000702#ifdef CONFIG_KVM_BOOKE_HV
703 DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
704 DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
705 DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
706#endif
707
Hollis Blanchard73e75b42008-12-02 15:51:57 -0600708#ifdef CONFIG_KVM_EXIT_TIMING
709 DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
710 arch.timing_exit.tv32.tbu));
711 DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
712 arch.timing_exit.tv32.tbl));
713 DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
714 arch.timing_last_enter.tv32.tbu));
715 DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
716 arch.timing_last_enter.tv32.tbl));
717#endif
718
Benjamin Herrenschmidted79ba92011-09-19 17:45:04 +0000719#ifdef CONFIG_PPC_POWERNV
720 DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
721 DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
722 DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
723 DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
724#endif
725
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000726 return 0;
727}