| Johannes Berg | f3d9478 | 2006-06-21 15:42:43 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Apple Onboard Audio driver for Onyx codec (header) |
| 3 | * |
| 4 | * Copyright 2006 Johannes Berg <johannes@sipsolutions.net> |
| 5 | * |
| 6 | * GPL v2, can be found in COPYING. |
| 7 | */ |
| 8 | #ifndef __SND_AOA_CODEC_ONYX_H |
| 9 | #define __SND_AOA_CODEC_ONYX_H |
| 10 | #include <stddef.h> |
| 11 | #include <linux/i2c.h> |
| Johannes Berg | f3d9478 | 2006-06-21 15:42:43 +0200 | [diff] [blame] | 12 | #include <asm/pmac_low_i2c.h> |
| 13 | #include <asm/prom.h> |
| 14 | |
| 15 | /* PCM3052 register definitions */ |
| 16 | |
| 17 | /* the attenuation registers take values from |
| 18 | * -1 (0dB) to -127 (-63.0 dB) or others (muted) */ |
| 19 | #define ONYX_REG_DAC_ATTEN_LEFT 65 |
| 20 | #define FIRSTREGISTER ONYX_REG_DAC_ATTEN_LEFT |
| 21 | #define ONYX_REG_DAC_ATTEN_RIGHT 66 |
| 22 | |
| 23 | #define ONYX_REG_CONTROL 67 |
| 24 | # define ONYX_MRST (1<<7) |
| 25 | # define ONYX_SRST (1<<6) |
| 26 | # define ONYX_ADPSV (1<<5) |
| 27 | # define ONYX_DAPSV (1<<4) |
| 28 | # define ONYX_SILICONVERSION (1<<0) |
| 29 | /* all others reserved */ |
| 30 | |
| 31 | #define ONYX_REG_DAC_CONTROL 68 |
| 32 | # define ONYX_OVR1 (1<<6) |
| 33 | # define ONYX_MUTE_RIGHT (1<<1) |
| 34 | # define ONYX_MUTE_LEFT (1<<0) |
| 35 | |
| 36 | #define ONYX_REG_DAC_DEEMPH 69 |
| 37 | # define ONYX_DIGDEEMPH_SHIFT 5 |
| 38 | # define ONYX_DIGDEEMPH_MASK (3<<ONYX_DIGDEEMPH_SHIFT) |
| 39 | # define ONYX_DIGDEEMPH_CTRL (1<<4) |
| 40 | |
| 41 | #define ONYX_REG_DAC_FILTER 70 |
| 42 | # define ONYX_ROLLOFF_FAST (1<<5) |
| 43 | # define ONYX_DAC_FILTER_ALWAYS (1<<2) |
| 44 | |
| 45 | #define ONYX_REG_DAC_OUTPHASE 71 |
| 46 | # define ONYX_OUTPHASE_INVERTED (1<<0) |
| 47 | |
| 48 | #define ONYX_REG_ADC_CONTROL 72 |
| 49 | # define ONYX_ADC_INPUT_MIC (1<<5) |
| 50 | /* 8 + input gain in dB, valid range for input gain is -4 .. 20 dB */ |
| 51 | # define ONYX_ADC_PGA_GAIN_MASK 0x1f |
| 52 | |
| 53 | #define ONYX_REG_ADC_HPF_BYPASS 75 |
| 54 | # define ONYX_HPF_DISABLE (1<<3) |
| 55 | # define ONYX_ADC_HPF_ALWAYS (1<<2) |
| 56 | |
| 57 | #define ONYX_REG_DIG_INFO1 77 |
| 58 | # define ONYX_MASK_DIN_TO_BPZ (1<<7) |
| 59 | /* bits 1-5 control channel bits 1-5 */ |
| 60 | # define ONYX_DIGOUT_DISABLE (1<<0) |
| 61 | |
| 62 | #define ONYX_REG_DIG_INFO2 78 |
| 63 | /* controls channel bits 8-15 */ |
| 64 | |
| 65 | #define ONYX_REG_DIG_INFO3 79 |
| 66 | /* control channel bits 24-29, high 2 bits reserved */ |
| 67 | |
| 68 | #define ONYX_REG_DIG_INFO4 80 |
| 69 | # define ONYX_VALIDL (1<<7) |
| 70 | # define ONYX_VALIDR (1<<6) |
| 71 | # define ONYX_SPDIF_ENABLE (1<<5) |
| 72 | /* lower 4 bits control bits 32-35 of channel control and word length */ |
| 73 | # define ONYX_WORDLEN_MASK (0xF) |
| 74 | |
| 75 | #endif /* __SND_AOA_CODEC_ONYX_H */ |