| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
| Maciej W. Rozycki | aa0980b | 2005-02-01 20:18:59 +0000 | [diff] [blame] | 2 | * Copyright (C) 1999, 2000, 2004  MIPS Technologies, Inc. | 
|  | 3 | *	All rights reserved. | 
|  | 4 | *	Authors: Carsten Langgaard <carstenl@mips.com> | 
|  | 5 | *		 Maciej W. Rozycki <macro@mips.com> | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * | 
|  | 7 | *  This program is free software; you can distribute it and/or modify it | 
|  | 8 | *  under the terms of the GNU General Public License (Version 2) as | 
|  | 9 | *  published by the Free Software Foundation. | 
|  | 10 | * | 
|  | 11 | *  This program is distributed in the hope it will be useful, but WITHOUT | 
|  | 12 | *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
|  | 13 | *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License | 
|  | 14 | *  for more details. | 
|  | 15 | * | 
|  | 16 | *  You should have received a copy of the GNU General Public License along | 
|  | 17 | *  with this program; if not, write to the Free Software Foundation, Inc., | 
|  | 18 | *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | 
|  | 19 | * | 
|  | 20 | * MIPS boards specific PCI support. | 
|  | 21 | */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <linux/types.h> | 
|  | 23 | #include <linux/pci.h> | 
|  | 24 | #include <linux/kernel.h> | 
|  | 25 | #include <linux/init.h> | 
|  | 26 |  | 
|  | 27 | #include <asm/mips-boards/bonito64.h> | 
|  | 28 |  | 
|  | 29 | #define PCI_ACCESS_READ  0 | 
|  | 30 | #define PCI_ACCESS_WRITE 1 | 
|  | 31 |  | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 32 | #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset)) | 
|  | 33 | #define ID_SEL_BEGIN 10 | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 34 | #define MAX_DEV_NUM (31 - ID_SEL_BEGIN) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 |  | 
|  | 37 | static int bonito64_pcibios_config_access(unsigned char access_type, | 
|  | 38 | struct pci_bus *bus, | 
|  | 39 | unsigned int devfn, int where, | 
|  | 40 | u32 * data) | 
|  | 41 | { | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 42 | u32 busnum = bus->number; | 
|  | 43 | u32 addr, type; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | u32 dummy; | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 45 | void *addrp; | 
|  | 46 | int device = PCI_SLOT(devfn); | 
|  | 47 | int function = PCI_FUNC(devfn); | 
|  | 48 | int reg = where & ~3; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 |  | 
|  | 50 | if (busnum == 0) { | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 51 | /* Type 0 configuration for onboard PCI bus */ | 
|  | 52 | if (device > MAX_DEV_NUM) | 
|  | 53 | return -1; | 
|  | 54 |  | 
|  | 55 | addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg; | 
|  | 56 | type = 0; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 57 | } else { | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 58 | /* Type 1 configuration for offboard PCI bus */ | 
|  | 59 | addr = (busnum << 16) | (device << 11) | (function << 8) | reg; | 
|  | 60 | type = 0x10000; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | } | 
|  | 62 |  | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 63 | /* Clear aborts */ | 
|  | 64 | BONITO_PCICMD |= BONITO_PCICMD_MABORT_CLR | BONITO_PCICMD_MTABORT_CLR; | 
|  | 65 |  | 
|  | 66 | BONITO_PCIMAP_CFG = (addr >> 16) | type; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 |  | 
|  | 68 | /* Flush Bonito register block */ | 
|  | 69 | dummy = BONITO_PCIMAP_CFG; | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 70 | mmiowb(); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 |  | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 72 | addrp = CFG_SPACE_REG(addr & 0xffff); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | if (access_type == PCI_ACCESS_WRITE) { | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 74 | writel(cpu_to_le32(*data), addrp); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | /* Wait till done */ | 
|  | 76 | while (BONITO_PCIMSTAT & 0xF); | 
|  | 77 | } else { | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 78 | *data = le32_to_cpu(readl(addrp)); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | } | 
|  | 80 |  | 
|  | 81 | /* Detect Master/Target abort */ | 
|  | 82 | if (BONITO_PCICMD & (BONITO_PCICMD_MABORT_CLR | | 
|  | 83 | BONITO_PCICMD_MTABORT_CLR)) { | 
|  | 84 | /* Error occurred */ | 
|  | 85 |  | 
|  | 86 | /* Clear bits */ | 
|  | 87 | BONITO_PCICMD |= (BONITO_PCICMD_MABORT_CLR | | 
|  | 88 | BONITO_PCICMD_MTABORT_CLR); | 
|  | 89 |  | 
|  | 90 | return -1; | 
|  | 91 | } | 
|  | 92 |  | 
|  | 93 | return 0; | 
| Songmao Tian | 42d226c | 2007-06-06 14:52:38 +0800 | [diff] [blame] | 94 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | } | 
|  | 96 |  | 
|  | 97 |  | 
|  | 98 | /* | 
|  | 99 | * We can't address 8 and 16 bit words directly.  Instead we have to | 
|  | 100 | * read/write a 32bit word and mask/modify the data we actually want. | 
|  | 101 | */ | 
|  | 102 | static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn, | 
|  | 103 | int where, int size, u32 * val) | 
|  | 104 | { | 
|  | 105 | u32 data = 0; | 
|  | 106 |  | 
|  | 107 | if ((size == 2) && (where & 1)) | 
|  | 108 | return PCIBIOS_BAD_REGISTER_NUMBER; | 
|  | 109 | else if ((size == 4) && (where & 3)) | 
|  | 110 | return PCIBIOS_BAD_REGISTER_NUMBER; | 
|  | 111 |  | 
|  | 112 | if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, | 
|  | 113 | &data)) | 
|  | 114 | return -1; | 
|  | 115 |  | 
|  | 116 | if (size == 1) | 
|  | 117 | *val = (data >> ((where & 3) << 3)) & 0xff; | 
|  | 118 | else if (size == 2) | 
|  | 119 | *val = (data >> ((where & 3) << 3)) & 0xffff; | 
|  | 120 | else | 
|  | 121 | *val = data; | 
|  | 122 |  | 
|  | 123 | return PCIBIOS_SUCCESSFUL; | 
|  | 124 | } | 
|  | 125 |  | 
|  | 126 | static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn, | 
|  | 127 | int where, int size, u32 val) | 
|  | 128 | { | 
|  | 129 | u32 data = 0; | 
|  | 130 |  | 
|  | 131 | if ((size == 2) && (where & 1)) | 
|  | 132 | return PCIBIOS_BAD_REGISTER_NUMBER; | 
|  | 133 | else if ((size == 4) && (where & 3)) | 
|  | 134 | return PCIBIOS_BAD_REGISTER_NUMBER; | 
|  | 135 |  | 
|  | 136 | if (size == 4) | 
|  | 137 | data = val; | 
|  | 138 | else { | 
|  | 139 | if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, | 
|  | 140 | where, &data)) | 
|  | 141 | return -1; | 
|  | 142 |  | 
|  | 143 | if (size == 1) | 
|  | 144 | data = (data & ~(0xff << ((where & 3) << 3))) | | 
|  | 145 | (val << ((where & 3) << 3)); | 
|  | 146 | else if (size == 2) | 
|  | 147 | data = (data & ~(0xffff << ((where & 3) << 3))) | | 
|  | 148 | (val << ((where & 3) << 3)); | 
|  | 149 | } | 
|  | 150 |  | 
|  | 151 | if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, | 
|  | 152 | &data)) | 
|  | 153 | return -1; | 
|  | 154 |  | 
|  | 155 | return PCIBIOS_SUCCESSFUL; | 
|  | 156 | } | 
|  | 157 |  | 
|  | 158 | struct pci_ops bonito64_pci_ops = { | 
|  | 159 | .read = bonito64_pcibios_read, | 
|  | 160 | .write = bonito64_pcibios_write | 
|  | 161 | }; |