| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 1 | #include <linux/kernel.h> | 
| Andi Kleen | 0637a70 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 2 | #include <linux/pci.h> | 
| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 3 | #include <asm/pci-direct.h> | 
|  | 4 | #include <asm/io.h> | 
| Jaswinder Singh Rajput | 8248771 | 2008-12-27 18:32:28 +0530 | [diff] [blame] | 5 | #include <asm/pci_x86.h> | 
| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 6 |  | 
|  | 7 | /* Direct PCI access. This is used for PCI accesses in early boot before | 
|  | 8 | the PCI subsystem works. */ | 
|  | 9 |  | 
| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 10 | u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) | 
|  | 11 | { | 
|  | 12 | u32 v; | 
|  | 13 | outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); | 
|  | 14 | v = inl(0xcfc); | 
|  | 15 | if (v != 0xffffffff) | 
| Thomas Gleixner | cfc1b9a | 2008-07-21 21:35:38 +0200 | [diff] [blame] | 16 | pr_debug("%x reading 4 from %x: %x\n", slot, offset, v); | 
| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 17 | return v; | 
|  | 18 | } | 
|  | 19 |  | 
|  | 20 | u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset) | 
|  | 21 | { | 
|  | 22 | u8 v; | 
|  | 23 | outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); | 
|  | 24 | v = inb(0xcfc + (offset&3)); | 
| Thomas Gleixner | cfc1b9a | 2008-07-21 21:35:38 +0200 | [diff] [blame] | 25 | pr_debug("%x reading 1 from %x: %x\n", slot, offset, v); | 
| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 26 | return v; | 
|  | 27 | } | 
|  | 28 |  | 
|  | 29 | u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset) | 
|  | 30 | { | 
|  | 31 | u16 v; | 
|  | 32 | outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); | 
|  | 33 | v = inw(0xcfc + (offset&2)); | 
| Thomas Gleixner | cfc1b9a | 2008-07-21 21:35:38 +0200 | [diff] [blame] | 34 | pr_debug("%x reading 2 from %x: %x\n", slot, offset, v); | 
| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 35 | return v; | 
|  | 36 | } | 
|  | 37 |  | 
|  | 38 | void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, | 
|  | 39 | u32 val) | 
|  | 40 | { | 
| Thomas Gleixner | cfc1b9a | 2008-07-21 21:35:38 +0200 | [diff] [blame] | 41 | pr_debug("%x writing to %x: %x\n", slot, offset, val); | 
| Andi Kleen | 8f60774 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 42 | outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); | 
|  | 43 | outl(val, 0xcfc); | 
|  | 44 | } | 
| Andi Kleen | 0637a70 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 45 |  | 
| Siddha, Suresh B | 274e1bb | 2006-12-07 02:14:10 +0100 | [diff] [blame] | 46 | void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) | 
|  | 47 | { | 
| Thomas Gleixner | cfc1b9a | 2008-07-21 21:35:38 +0200 | [diff] [blame] | 48 | pr_debug("%x writing to %x: %x\n", slot, offset, val); | 
| Siddha, Suresh B | 274e1bb | 2006-12-07 02:14:10 +0100 | [diff] [blame] | 49 | outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); | 
| Yinghai Lu | e7891c7 | 2008-05-22 14:35:21 -0700 | [diff] [blame] | 50 | outb(val, 0xcfc + (offset&3)); | 
|  | 51 | } | 
|  | 52 |  | 
|  | 53 | void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val) | 
|  | 54 | { | 
| Thomas Gleixner | cfc1b9a | 2008-07-21 21:35:38 +0200 | [diff] [blame] | 55 | pr_debug("%x writing to %x: %x\n", slot, offset, val); | 
| Yinghai Lu | e7891c7 | 2008-05-22 14:35:21 -0700 | [diff] [blame] | 56 | outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); | 
|  | 57 | outw(val, 0xcfc + (offset&2)); | 
| Siddha, Suresh B | 274e1bb | 2006-12-07 02:14:10 +0100 | [diff] [blame] | 58 | } | 
|  | 59 |  | 
| Andi Kleen | 0637a70 | 2006-09-26 10:52:41 +0200 | [diff] [blame] | 60 | int early_pci_allowed(void) | 
|  | 61 | { | 
|  | 62 | return (pci_probe & (PCI_PROBE_CONF1|PCI_PROBE_NOEARLY)) == | 
|  | 63 | PCI_PROBE_CONF1; | 
|  | 64 | } | 
| Yinghai Lu | e3f2bae | 2008-05-22 14:35:11 -0700 | [diff] [blame] | 65 |  | 
|  | 66 | void early_dump_pci_device(u8 bus, u8 slot, u8 func) | 
|  | 67 | { | 
|  | 68 | int i; | 
|  | 69 | int j; | 
|  | 70 | u32 val; | 
|  | 71 |  | 
| Thomas Gleixner | cfc1b9a | 2008-07-21 21:35:38 +0200 | [diff] [blame] | 72 | printk(KERN_INFO "PCI: %02x:%02x:%02x", bus, slot, func); | 
| Yinghai Lu | e3f2bae | 2008-05-22 14:35:11 -0700 | [diff] [blame] | 73 |  | 
|  | 74 | for (i = 0; i < 256; i += 4) { | 
|  | 75 | if (!(i & 0x0f)) | 
|  | 76 | printk("\n%04x:",i); | 
|  | 77 |  | 
|  | 78 | val = read_pci_config(bus, slot, func, i); | 
|  | 79 | for (j = 0; j < 4; j++) { | 
|  | 80 | printk(" %02x", val & 0xff); | 
|  | 81 | val >>= 8; | 
|  | 82 | } | 
|  | 83 | } | 
|  | 84 | printk("\n"); | 
|  | 85 | } | 
|  | 86 |  | 
|  | 87 | void early_dump_pci_devices(void) | 
|  | 88 | { | 
|  | 89 | unsigned bus, slot, func; | 
|  | 90 |  | 
|  | 91 | if (!early_pci_allowed()) | 
|  | 92 | return; | 
|  | 93 |  | 
|  | 94 | for (bus = 0; bus < 256; bus++) { | 
|  | 95 | for (slot = 0; slot < 32; slot++) { | 
|  | 96 | for (func = 0; func < 8; func++) { | 
|  | 97 | u32 class; | 
|  | 98 | u8 type; | 
|  | 99 | class = read_pci_config(bus, slot, func, | 
|  | 100 | PCI_CLASS_REVISION); | 
|  | 101 | if (class == 0xffffffff) | 
|  | 102 | break; | 
|  | 103 |  | 
|  | 104 | early_dump_pci_device(bus, slot, func); | 
|  | 105 |  | 
|  | 106 | /* No multi-function device? */ | 
|  | 107 | type = read_pci_config_byte(bus, slot, func, | 
|  | 108 | PCI_HEADER_TYPE); | 
|  | 109 | if (!(type & 0x80)) | 
|  | 110 | break; | 
|  | 111 | } | 
|  | 112 | } | 
|  | 113 | } | 
|  | 114 | } | 
|  | 115 |  |