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Ben Dooks431107e2010-01-26 10:11:04 +09001/* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
Ben Dooks5718df92008-10-21 14:07:09 +01002 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
18#include <linux/timer.h>
19#include <linux/init.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090020#include <linux/input.h>
Ben Dooks5718df92008-10-21 14:07:09 +010021#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23#include <linux/io.h>
Ben Dooks096941e2008-10-31 16:14:59 +000024#include <linux/i2c.h>
Mark Browna7a81d02010-02-17 18:19:31 +000025#include <linux/leds.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000026#include <linux/fb.h>
27#include <linux/gpio.h>
28#include <linux/delay.h>
Mark Brown3056ea02009-01-27 16:18:01 +000029#include <linux/smsc911x.h>
Mark Brown42015c12009-11-03 14:42:06 +000030#include <linux/regulator/fixed.h>
Mark Brown628e7eb2011-03-04 07:59:20 +090031#include <linux/regulator/machine.h>
Banajit Goswami075d1082011-02-28 17:42:35 +053032#include <linux/pwm_backlight.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000033
Mark Brownecc558a2009-02-17 15:59:38 +000034#ifdef CONFIG_SMDK6410_WM1190_EV1
35#include <linux/mfd/wm8350/core.h>
36#include <linux/mfd/wm8350/pmic.h>
37#endif
Ben Dooks438a5d42008-11-19 15:41:34 +000038
Mark Brown60f91012010-02-17 18:19:29 +000039#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +000040#include <linux/mfd/wm831x/core.h>
Mark Brown60f91012010-02-17 18:19:29 +000041#include <linux/mfd/wm831x/pdata.h>
42#endif
43
Ben Dooks438a5d42008-11-19 15:41:34 +000044#include <video/platform_lcd.h>
Ben Dooks5718df92008-10-21 14:07:09 +010045
Jamie Iles774b51f2011-11-04 01:10:04 +000046#include <asm/hardware/vic.h>
Ben Dooks5718df92008-10-21 14:07:09 +010047#include <asm/mach/arch.h>
48#include <asm/mach/map.h>
49#include <asm/mach/irq.h>
50
51#include <mach/hardware.h>
52#include <mach/map.h>
53
54#include <asm/irq.h>
55#include <asm/mach-types.h>
56
57#include <plat/regs-serial.h>
Ben Dooks3501c9a2010-01-26 10:45:40 +090058#include <mach/regs-modem.h>
59#include <mach/regs-gpio.h>
60#include <mach/regs-sys.h>
61#include <mach/regs-srom.h>
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +090062#include <plat/ata.h>
Ben Dooksd85fa242008-10-31 16:14:52 +000063#include <plat/iic.h>
Ben Dooks438a5d42008-11-19 15:41:34 +000064#include <plat/fb.h>
Mark Brown3056ea02009-01-27 16:18:01 +000065#include <plat/gpio-cfg.h>
Ben Dooks5718df92008-10-21 14:07:09 +010066
Ben Dooks5718df92008-10-21 14:07:09 +010067#include <plat/clock.h>
68#include <plat/devs.h>
69#include <plat/cpu.h>
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +090070#include <plat/adc.h>
71#include <plat/ts.h>
Naveen Krishna Ch290d0982010-06-22 07:39:18 +090072#include <plat/keypad.h>
Banajit Goswami96d78682011-07-20 23:45:22 +090073#include <plat/backlight.h>
Ajay Kumar49965e62011-07-21 01:23:19 +090074#include <plat/regs-fb-v4.h>
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -080075#include <plat/udc-hs.h>
Ben Dooks5718df92008-10-21 14:07:09 +010076
Kukjin Kimb024043b2011-12-22 23:27:42 +010077#include "common.h"
78
Ben Dooks5718df92008-10-21 14:07:09 +010079#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
80#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
81#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
82
83static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
84 [0] = {
85 .hwport = 0,
86 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080087 .ucon = UCON,
88 .ulcon = ULCON,
89 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +010090 },
91 [1] = {
92 .hwport = 1,
93 .flags = 0,
Matt Hsubd258e52009-06-29 19:03:41 +080094 .ucon = UCON,
95 .ulcon = ULCON,
96 .ufcon = UFCON,
97 },
98 [2] = {
99 .hwport = 2,
100 .flags = 0,
101 .ucon = UCON,
102 .ulcon = ULCON,
103 .ufcon = UFCON,
104 },
105 [3] = {
106 .hwport = 3,
107 .flags = 0,
108 .ucon = UCON,
109 .ulcon = ULCON,
110 .ufcon = UFCON,
Ben Dooks5718df92008-10-21 14:07:09 +0100111 },
112};
113
Ben Dooks438a5d42008-11-19 15:41:34 +0000114/* framebuffer and LCD setup. */
115
116/* GPF15 = LCD backlight control
117 * GPF13 => Panel power
118 * GPN5 = LCD nRESET signal
119 * PWM_TOUT1 => backlight brightness
120 */
121
122static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
123 unsigned int power)
124{
125 if (power) {
126 gpio_direction_output(S3C64XX_GPF(13), 1);
Ben Dooks438a5d42008-11-19 15:41:34 +0000127
128 /* fire nRESET on power up */
129 gpio_direction_output(S3C64XX_GPN(5), 0);
130 msleep(10);
131 gpio_direction_output(S3C64XX_GPN(5), 1);
132 msleep(1);
133 } else {
Ben Dooks438a5d42008-11-19 15:41:34 +0000134 gpio_direction_output(S3C64XX_GPF(13), 0);
135 }
136}
137
138static struct plat_lcd_data smdk6410_lcd_power_data = {
139 .set_power = smdk6410_lcd_power_set,
140};
141
142static struct platform_device smdk6410_lcd_powerdev = {
143 .name = "platform-lcd",
144 .dev.parent = &s3c_device_fb.dev,
145 .dev.platform_data = &smdk6410_lcd_power_data,
146};
147
148static struct s3c_fb_pd_win smdk6410_fb_win0 = {
Ben Dooks438a5d42008-11-19 15:41:34 +0000149 .max_bpp = 32,
150 .default_bpp = 16,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530151 .xres = 800,
152 .yres = 480,
Ben Dooks001ca742010-07-26 10:56:40 +0100153 .virtual_y = 480 * 2,
154 .virtual_x = 800,
Ben Dooks438a5d42008-11-19 15:41:34 +0000155};
156
Thomas Abraham79d3c412012-03-24 21:58:48 +0530157static struct fb_videomode smdk6410_lcd_timing = {
158 .left_margin = 8,
159 .right_margin = 13,
160 .upper_margin = 7,
161 .lower_margin = 5,
162 .hsync_len = 3,
163 .vsync_len = 1,
164 .xres = 800,
165 .yres = 480,
166};
167
Ben Dooks438a5d42008-11-19 15:41:34 +0000168/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
169static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
170 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530171 .vtiming = &smdk6410_lcd_timing,
Ben Dooks438a5d42008-11-19 15:41:34 +0000172 .win[0] = &smdk6410_fb_win0,
173 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
174 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
175};
176
Andy Greena4e94692009-12-29 14:40:43 +0000177/*
178 * Configuring Ethernet on SMDK6410
179 *
180 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
181 * The constant address below corresponds to nCS1
182 *
183 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
184 * 2) CFG6 needs to be switched to "LAN9115" side
185 */
186
Mark Brown3056ea02009-01-27 16:18:01 +0000187static struct resource smdk6410_smsc911x_resources[] = {
188 [0] = {
Andy Greenf01fdac2009-12-29 14:40:36 +0000189 .start = S3C64XX_PA_XM0CSN1,
190 .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
Mark Brown3056ea02009-01-27 16:18:01 +0000191 .flags = IORESOURCE_MEM,
192 },
193 [1] = {
194 .start = S3C_EINT(10),
195 .end = S3C_EINT(10),
196 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
197 },
198};
199
200static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
201 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
202 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
203 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
204 .phy_interface = PHY_INTERFACE_MODE_MII,
205};
206
207
208static struct platform_device smdk6410_smsc911x = {
209 .name = "smsc911x",
210 .id = -1,
211 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
212 .resource = &smdk6410_smsc911x_resources[0],
213 .dev = {
214 .platform_data = &smdk6410_smsc911x_pdata,
215 },
216};
217
Mark Brown42015c12009-11-03 14:42:06 +0000218#ifdef CONFIG_REGULATOR
Mark Brownb5930b82011-05-24 08:27:59 +0800219static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] __initdata = {
220 REGULATOR_SUPPLY("PVDD", "0-001b"),
221 REGULATOR_SUPPLY("AVDD", "0-001b"),
Mark Brown42015c12009-11-03 14:42:06 +0000222};
223
224static struct regulator_init_data smdk6410_b_pwr_5v_data = {
225 .constraints = {
226 .always_on = 1,
227 },
228 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
229 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
230};
231
232static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
233 .supply_name = "B_PWR_5V",
234 .microvolts = 5000000,
235 .init_data = &smdk6410_b_pwr_5v_data,
Mark Brownd3cf4482010-01-13 13:57:04 +0000236 .gpio = -EINVAL,
Mark Brown42015c12009-11-03 14:42:06 +0000237};
238
239static struct platform_device smdk6410_b_pwr_5v = {
240 .name = "reg-fixed-voltage",
241 .id = -1,
242 .dev = {
243 .platform_data = &smdk6410_b_pwr_5v_pdata,
244 },
245};
246#endif
247
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900248static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
249 .setup_gpio = s3c64xx_ide_setup_gpio,
250};
251
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900252static uint32_t smdk6410_keymap[] __initdata = {
253 /* KEY(row, col, keycode) */
254 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
255 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
256 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
257 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
258};
259
260static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
261 .keymap = smdk6410_keymap,
262 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
263};
264
265static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
266 .keymap_data = &smdk6410_keymap_data,
267 .rows = 2,
268 .cols = 8,
269};
270
Mark Brown027191a2009-01-23 16:29:43 +0000271static struct map_desc smdk6410_iodesc[] = {};
Ben Dooks5718df92008-10-21 14:07:09 +0100272
273static struct platform_device *smdk6410_devices[] __initdata = {
Ben Dooksb24636c2008-11-03 20:14:53 +0000274#ifdef CONFIG_SMDK6410_SD_CH0
Ben Dooks39057f22008-10-31 16:14:29 +0000275 &s3c_device_hsmmc0,
Ben Dooksb24636c2008-11-03 20:14:53 +0000276#endif
277#ifdef CONFIG_SMDK6410_SD_CH1
278 &s3c_device_hsmmc1,
279#endif
Ben Dooksd85fa242008-10-31 16:14:52 +0000280 &s3c_device_i2c0,
Ben Dooksd7ea3742008-10-31 16:14:57 +0000281 &s3c_device_i2c1,
Ben Dooks438a5d42008-11-19 15:41:34 +0000282 &s3c_device_fb,
Ben Dooksb8132482009-11-23 00:13:39 +0000283 &s3c_device_ohci,
Ben Dooks06fa1d32009-05-16 22:11:20 +0100284 &s3c_device_usb_hsotg,
Jassi Brar83e37b82010-11-22 15:35:53 +0900285 &samsung_asoc_dma,
Mark Brown1f100862010-02-17 19:03:20 +0000286 &s3c64xx_device_iisv4,
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900287 &samsung_device_keypad,
Mark Brown42015c12009-11-03 14:42:06 +0000288
289#ifdef CONFIG_REGULATOR
290 &smdk6410_b_pwr_5v,
291#endif
Ben Dooks438a5d42008-11-19 15:41:34 +0000292 &smdk6410_lcd_powerdev,
Mark Brown3056ea02009-01-27 16:18:01 +0000293
294 &smdk6410_smsc911x,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900295 &s3c_device_adc,
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900296 &s3c_device_cfcon,
Atul Dahiya9bbf4a62010-07-20 16:31:32 +0530297 &s3c_device_rtc,
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900298 &s3c_device_ts,
Banajit Goswamib351c4a2010-05-20 16:21:30 +0900299 &s3c_device_wdt,
Ben Dooks5718df92008-10-21 14:07:09 +0100300};
301
Mark Brown60f91012010-02-17 18:19:29 +0000302#ifdef CONFIG_REGULATOR
303/* ARM core */
304static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
Mark Brownb5930b82011-05-24 08:27:59 +0800305 REGULATOR_SUPPLY("vddarm", NULL),
Mark Brown60f91012010-02-17 18:19:29 +0000306};
307
308/* VDDARM, BUCK1 on J5 */
309static struct regulator_init_data smdk6410_vddarm = {
310 .constraints = {
311 .name = "PVDD_ARM",
312 .min_uV = 1000000,
313 .max_uV = 1300000,
314 .always_on = 1,
315 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
316 },
317 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
318 .consumer_supplies = smdk6410_vddarm_consumers,
319};
320
321/* VDD_INT, BUCK2 on J5 */
322static struct regulator_init_data smdk6410_vddint = {
323 .constraints = {
324 .name = "PVDD_INT",
325 .min_uV = 1000000,
326 .max_uV = 1200000,
327 .always_on = 1,
328 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
329 },
330};
331
332/* VDD_HI, LDO3 on J5 */
333static struct regulator_init_data smdk6410_vddhi = {
334 .constraints = {
335 .name = "PVDD_HI",
336 .always_on = 1,
337 },
338};
339
340/* VDD_PLL, LDO2 on J5 */
341static struct regulator_init_data smdk6410_vddpll = {
342 .constraints = {
343 .name = "PVDD_PLL",
344 .always_on = 1,
345 },
346};
347
348/* VDD_UH_MMC, LDO5 on J5 */
349static struct regulator_init_data smdk6410_vdduh_mmc = {
350 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900351 .name = "PVDD_UH+PVDD_MMC",
Mark Brown60f91012010-02-17 18:19:29 +0000352 .always_on = 1,
353 },
354};
355
356/* VCCM3BT, LDO8 on J5 */
357static struct regulator_init_data smdk6410_vccmc3bt = {
358 .constraints = {
359 .name = "PVCCM3BT",
360 .always_on = 1,
361 },
362};
363
364/* VCCM2MTV, LDO11 on J5 */
365static struct regulator_init_data smdk6410_vccm2mtv = {
366 .constraints = {
367 .name = "PVCCM2MTV",
368 .always_on = 1,
369 },
370};
371
372/* VDD_LCD, LDO12 on J5 */
373static struct regulator_init_data smdk6410_vddlcd = {
374 .constraints = {
375 .name = "PVDD_LCD",
376 .always_on = 1,
377 },
378};
379
380/* VDD_OTGI, LDO9 on J5 */
381static struct regulator_init_data smdk6410_vddotgi = {
382 .constraints = {
383 .name = "PVDD_OTGI",
384 .always_on = 1,
385 },
386};
387
388/* VDD_OTG, LDO14 on J5 */
389static struct regulator_init_data smdk6410_vddotg = {
390 .constraints = {
391 .name = "PVDD_OTG",
392 .always_on = 1,
393 },
394};
395
396/* VDD_ALIVE, LDO15 on J5 */
397static struct regulator_init_data smdk6410_vddalive = {
398 .constraints = {
399 .name = "PVDD_ALIVE",
400 .always_on = 1,
401 },
402};
403
404/* VDD_AUDIO, VLDO_AUDIO on J5 */
405static struct regulator_init_data smdk6410_vddaudio = {
406 .constraints = {
407 .name = "PVDD_AUDIO",
408 .always_on = 1,
409 },
410};
411#endif
412
Mark Brownecc558a2009-02-17 15:59:38 +0000413#ifdef CONFIG_SMDK6410_WM1190_EV1
414/* S3C64xx internal logic & PLL */
415static struct regulator_init_data wm8350_dcdc1_data = {
416 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900417 .name = "PVDD_INT+PVDD_PLL",
Mark Brownecc558a2009-02-17 15:59:38 +0000418 .min_uV = 1200000,
419 .max_uV = 1200000,
420 .always_on = 1,
421 .apply_uV = 1,
422 },
423};
424
425/* Memory */
426static struct regulator_init_data wm8350_dcdc3_data = {
427 .constraints = {
428 .name = "PVDD_MEM",
429 .min_uV = 1800000,
430 .max_uV = 1800000,
431 .always_on = 1,
432 .state_mem = {
433 .uV = 1800000,
434 .mode = REGULATOR_MODE_NORMAL,
435 .enabled = 1,
Mark Brown60f91012010-02-17 18:19:29 +0000436 },
Mark Brownecc558a2009-02-17 15:59:38 +0000437 .initial_state = PM_SUSPEND_MEM,
438 },
439};
440
441/* USB, EXT, PCM, ADC/DAC, USB, MMC */
Mark Brown42015c12009-11-03 14:42:06 +0000442static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
Mark Brownb5930b82011-05-24 08:27:59 +0800443 REGULATOR_SUPPLY("DVDD", "0-001b"),
Mark Brown42015c12009-11-03 14:42:06 +0000444};
445
Mark Brownecc558a2009-02-17 15:59:38 +0000446static struct regulator_init_data wm8350_dcdc4_data = {
447 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900448 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
Mark Brownecc558a2009-02-17 15:59:38 +0000449 .min_uV = 3000000,
450 .max_uV = 3000000,
451 .always_on = 1,
452 },
Mark Brown42015c12009-11-03 14:42:06 +0000453 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
454 .consumer_supplies = wm8350_dcdc4_consumers,
Mark Brownecc558a2009-02-17 15:59:38 +0000455};
456
Mark Brownecc558a2009-02-17 15:59:38 +0000457/* OTGi/1190-EV1 HPVDD & AVDD */
458static struct regulator_init_data wm8350_ldo4_data = {
459 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900460 .name = "PVDD_OTGI+HPVDD+AVDD",
Mark Brownecc558a2009-02-17 15:59:38 +0000461 .min_uV = 1200000,
462 .max_uV = 1200000,
463 .apply_uV = 1,
Mark Brownf53aee22009-04-09 16:30:40 +0100464 .always_on = 1,
Mark Brownecc558a2009-02-17 15:59:38 +0000465 },
466};
467
468static struct {
469 int regulator;
470 struct regulator_init_data *initdata;
471} wm1190_regulators[] = {
472 { WM8350_DCDC_1, &wm8350_dcdc1_data },
473 { WM8350_DCDC_3, &wm8350_dcdc3_data },
474 { WM8350_DCDC_4, &wm8350_dcdc4_data },
Mark Brown60f91012010-02-17 18:19:29 +0000475 { WM8350_DCDC_6, &smdk6410_vddarm },
476 { WM8350_LDO_1, &smdk6410_vddalive },
477 { WM8350_LDO_2, &smdk6410_vddotg },
478 { WM8350_LDO_3, &smdk6410_vddlcd },
Mark Brownecc558a2009-02-17 15:59:38 +0000479 { WM8350_LDO_4, &wm8350_ldo4_data },
480};
481
482static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
483{
484 int i;
485
Mark Browna3323b72009-11-03 14:42:04 +0000486 /* Configure the IRQ line */
487 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
488
Mark Brownecc558a2009-02-17 15:59:38 +0000489 /* Instantiate the regulators */
490 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
491 wm8350_register_regulator(wm8350,
492 wm1190_regulators[i].regulator,
493 wm1190_regulators[i].initdata);
494
495 return 0;
496}
497
498static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
499 .init = smdk6410_wm8350_init,
Mark Browndb9256f2009-04-09 19:00:19 +0100500 .irq_high = 1,
Mark Brown9fca8782010-01-19 15:26:56 +0000501 .irq_base = IRQ_BOARD_START,
Mark Brownecc558a2009-02-17 15:59:38 +0000502};
503#endif
504
Mark Brown60f91012010-02-17 18:19:29 +0000505#ifdef CONFIG_SMDK6410_WM1192_EV1
Mark Browna7a81d02010-02-17 18:19:31 +0000506static struct gpio_led wm1192_pmic_leds[] = {
507 {
508 .name = "PMIC:red:power",
509 .gpio = GPIO_BOARD_START + 3,
510 .default_state = LEDS_GPIO_DEFSTATE_ON,
511 },
512};
513
514static struct gpio_led_platform_data wm1192_pmic_led = {
515 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
516 .leds = wm1192_pmic_leds,
517};
518
519static struct platform_device wm1192_pmic_led_dev = {
520 .name = "leds-gpio",
521 .id = -1,
522 .dev = {
523 .platform_data = &wm1192_pmic_led,
524 },
525};
526
Mark Brown60f91012010-02-17 18:19:29 +0000527static int wm1192_pre_init(struct wm831x *wm831x)
528{
Mark Browna7a81d02010-02-17 18:19:31 +0000529 int ret;
530
Mark Brown60f91012010-02-17 18:19:29 +0000531 /* Configure the IRQ line */
532 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
533
Mark Browna7a81d02010-02-17 18:19:31 +0000534 ret = platform_device_register(&wm1192_pmic_led_dev);
535 if (ret != 0)
536 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
537
Mark Brown60f91012010-02-17 18:19:29 +0000538 return 0;
539}
540
541static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
542 .isink = 1,
543 .max_uA = 27554,
544};
545
546static struct regulator_init_data wm1192_dcdc3 = {
547 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900548 .name = "PVDD_MEM+PVDD_GPS",
Mark Brown60f91012010-02-17 18:19:29 +0000549 .always_on = 1,
550 },
551};
552
553static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
Mark Brownb5930b82011-05-24 08:27:59 +0800554 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
Mark Brown60f91012010-02-17 18:19:29 +0000555};
556
557static struct regulator_init_data wm1192_ldo1 = {
558 .constraints = {
Mark Brown18b52ca2011-03-04 08:24:15 +0900559 .name = "PVDD_LCD+PVDD_EXT",
Mark Brown60f91012010-02-17 18:19:29 +0000560 .always_on = 1,
561 },
562 .consumer_supplies = wm1192_ldo1_consumers,
563 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
564};
565
566static struct wm831x_status_pdata wm1192_led7_pdata = {
567 .name = "LED7:green:",
568};
569
570static struct wm831x_status_pdata wm1192_led8_pdata = {
571 .name = "LED8:green:",
572};
573
574static struct wm831x_pdata smdk6410_wm1192_pdata = {
575 .pre_init = wm1192_pre_init,
576 .irq_base = IRQ_BOARD_START,
577
578 .backlight = &wm1192_backlight_pdata,
579 .dcdc = {
580 &smdk6410_vddarm, /* DCDC1 */
581 &smdk6410_vddint, /* DCDC2 */
582 &wm1192_dcdc3,
583 },
Mark Browna7a81d02010-02-17 18:19:31 +0000584 .gpio_base = GPIO_BOARD_START,
Mark Brown60f91012010-02-17 18:19:29 +0000585 .ldo = {
586 &wm1192_ldo1, /* LDO1 */
587 &smdk6410_vdduh_mmc, /* LDO2 */
588 NULL, /* LDO3 NC */
589 &smdk6410_vddotgi, /* LDO4 */
590 &smdk6410_vddotg, /* LDO5 */
591 &smdk6410_vddhi, /* LDO6 */
592 &smdk6410_vddaudio, /* LDO7 */
593 &smdk6410_vccm2mtv, /* LDO8 */
594 &smdk6410_vddpll, /* LDO9 */
595 &smdk6410_vccmc3bt, /* LDO10 */
596 &smdk6410_vddalive, /* LDO11 */
597 },
598 .status = {
599 &wm1192_led7_pdata,
600 &wm1192_led8_pdata,
601 },
602};
603#endif
604
Ben Dooks096941e2008-10-31 16:14:59 +0000605static struct i2c_board_info i2c_devs0[] __initdata = {
606 { I2C_BOARD_INFO("24c08", 0x50), },
Mark Brown77897472009-01-23 16:29:41 +0000607 { I2C_BOARD_INFO("wm8580", 0x1b), },
Mark Brownecc558a2009-02-17 15:59:38 +0000608
Mark Brown60f91012010-02-17 18:19:29 +0000609#ifdef CONFIG_SMDK6410_WM1192_EV1
610 { I2C_BOARD_INFO("wm8312", 0x34),
611 .platform_data = &smdk6410_wm1192_pdata,
612 .irq = S3C_EINT(12),
613 },
614#endif
615
Mark Brownecc558a2009-02-17 15:59:38 +0000616#ifdef CONFIG_SMDK6410_WM1190_EV1
617 { I2C_BOARD_INFO("wm8350", 0x1a),
618 .platform_data = &smdk6410_wm8350_pdata,
619 .irq = S3C_EINT(12),
620 },
621#endif
Ben Dooks096941e2008-10-31 16:14:59 +0000622};
623
624static struct i2c_board_info i2c_devs1[] __initdata = {
625 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
Ben Dooks5718df92008-10-21 14:07:09 +0100626};
627
Banajit Goswami96d78682011-07-20 23:45:22 +0900628/* LCD Backlight data */
629static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
630 .no = S3C64XX_GPF(15),
631 .func = S3C_GPIO_SFN(2),
632};
633
634static struct platform_pwm_backlight_data smdk6410_bl_data = {
635 .pwm_id = 1,
636};
637
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800638static struct s3c_hsotg_plat smdk6410_hsotg_pdata;
639
Ben Dooks5718df92008-10-21 14:07:09 +0100640static void __init smdk6410_map_io(void)
641{
Ben Dooksd6662c32008-12-12 00:24:40 +0000642 u32 tmp;
643
Ben Dooks5718df92008-10-21 14:07:09 +0100644 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
645 s3c24xx_init_clocks(12000000);
646 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
Ben Dooksd6662c32008-12-12 00:24:40 +0000647
648 /* set the LCD type */
649
650 tmp = __raw_readl(S3C64XX_SPCON);
651 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
652 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
653 __raw_writel(tmp, S3C64XX_SPCON);
654
655 /* remove the lcd bypass */
656 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
657 tmp &= ~MIFPCON_LCD_BYPASS;
658 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
Ben Dooks5718df92008-10-21 14:07:09 +0100659}
660
661static void __init smdk6410_machine_init(void)
662{
Andy Greenf01fdac2009-12-29 14:40:36 +0000663 u32 cs1;
664
Ben Dooksd85fa242008-10-31 16:14:52 +0000665 s3c_i2c0_set_platdata(NULL);
Ben Dooksd7ea3742008-10-31 16:14:57 +0000666 s3c_i2c1_set_platdata(NULL);
Ben Dooks438a5d42008-11-19 15:41:34 +0000667 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
Joonyoung Shim99f6e1f2012-03-07 04:23:47 -0800668 s3c_hsotg_set_platdata(&smdk6410_hsotg_pdata);
Ben Dooks096941e2008-10-31 16:14:59 +0000669
Naveen Krishna Ch290d0982010-06-22 07:39:18 +0900670 samsung_keypad_set_platdata(&smdk6410_keypad_data);
671
Naveen Krishna Chatradhi08047652011-08-19 21:56:10 +0900672 s3c24xx_ts_set_platdata(NULL);
Naveen Krishna Ch85b14a32010-05-20 11:39:52 +0900673
Andy Greenf01fdac2009-12-29 14:40:36 +0000674 /* configure nCS1 width to 16 bits */
675
676 cs1 = __raw_readl(S3C64XX_SROM_BW) &
677 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
678 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
679 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
680 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
681 S3C64XX_SROM_BW__NCS1__SHIFT;
682 __raw_writel(cs1, S3C64XX_SROM_BW);
683
684 /* set timing for nCS1 suitable for ethernet chip */
685
686 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
687 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
688 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
689 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
690 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
691 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
692 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
693
Mark Brownb7f9a942009-04-08 16:12:35 +0100694 gpio_request(S3C64XX_GPN(5), "LCD power");
695 gpio_request(S3C64XX_GPF(13), "LCD power");
Mark Brownb7f9a942009-04-08 16:12:35 +0100696
Ben Dooks096941e2008-10-31 16:14:59 +0000697 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
698 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
699
Abhilash Kesavan0ab0b6d2010-06-08 16:55:45 +0900700 s3c_ide_set_platdata(&smdk6410_ide_pdata);
701
Banajit Goswami96d78682011-07-20 23:45:22 +0900702 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
703
Ben Dooks5718df92008-10-21 14:07:09 +0100704 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
705}
706
707MACHINE_START(SMDK6410, "SMDK6410")
Ben Dooksafdd2252010-05-07 09:24:05 +0900708 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
Nicolas Pitre170a5902011-07-05 22:38:17 -0400709 .atag_offset = 0x100,
Ben Dooks5718df92008-10-21 14:07:09 +0100710
711 .init_irq = s3c6410_init_irq,
Jamie Iles774b51f2011-11-04 01:10:04 +0000712 .handle_irq = vic_handle_irq,
Ben Dooks5718df92008-10-21 14:07:09 +0100713 .map_io = smdk6410_map_io,
714 .init_machine = smdk6410_machine_init,
715 .timer = &s3c24xx_timer,
Kukjin Kimff84ded2012-01-03 14:03:30 +0100716 .restart = s3c64xx_restart,
Ben Dooks5718df92008-10-21 14:07:09 +0100717MACHINE_END