| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef __ASMARM_TLB_H | 
 | 2 | #define __ASMARM_TLB_H | 
 | 3 |  | 
 | 4 | #include <asm/pgalloc.h> | 
 | 5 | #include <asm/tlbflush.h> | 
 | 6 |  | 
 | 7 | /* | 
 | 8 |  * TLB handling.  This allows us to remove pages from the page | 
 | 9 |  * tables, and efficiently handle the TLB issues. | 
 | 10 |  */ | 
 | 11 | struct mmu_gather { | 
 | 12 |         struct mm_struct        *mm; | 
| Hugh Dickins | fc2acab | 2005-10-29 18:16:03 -0700 | [diff] [blame] | 13 |         unsigned int            need_flush; | 
 | 14 |         unsigned int            fullmm; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 15 | }; | 
 | 16 |  | 
| Hugh Dickins | 15a23ff | 2005-10-29 18:16:01 -0700 | [diff] [blame] | 17 | DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 |  | 
 | 19 | static inline struct mmu_gather * | 
 | 20 | tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) | 
 | 21 | { | 
| Hugh Dickins | 15a23ff | 2005-10-29 18:16:01 -0700 | [diff] [blame] | 22 |         struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 |  | 
 | 24 |         tlb->mm = mm; | 
| Hugh Dickins | fc2acab | 2005-10-29 18:16:03 -0700 | [diff] [blame] | 25 |         tlb->need_flush = 0; | 
 | 26 |         tlb->fullmm = full_mm_flush; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 |  | 
 | 28 |         return tlb; | 
 | 29 | } | 
 | 30 |  | 
 | 31 | static inline void | 
 | 32 | tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) | 
 | 33 | { | 
| Hugh Dickins | fc2acab | 2005-10-29 18:16:03 -0700 | [diff] [blame] | 34 |         if (tlb->need_flush) | 
 | 35 |                 flush_tlb_mm(tlb->mm); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 |  | 
 | 37 |         /* keep the page table cache within bounds */ | 
 | 38 |         check_pgt_cache(); | 
| Hugh Dickins | 15a23ff | 2005-10-29 18:16:01 -0700 | [diff] [blame] | 39 |  | 
 | 40 |         put_cpu_var(mmu_gathers); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | } | 
 | 42 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #define tlb_remove_tlb_entry(tlb,ptep,address)  do { } while (0) | 
 | 44 | //#define tlb_start_vma(tlb,vma)                  do { } while (0) | 
 | 45 | //FIXME - ARM32 uses this now that things changed in the kernel. seems like it may be pointless on arm26, however to get things compiling... | 
 | 46 | #define tlb_start_vma(tlb,vma)                                          \ | 
 | 47 |         do {                                                            \ | 
 | 48 |                 if (!tlb->fullmm)                                       \ | 
 | 49 |                         flush_cache_range(vma, vma->vm_start, vma->vm_end); \ | 
 | 50 |         } while (0) | 
 | 51 | #define tlb_end_vma(tlb,vma)                    do { } while (0) | 
 | 52 |  | 
| Hugh Dickins | fc2acab | 2005-10-29 18:16:03 -0700 | [diff] [blame] | 53 | static inline void | 
 | 54 | tlb_remove_page(struct mmu_gather *tlb, struct page *page) | 
 | 55 | { | 
 | 56 |         tlb->need_flush = 1; | 
 | 57 |         free_page_and_swap_cache(page); | 
 | 58 | } | 
 | 59 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | #define pte_free_tlb(tlb,ptep)          pte_free(ptep) | 
 | 61 | #define pmd_free_tlb(tlb,pmdp)          pmd_free(pmdp) | 
 | 62 |  | 
 | 63 | #endif |