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Ralf Baechle38b18f722005-02-03 14:28:23 +00001config SIBYTE_SB1250
2 bool
3 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +01004 select IRQ_CPU
Ralf Baechleca6f5492007-03-09 12:17:32 +00005 select SIBYTE_ENABLE_LDT_IF_PCI
Mark Masond619f382007-03-29 11:39:56 -07006 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +00007 select SIBYTE_SB1xxx_SOC
Ralf Baechlee73ea272006-06-04 11:51:46 +01008 select SYS_SUPPORTS_SMP
Ralf Baechle38b18f722005-02-03 14:28:23 +00009
10config SIBYTE_BCM1120
11 bool
Ralf Baechle7bcf7712007-10-11 23:46:09 +010012 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000013 select SIBYTE_BCM112X
Ralf Baechlebb9b8132007-03-09 15:59:56 +000014 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000015 select SIBYTE_SB1xxx_SOC
16
17config SIBYTE_BCM1125
18 bool
19 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010020 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000021 select SIBYTE_BCM112X
Ralf Baechlebb9b8132007-03-09 15:59:56 +000022 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000023 select SIBYTE_SB1xxx_SOC
24
25config SIBYTE_BCM1125H
26 bool
27 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010028 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000029 select SIBYTE_BCM112X
Ralf Baechleca6f5492007-03-09 12:17:32 +000030 select SIBYTE_ENABLE_LDT_IF_PCI
Ralf Baechlebb9b8132007-03-09 15:59:56 +000031 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000032 select SIBYTE_SB1xxx_SOC
33
34config SIBYTE_BCM112X
35 bool
Ralf Baechle7bcf7712007-10-11 23:46:09 +010036 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000037 select SIBYTE_SB1xxx_SOC
Ralf Baechlebb9b8132007-03-09 15:59:56 +000038 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +000039
Andrew Isaacsonf137e462005-10-19 23:56:38 -070040config SIBYTE_BCM1x80
41 bool
42 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010043 select IRQ_CPU
Mark Masond619f382007-03-29 11:39:56 -070044 select SIBYTE_HAS_ZBUS_PROFILING
Andrew Isaacsonf137e462005-10-19 23:56:38 -070045 select SIBYTE_SB1xxx_SOC
Ralf Baechlee73ea272006-06-04 11:51:46 +010046 select SYS_SUPPORTS_SMP
Andrew Isaacsonf137e462005-10-19 23:56:38 -070047
48config SIBYTE_BCM1x55
49 bool
50 select HW_HAS_PCI
Ralf Baechle7bcf7712007-10-11 23:46:09 +010051 select IRQ_CPU
Andrew Isaacsonf137e462005-10-19 23:56:38 -070052 select SIBYTE_SB1xxx_SOC
Ralf Baechlebb9b8132007-03-09 15:59:56 +000053 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechlee73ea272006-06-04 11:51:46 +010054 select SYS_SUPPORTS_SMP
Andrew Isaacsonf137e462005-10-19 23:56:38 -070055
Ralf Baechle38b18f722005-02-03 14:28:23 +000056config SIBYTE_SB1xxx_SOC
57 bool
Ralf Baechle38b18f722005-02-03 14:28:23 +000058 select DMA_COHERENT
Ralf Baechle7bcf7712007-10-11 23:46:09 +010059 select IRQ_CPU
Ralf Baechle38b18f722005-02-03 14:28:23 +000060 select SIBYTE_CFE
61 select SWAP_IO_SPACE
62 select SYS_SUPPORTS_32BIT_KERNEL
63 select SYS_SUPPORTS_64BIT_KERNEL
64
65choice
66 prompt "SiByte SOC Stepping"
67 depends on SIBYTE_SB1xxx_SOC
68
69config CPU_SB1_PASS_1
70 bool "1250 Pass1"
71 depends on SIBYTE_SB1250
72 select CPU_HAS_PREFETCH
73
74config CPU_SB1_PASS_2_1250
75 bool "1250 An"
76 depends on SIBYTE_SB1250
77 select CPU_SB1_PASS_2
78 help
79 Also called BCM1250 Pass 2
80
81config CPU_SB1_PASS_2_2
82 bool "1250 Bn"
83 depends on SIBYTE_SB1250
84 select CPU_HAS_PREFETCH
85 help
86 Also called BCM1250 Pass 2.2
87
88config CPU_SB1_PASS_4
89 bool "1250 Cn"
90 depends on SIBYTE_SB1250
91 select CPU_HAS_PREFETCH
92 help
93 Also called BCM1250 Pass 3
94
95config CPU_SB1_PASS_2_112x
96 bool "112x Hybrid"
97 depends on SIBYTE_BCM112X
98 select CPU_SB1_PASS_2
99
100config CPU_SB1_PASS_3
101 bool "112x An"
102 depends on SIBYTE_BCM112X
103 select CPU_HAS_PREFETCH
104
105endchoice
106
107config CPU_SB1_PASS_2
108 bool
109
110config SIBYTE_HAS_LDT
111 bool
Ralf Baechleca6f5492007-03-09 12:17:32 +0000112
113config SIBYTE_ENABLE_LDT_IF_PCI
114 bool
115 select SIBYTE_HAS_LDT if PCI
Ralf Baechle38b18f722005-02-03 14:28:23 +0000116
117config SIMULATION
118 bool "Running under simulation"
119 depends on SIBYTE_SB1xxx_SOC
120 help
121 Build a kernel suitable for running under the GDB simulator.
122 Primarily adjusts the kernel's notion of time.
123
Ralf Baechle77607632005-11-10 16:32:14 +0000124config SB1_CEX_ALWAYS_FATAL
Andrew Isaacsona4b5bd92005-10-19 23:57:40 -0700125 bool "All cache exceptions considered fatal (no recovery attempted)"
126 depends on SIBYTE_SB1xxx_SOC
127
Ralf Baechle77607632005-11-10 16:32:14 +0000128config SB1_CERR_STALL
Andrew Isaacsona4b5bd92005-10-19 23:57:40 -0700129 bool "Stall (rather than panic) on fatal cache error"
130 depends on SIBYTE_SB1xxx_SOC
131
Ralf Baechle38b18f722005-02-03 14:28:23 +0000132config SIBYTE_CFE
133 bool "Booting from CFE"
134 depends on SIBYTE_SB1xxx_SOC
Aurelien Jarnodf78b5c2007-09-05 08:58:26 +0200135 select CFE
Ralf Baechle36a88532007-03-01 11:56:43 +0000136 select SYS_HAS_EARLY_PRINTK
Ralf Baechle38b18f722005-02-03 14:28:23 +0000137 help
138 Make use of the CFE API for enumerating available memory,
139 controlling secondary CPUs, and possibly console output.
140
141config SIBYTE_CFE_CONSOLE
142 bool "Use firmware console"
143 depends on SIBYTE_CFE
144 help
145 Use the CFE API's console write routines during boot. Other console
146 options (VT console, sb1250 duart console, etc.) should not be
147 configured.
148
149config SIBYTE_STANDALONE
150 bool
151 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
Ralf Baechle36a88532007-03-01 11:56:43 +0000152 select SYS_HAS_EARLY_PRINTK
Ralf Baechle38b18f722005-02-03 14:28:23 +0000153 default y
154
155config SIBYTE_STANDALONE_RAM_SIZE
156 int "Memory size (in megabytes)"
157 depends on SIBYTE_STANDALONE
158 default "32"
159
160config SIBYTE_BUS_WATCHER
161 bool "Support for Bus Watcher statistics"
162 depends on SIBYTE_SB1xxx_SOC
163 help
164 Handle and keep statistics on the bus error interrupts (COR_ECC,
165 BAD_ECC, IO_BUS).
166
167config SIBYTE_BW_TRACE
168 bool "Capture bus trace before bus error"
169 depends on SIBYTE_BUS_WATCHER
170 help
171 Run a continuous bus trace, dumping the raw data as soon as
172 a ZBbus error is detected. Cannot work if ZBbus profiling
173 is turned on, and also will interfere with JTAG-based trace
174 buffer activity. Raw buffer data is dumped to console, and
175 must be processed off-line.
176
Ralf Baechle38b18f722005-02-03 14:28:23 +0000177config SIBYTE_TBPROF
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000178 tristate "Support for ZBbus profiling"
179 depends on SIBYTE_HAS_ZBUS_PROFILING
180
181config SIBYTE_HAS_ZBUS_PROFILING
182 bool