| Antti Palosaari | 7f882c2 | 2012-03-30 09:10:08 -0300 | [diff] [blame^] | 1 | /* |
| 2 | * Afatech AF9035 DVB USB driver |
| 3 | * |
| 4 | * Copyright (C) 2009 Antti Palosaari <crope@iki.fi> |
| 5 | * Copyright (C) 2012 Antti Palosaari <crope@iki.fi> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along |
| 18 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
| 20 | */ |
| 21 | |
| 22 | #ifndef AF9035_H |
| 23 | #define AF9035_H |
| 24 | |
| 25 | #include "dvb-usb.h" |
| 26 | |
| 27 | struct reg_val { |
| 28 | u32 reg; |
| 29 | u8 val; |
| 30 | }; |
| 31 | |
| 32 | struct reg_val_mask { |
| 33 | u32 reg; |
| 34 | u8 val; |
| 35 | u8 mask; |
| 36 | }; |
| 37 | |
| 38 | struct usb_req { |
| 39 | u8 cmd; |
| 40 | u8 mbox; |
| 41 | u8 wlen; |
| 42 | u8 *wbuf; |
| 43 | u8 rlen; |
| 44 | u8 *rbuf; |
| 45 | }; |
| 46 | |
| 47 | struct config { |
| 48 | bool dual_mode; |
| 49 | }; |
| 50 | |
| 51 | struct fw_segment { |
| 52 | #define SEGMENT_FW_DL 0 |
| 53 | #define SEGMENT_ROM_COPY 1 |
| 54 | #define SEGMENT_DIRECT_CMD 2 |
| 55 | u8 type; |
| 56 | u32 len; |
| 57 | }; |
| 58 | |
| 59 | struct fw_header { |
| 60 | #define SEGMENT_MAX_COUNT 6 |
| 61 | u8 segment_count; |
| 62 | struct fw_segment segment[SEGMENT_MAX_COUNT]; |
| 63 | }; |
| 64 | |
| 65 | u32 clock_lut[] = { |
| 66 | 20480000, /* FPGA */ |
| 67 | 16384000, /* 16.38 MHz */ |
| 68 | 20480000, /* 20.48 MHz */ |
| 69 | 36000000, /* 36.00 MHz */ |
| 70 | 30000000, /* 30.00 MHz */ |
| 71 | 26000000, /* 26.00 MHz */ |
| 72 | 28000000, /* 28.00 MHz */ |
| 73 | 32000000, /* 32.00 MHz */ |
| 74 | 34000000, /* 34.00 MHz */ |
| 75 | 24000000, /* 24.00 MHz */ |
| 76 | 22000000, /* 22.00 MHz */ |
| 77 | 12000000, /* 12.00 MHz */ |
| 78 | }; |
| 79 | |
| 80 | /* EEPROM locations */ |
| 81 | #define EEPROM_IR_MODE 0x430d |
| 82 | #define EEPROM_DUAL_MODE 0x4326 |
| 83 | #define EEPROM_IR_TYPE 0x4329 |
| 84 | #define EEPROM_1_IFFREQ_L 0x432d |
| 85 | #define EEPROM_1_IFFREQ_H 0x432e |
| 86 | #define EEPROM_1_TUNER_ID 0x4331 |
| 87 | #define EEPROM_2_IFFREQ_L 0x433d |
| 88 | #define EEPROM_2_IFFREQ_H 0x433e |
| 89 | #define EEPROM_2_TUNER_ID 0x4341 |
| 90 | |
| 91 | /* USB commands */ |
| 92 | #define CMD_MEM_RD 0x00 |
| 93 | #define CMD_MEM_WR 0x01 |
| 94 | #define CMD_I2C_RD 0x02 |
| 95 | #define CMD_I2C_WR 0x03 |
| 96 | #define CMD_FW_DL 0x21 |
| 97 | #define CMD_FW_QUERYINFO 0x22 |
| 98 | #define CMD_FW_BOOT 0x23 |
| 99 | #define CMD_FW_DL_BEGIN 0x24 |
| 100 | #define CMD_FW_DL_END 0x25 |
| 101 | |
| 102 | #endif |