| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * core routines for the asynchronous memory transfer/transform api | 
 | 3 |  * | 
 | 4 |  * Copyright © 2006, Intel Corporation. | 
 | 5 |  * | 
 | 6 |  *	Dan Williams <dan.j.williams@intel.com> | 
 | 7 |  * | 
 | 8 |  *	with architecture considerations by: | 
 | 9 |  *	Neil Brown <neilb@suse.de> | 
 | 10 |  *	Jeff Garzik <jeff@garzik.org> | 
 | 11 |  * | 
 | 12 |  * This program is free software; you can redistribute it and/or modify it | 
 | 13 |  * under the terms and conditions of the GNU General Public License, | 
 | 14 |  * version 2, as published by the Free Software Foundation. | 
 | 15 |  * | 
 | 16 |  * This program is distributed in the hope it will be useful, but WITHOUT | 
 | 17 |  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
 | 18 |  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for | 
 | 19 |  * more details. | 
 | 20 |  * | 
 | 21 |  * You should have received a copy of the GNU General Public License along with | 
 | 22 |  * this program; if not, write to the Free Software Foundation, Inc., | 
 | 23 |  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | 
 | 24 |  * | 
 | 25 |  */ | 
| Franck Bui-Huu | 8252474 | 2008-05-12 21:21:05 +0200 | [diff] [blame] | 26 | #include <linux/rculist.h> | 
| Paul Gortmaker | 4bb33cc | 2011-05-27 14:41:48 -0400 | [diff] [blame] | 27 | #include <linux/module.h> | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 28 | #include <linux/kernel.h> | 
 | 29 | #include <linux/async_tx.h> | 
 | 30 |  | 
 | 31 | #ifdef CONFIG_DMA_ENGINE | 
| Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 32 | static int __init async_tx_init(void) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 33 | { | 
| Dan Williams | 729b5d1 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 34 | 	async_dmaengine_get(); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 35 |  | 
 | 36 | 	printk(KERN_INFO "async_tx: api initialized (async)\n"); | 
 | 37 |  | 
 | 38 | 	return 0; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 39 | } | 
 | 40 |  | 
 | 41 | static void __exit async_tx_exit(void) | 
 | 42 | { | 
| Dan Williams | 729b5d1 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 43 | 	async_dmaengine_put(); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 44 | } | 
 | 45 |  | 
| Dan Williams | af1f951 | 2009-08-29 19:09:26 -0700 | [diff] [blame] | 46 | module_init(async_tx_init); | 
 | 47 | module_exit(async_tx_exit); | 
 | 48 |  | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 49 | /** | 
| Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 50 |  * __async_tx_find_channel - find a channel to carry out the operation or let | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 51 |  *	the transaction execute synchronously | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 52 |  * @submit: transaction dependency and submission modifiers | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 53 |  * @tx_type: transaction type | 
 | 54 |  */ | 
 | 55 | struct dma_chan * | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 56 | __async_tx_find_channel(struct async_submit_ctl *submit, | 
 | 57 | 			enum dma_transaction_type tx_type) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 58 | { | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 59 | 	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; | 
 | 60 |  | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 61 | 	/* see if we can keep the chain on one channel */ | 
 | 62 | 	if (depend_tx && | 
| Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 63 | 	    dma_has_cap(tx_type, depend_tx->chan->device->cap_mask)) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 64 | 		return depend_tx->chan; | 
| Dan Williams | 729b5d1 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 65 | 	return async_dma_find_channel(tx_type); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 66 | } | 
| Dan Williams | 47437b2 | 2008-02-02 19:49:59 -0700 | [diff] [blame] | 67 | EXPORT_SYMBOL_GPL(__async_tx_find_channel); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 68 | #endif | 
 | 69 |  | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 70 |  | 
 | 71 | /** | 
 | 72 |  * async_tx_channel_switch - queue an interrupt descriptor with a dependency | 
 | 73 |  * 	pre-attached. | 
 | 74 |  * @depend_tx: the operation that must finish before the new operation runs | 
 | 75 |  * @tx: the new operation | 
 | 76 |  */ | 
 | 77 | static void | 
 | 78 | async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx, | 
 | 79 | 			struct dma_async_tx_descriptor *tx) | 
 | 80 | { | 
| Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 81 | 	struct dma_chan *chan = depend_tx->chan; | 
 | 82 | 	struct dma_device *device = chan->device; | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 83 | 	struct dma_async_tx_descriptor *intr_tx = (void *) ~0; | 
 | 84 |  | 
 | 85 | 	/* first check to see if we can still append to depend_tx */ | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 86 | 	txd_lock(depend_tx); | 
 | 87 | 	if (txd_parent(depend_tx) && depend_tx->chan == tx->chan) { | 
 | 88 | 		txd_chain(depend_tx, tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 89 | 		intr_tx = NULL; | 
 | 90 | 	} | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 91 | 	txd_unlock(depend_tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 92 |  | 
| Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 93 | 	/* attached dependency, flush the parent channel */ | 
 | 94 | 	if (!intr_tx) { | 
 | 95 | 		device->device_issue_pending(chan); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 96 | 		return; | 
| Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 97 | 	} | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 98 |  | 
 | 99 | 	/* see if we can schedule an interrupt | 
 | 100 | 	 * otherwise poll for completion | 
 | 101 | 	 */ | 
 | 102 | 	if (dma_has_cap(DMA_INTERRUPT, device->cap_mask)) | 
| Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 103 | 		intr_tx = device->device_prep_dma_interrupt(chan, 0); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 104 | 	else | 
 | 105 | 		intr_tx = NULL; | 
 | 106 |  | 
 | 107 | 	if (intr_tx) { | 
 | 108 | 		intr_tx->callback = NULL; | 
 | 109 | 		intr_tx->callback_param = NULL; | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 110 | 		/* safe to chain outside the lock since we know we are | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 111 | 		 * not submitted yet | 
 | 112 | 		 */ | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 113 | 		txd_chain(intr_tx, tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 114 |  | 
 | 115 | 		/* check if we need to append */ | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 116 | 		txd_lock(depend_tx); | 
 | 117 | 		if (txd_parent(depend_tx)) { | 
 | 118 | 			txd_chain(depend_tx, intr_tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 119 | 			async_tx_ack(intr_tx); | 
 | 120 | 			intr_tx = NULL; | 
 | 121 | 		} | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 122 | 		txd_unlock(depend_tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 123 |  | 
 | 124 | 		if (intr_tx) { | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 125 | 			txd_clear_parent(intr_tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 126 | 			intr_tx->tx_submit(intr_tx); | 
 | 127 | 			async_tx_ack(intr_tx); | 
 | 128 | 		} | 
| Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 129 | 		device->device_issue_pending(chan); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 130 | 	} else { | 
 | 131 | 		if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR) | 
 | 132 | 			panic("%s: DMA_ERROR waiting for depend_tx\n", | 
 | 133 | 			      __func__); | 
 | 134 | 		tx->tx_submit(tx); | 
 | 135 | 	} | 
 | 136 | } | 
 | 137 |  | 
 | 138 |  | 
 | 139 | /** | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 140 |  * submit_disposition - flags for routing an incoming operation | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 141 |  * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock | 
 | 142 |  * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch | 
 | 143 |  * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 144 |  * | 
 | 145 |  * while holding depend_tx->lock we must avoid submitting new operations | 
 | 146 |  * to prevent a circular locking dependency with drivers that already | 
 | 147 |  * hold a channel lock when calling async_tx_run_dependencies. | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 148 |  */ | 
 | 149 | enum submit_disposition { | 
 | 150 | 	ASYNC_TX_SUBMITTED, | 
 | 151 | 	ASYNC_TX_CHANNEL_SWITCH, | 
 | 152 | 	ASYNC_TX_DIRECT_SUBMIT, | 
 | 153 | }; | 
 | 154 |  | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 155 | void | 
 | 156 | async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 157 | 		struct async_submit_ctl *submit) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 158 | { | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 159 | 	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; | 
 | 160 |  | 
 | 161 | 	tx->callback = submit->cb_fn; | 
 | 162 | 	tx->callback_param = submit->cb_param; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 163 |  | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 164 | 	if (depend_tx) { | 
 | 165 | 		enum submit_disposition s; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 166 |  | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 167 | 		/* sanity check the dependency chain: | 
 | 168 | 		 * 1/ if ack is already set then we cannot be sure | 
 | 169 | 		 * we are referring to the correct operation | 
 | 170 | 		 * 2/ dependencies are 1:1 i.e. two transactions can | 
 | 171 | 		 * not depend on the same parent | 
 | 172 | 		 */ | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 173 | 		BUG_ON(async_tx_test_ack(depend_tx) || txd_next(depend_tx) || | 
 | 174 | 		       txd_parent(tx)); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 175 |  | 
 | 176 | 		/* the lock prevents async_tx_run_dependencies from missing | 
 | 177 | 		 * the setting of ->next when ->parent != NULL | 
 | 178 | 		 */ | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 179 | 		txd_lock(depend_tx); | 
 | 180 | 		if (txd_parent(depend_tx)) { | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 181 | 			/* we have a parent so we can not submit directly | 
 | 182 | 			 * if we are staying on the same channel: append | 
 | 183 | 			 * else: channel switch | 
 | 184 | 			 */ | 
 | 185 | 			if (depend_tx->chan == chan) { | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 186 | 				txd_chain(depend_tx, tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 187 | 				s = ASYNC_TX_SUBMITTED; | 
 | 188 | 			} else | 
 | 189 | 				s = ASYNC_TX_CHANNEL_SWITCH; | 
 | 190 | 		} else { | 
 | 191 | 			/* we do not have a parent so we may be able to submit | 
 | 192 | 			 * directly if we are staying on the same channel | 
 | 193 | 			 */ | 
 | 194 | 			if (depend_tx->chan == chan) | 
 | 195 | 				s = ASYNC_TX_DIRECT_SUBMIT; | 
 | 196 | 			else | 
 | 197 | 				s = ASYNC_TX_CHANNEL_SWITCH; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 198 | 		} | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 199 | 		txd_unlock(depend_tx); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 200 |  | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 201 | 		switch (s) { | 
 | 202 | 		case ASYNC_TX_SUBMITTED: | 
 | 203 | 			break; | 
 | 204 | 		case ASYNC_TX_CHANNEL_SWITCH: | 
 | 205 | 			async_tx_channel_switch(depend_tx, tx); | 
 | 206 | 			break; | 
 | 207 | 		case ASYNC_TX_DIRECT_SUBMIT: | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 208 | 			txd_clear_parent(tx); | 
| Dan Williams | 19242d7 | 2008-04-17 20:17:25 -0700 | [diff] [blame] | 209 | 			tx->tx_submit(tx); | 
 | 210 | 			break; | 
 | 211 | 		} | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 212 | 	} else { | 
| Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 213 | 		txd_clear_parent(tx); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 214 | 		tx->tx_submit(tx); | 
 | 215 | 	} | 
 | 216 |  | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 217 | 	if (submit->flags & ASYNC_TX_ACK) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 218 | 		async_tx_ack(tx); | 
 | 219 |  | 
| Dan Williams | 88ba2aa | 2009-04-09 16:16:18 -0700 | [diff] [blame] | 220 | 	if (depend_tx) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 221 | 		async_tx_ack(depend_tx); | 
 | 222 | } | 
 | 223 | EXPORT_SYMBOL_GPL(async_tx_submit); | 
 | 224 |  | 
 | 225 | /** | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 226 |  * async_trigger_callback - schedules the callback function to be run | 
 | 227 |  * @submit: submission and completion parameters | 
 | 228 |  * | 
 | 229 |  * honored flags: ASYNC_TX_ACK | 
 | 230 |  * | 
 | 231 |  * The callback is run after any dependent operations have completed. | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 232 |  */ | 
 | 233 | struct dma_async_tx_descriptor * | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 234 | async_trigger_callback(struct async_submit_ctl *submit) | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 235 | { | 
 | 236 | 	struct dma_chan *chan; | 
 | 237 | 	struct dma_device *device; | 
 | 238 | 	struct dma_async_tx_descriptor *tx; | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 239 | 	struct dma_async_tx_descriptor *depend_tx = submit->depend_tx; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 240 |  | 
 | 241 | 	if (depend_tx) { | 
 | 242 | 		chan = depend_tx->chan; | 
 | 243 | 		device = chan->device; | 
 | 244 |  | 
 | 245 | 		/* see if we can schedule an interrupt | 
 | 246 | 		 * otherwise poll for completion | 
 | 247 | 		 */ | 
 | 248 | 		if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask)) | 
 | 249 | 			device = NULL; | 
 | 250 |  | 
| Dan Williams | 636bdea | 2008-04-17 20:17:26 -0700 | [diff] [blame] | 251 | 		tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL; | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 252 | 	} else | 
 | 253 | 		tx = NULL; | 
 | 254 |  | 
 | 255 | 	if (tx) { | 
| Dan Williams | 3280ab3e | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 256 | 		pr_debug("%s: (async)\n", __func__); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 257 |  | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 258 | 		async_tx_submit(chan, tx, submit); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 259 | 	} else { | 
| Dan Williams | 3280ab3e | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 260 | 		pr_debug("%s: (sync)\n", __func__); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 261 |  | 
 | 262 | 		/* wait for any prerequisite operations */ | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 263 | 		async_tx_quiesce(&submit->depend_tx); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 264 |  | 
| Dan Williams | a08abd8 | 2009-06-03 11:43:59 -0700 | [diff] [blame] | 265 | 		async_tx_sync_epilog(submit); | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 266 | 	} | 
 | 267 |  | 
 | 268 | 	return tx; | 
 | 269 | } | 
 | 270 | EXPORT_SYMBOL_GPL(async_trigger_callback); | 
 | 271 |  | 
| Dan Williams | d2c52b7 | 2008-07-17 17:59:55 -0700 | [diff] [blame] | 272 | /** | 
 | 273 |  * async_tx_quiesce - ensure tx is complete and freeable upon return | 
 | 274 |  * @tx - transaction to quiesce | 
 | 275 |  */ | 
 | 276 | void async_tx_quiesce(struct dma_async_tx_descriptor **tx) | 
 | 277 | { | 
 | 278 | 	if (*tx) { | 
 | 279 | 		/* if ack is already set then we cannot be sure | 
 | 280 | 		 * we are referring to the correct operation | 
 | 281 | 		 */ | 
 | 282 | 		BUG_ON(async_tx_test_ack(*tx)); | 
 | 283 | 		if (dma_wait_for_async_tx(*tx) == DMA_ERROR) | 
 | 284 | 			panic("DMA_ERROR waiting for transaction\n"); | 
 | 285 | 		async_tx_ack(*tx); | 
 | 286 | 		*tx = NULL; | 
 | 287 | 	} | 
 | 288 | } | 
 | 289 | EXPORT_SYMBOL_GPL(async_tx_quiesce); | 
 | 290 |  | 
| Dan Williams | 9bc89cd | 2007-01-02 11:10:44 -0700 | [diff] [blame] | 291 | MODULE_AUTHOR("Intel Corporation"); | 
 | 292 | MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API"); | 
 | 293 | MODULE_LICENSE("GPL"); |