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Paul Walmsleyb045d082008-03-18 11:24:28 +02001/*
Paul Walmsley82e9bd52009-12-08 16:18:47 -07002 * OMAP3 clock function prototypes and macros
Paul Walmsleyb045d082008-03-18 11:24:28 +02003 *
Paul Walmsley82e9bd52009-12-08 16:18:47 -07004 * Copyright (C) 2007-2009 Texas Instruments, Inc.
5 * Copyright (C) 2007-2009 Nokia Corporation
Paul Walmsley542313c2008-07-03 12:24:45 +03006 */
7
Paul Walmsley82e9bd52009-12-08 16:18:47 -07008#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_34XX_H
9#define __ARCH_ARM_MACH_OMAP2_CLOCK_34XX_H
Paul Walmsleyb045d082008-03-18 11:24:28 +020010
Paul Walmsley82e9bd52009-12-08 16:18:47 -070011unsigned long omap3_dpll_recalc(struct clk *clk);
12unsigned long omap3_clkoutx2_recalc(struct clk *clk);
13void omap3_dpll_allow_idle(struct clk *clk);
14void omap3_dpll_deny_idle(struct clk *clk);
15u32 omap3_dpll_autoidle_read(struct clk *clk);
16int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate);
17int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate);
18int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate);
19void omap3_clk_lock_dpll5(void);
Russell Kingc0bf3132009-02-19 13:29:22 +000020
Paul Walmsley542313c2008-07-03 12:24:45 +030021/* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */
22#define DPLL_LOW_POWER_STOP 0x1
23#define DPLL_LOW_POWER_BYPASS 0x5
24#define DPLL_LOCKED 0x7
25
Paul Walmsley82e9bd52009-12-08 16:18:47 -070026extern struct clk *sdrc_ick_p;
27extern struct clk *arm_fck_p;
Paul Walmsleyb045d082008-03-18 11:24:28 +020028
Paul Walmsley82e9bd52009-12-08 16:18:47 -070029/* OMAP34xx-specific clkops */
30extern const struct clkops clkops_omap3430es2_ssi_wait;
31extern const struct clkops clkops_omap3430es2_hsotgusb_wait;
32extern const struct clkops clkops_omap3430es2_dss_usbhost_wait;
33extern const struct clkops clkops_noncore_dpll_ops;
Paul Walmsleyb045d082008-03-18 11:24:28 +020034
Paul Walmsleyb045d082008-03-18 11:24:28 +020035#endif