| Philip, Avinash | 53ad9e8 | 2012-11-27 14:18:13 +0530 | [diff] [blame] | 1 | TI SOC EHRPWM based PWM controller |
| 2 | |
| 3 | Required properties: |
| Philip Avinash | bdd7cf9 | 2013-03-25 12:34:53 +0530 | [diff] [blame] | 4 | - compatible: Must be "ti,<soc>-ehrpwm". |
| 5 | for am33xx - compatible = "ti,am33xx-ehrpwm"; |
| 6 | for da850 - compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; |
| Philip, Avinash | 53ad9e8 | 2012-11-27 14:18:13 +0530 | [diff] [blame] | 7 | - #pwm-cells: Should be 3. Number of cells being used to specify PWM property. |
| 8 | First cell specifies the per-chip index of the PWM to use, the second |
| 9 | cell is the period in nanoseconds and bit 0 in the third cell is used to |
| 10 | encode the polarity of PWM output. Set bit 0 of the third in PWM specifier |
| 11 | to 1 for inverse polarity & set to 0 for normal polarity. |
| 12 | - reg: physical base address and size of the registers map. |
| 13 | |
| 14 | Optional properties: |
| 15 | - ti,hwmods: Name of the hwmod associated to the EHRPWM: |
| 16 | "ehrpwm<x>", <x> being the 0-based instance number from the HW spec |
| 17 | |
| 18 | Example: |
| 19 | |
| Philip Avinash | bdd7cf9 | 2013-03-25 12:34:53 +0530 | [diff] [blame] | 20 | ehrpwm0: ehrpwm@0 { /* EHRPWM on am33xx */ |
| Philip, Avinash | 53ad9e8 | 2012-11-27 14:18:13 +0530 | [diff] [blame] | 21 | compatible = "ti,am33xx-ehrpwm"; |
| 22 | #pwm-cells = <3>; |
| 23 | reg = <0x48300200 0x100>; |
| 24 | ti,hwmods = "ehrpwm0"; |
| 25 | }; |
| Philip Avinash | bdd7cf9 | 2013-03-25 12:34:53 +0530 | [diff] [blame] | 26 | |
| 27 | ehrpwm0: ehrpwm@0 { /* EHRPWM on da850 */ |
| 28 | compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; |
| 29 | #pwm-cells = <3>; |
| 30 | reg = <0x300000 0x2000>; |
| 31 | }; |