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Arnd Bergmanna2e40712013-03-04 18:03:10 +01001/*
Kukjin Kim7d30e8b2011-02-14 16:33:10 +09002 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
Changhwan Youn2b12b5c2010-07-26 21:08:52 +09004 *
Changhwan Youn2b12b5c2010-07-26 21:08:52 +09005 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
10/* pull in the relevant register and map files. */
11
Arnd Bergmanna2e40712013-03-04 18:03:10 +010012#define S3C_ADDR_BASE 0xF6000000
13#define S3C_VA_UART S3C_ADDR_BASE + 0x01000000
14#define EXYNOS4_PA_UART 0x13800000
15#define EXYNOS5_PA_UART 0x12C00000
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090016
17 /* note, for the boot process to work we have to keep the UART
18 * virtual address aligned to an 1MiB boundary for the L1
19 * mapping the head code makes. We keep the UART virtual address
20 * aligned and add in the offset when we load the value here.
21 */
22
Nicolas Pitre639da5e2011-08-31 22:55:46 -040023 .macro addruart, rp, rv, tmp
Colin Crossfd9abe12012-04-04 09:27:19 -070024 mrc p15, 0, \tmp, c0, c0, 0
25 and \tmp, \tmp, #0xf0
26 teq \tmp, #0xf0 @@ A15
Kukjin Kim171c0672012-02-10 11:57:53 +090027 ldreq \rp, =EXYNOS5_PA_UART
28 movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4
29 ldr \rv, =S3C_VA_UART
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090030#if CONFIG_DEBUG_S3C_UART != 0
Jeremy Kerr0ea12932010-07-06 18:30:06 +080031 add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART)
32 add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART)
Changhwan Youn2b12b5c2010-07-26 21:08:52 +090033#endif
34 .endm
35
36#define fifo_full fifo_full_s5pv210
37#define fifo_level fifo_level_s5pv210
38
Arnd Bergmanna2e40712013-03-04 18:03:10 +010039#include <debug/samsung.S>