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Amit Kucheriaa329b482010-02-04 12:21:53 -08001/*
Dinh Nguyenb66ff7a2010-11-15 11:30:00 -06002 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
Amit Kucheriaa329b482010-02-04 12:21:53 -08003 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 *
11 * Create static mapping between physical to virtual memory.
12 */
13
14#include <linux/mm.h>
15#include <linux/init.h>
Hui Wang010dc8a2011-10-09 17:42:15 +080016#include <linux/clk.h>
Dong Aishenga2aa65a2012-05-02 19:31:20 +080017#include <linux/pinctrl/machine.h>
Amit Kucheriaa329b482010-02-04 12:21:53 -080018
19#include <asm/mach/map.h>
20
Shawn Guoe3372472012-09-13 21:01:00 +080021#include "common.h"
Shawn Guoe0557c02012-09-13 15:51:15 +080022#include "devices/devices-common.h"
Shawn Guo50f2de62012-09-14 14:14:45 +080023#include "hardware.h"
Shawn Guo267dd342012-09-13 13:26:00 +080024#include "iomux-v3.h"
Amit Kucheriaa329b482010-02-04 12:21:53 -080025
26/*
27 * Define the MX51 memory map.
28 */
Uwe Kleine-König08ff97b2010-10-25 15:38:09 +020029static struct map_desc mx51_io_desc[] __initdata = {
Jason Liu4c542392011-09-09 17:17:49 +080030 imx_map_entry(MX51, TZIC, MT_DEVICE),
Uwe Kleine-König08ff97b2010-10-25 15:38:09 +020031 imx_map_entry(MX51, IRAM, MT_DEVICE),
Uwe Kleine-König08ff97b2010-10-25 15:38:09 +020032 imx_map_entry(MX51, AIPS1, MT_DEVICE),
33 imx_map_entry(MX51, SPBA0, MT_DEVICE),
34 imx_map_entry(MX51, AIPS2, MT_DEVICE),
Amit Kucheriaa329b482010-02-04 12:21:53 -080035};
36
37/*
Dinh Nguyenb66ff7a2010-11-15 11:30:00 -060038 * Define the MX53 memory map.
39 */
40static struct map_desc mx53_io_desc[] __initdata = {
Jason Liu4c542392011-09-09 17:17:49 +080041 imx_map_entry(MX53, TZIC, MT_DEVICE),
Dinh Nguyenb66ff7a2010-11-15 11:30:00 -060042 imx_map_entry(MX53, AIPS1, MT_DEVICE),
43 imx_map_entry(MX53, SPBA0, MT_DEVICE),
44 imx_map_entry(MX53, AIPS2, MT_DEVICE),
45};
46
47/*
Amit Kucheriaa329b482010-02-04 12:21:53 -080048 * This function initializes the memory map. It is called during the
49 * system startup to create static physical to virtual memory mappings
50 * for the IO modules.
51 */
52void __init mx51_map_io(void)
53{
Uwe Kleine-Königab1304212011-02-07 16:35:21 +010054 iotable_init(mx51_io_desc, ARRAY_SIZE(mx51_io_desc));
55}
56
Jason Liuabca2e12011-09-09 17:17:47 +080057void __init mx53_map_io(void)
58{
59 iotable_init(mx53_io_desc, ARRAY_SIZE(mx53_io_desc));
60}
61
Sascha Hauera4dfccf2012-11-12 15:39:55 +010062/*
63 * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
64 * the Freescale marketing division. However this did not remove the
65 * hardware from the chip which still needs to be configured for proper
66 * IPU support.
67 */
68static void __init imx51_ipu_mipi_setup(void)
69{
70 void __iomem *hsc_addr;
71 hsc_addr = MX51_IO_ADDRESS(MX51_MIPI_HSC_BASE_ADDR);
72
73 /* setup MIPI module to legacy mode */
74 __raw_writel(0xf00, hsc_addr);
75
76 /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
77 __raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff,
78 hsc_addr + 0x800);
79}
80
Uwe Kleine-Königab1304212011-02-07 16:35:21 +010081void __init imx51_init_early(void)
82{
Sascha Hauera4dfccf2012-11-12 15:39:55 +010083 imx51_ipu_mipi_setup();
Amit Kucheriaa329b482010-02-04 12:21:53 -080084 mxc_set_cpu_type(MXC_CPU_MX51);
85 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
Fabio Estevam8c2efec2010-12-06 16:38:32 -020086 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR));
Philipp Zabelbd3d9242013-03-28 17:35:22 +010087 imx_src_init();
Amit Kucheriaa329b482010-02-04 12:21:53 -080088}
89
Uwe Kleine-Königab1304212011-02-07 16:35:21 +010090void __init imx53_init_early(void)
91{
Dinh Nguyenb66ff7a2010-11-15 11:30:00 -060092 mxc_set_cpu_type(MXC_CPU_MX53);
93 mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR));
Fabio Estevam78c73592011-02-17 18:09:52 -020094 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR));
Philipp Zabelbd3d9242013-03-28 17:35:22 +010095 imx_src_init();
Dinh Nguyenb66ff7a2010-11-15 11:30:00 -060096}
97
Amit Kucheriaa329b482010-02-04 12:21:53 -080098void __init mx51_init_irq(void)
99{
Jason Liu4c542392011-09-09 17:17:49 +0800100 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
Amit Kucheriaa329b482010-02-04 12:21:53 -0800101}
Dinh Nguyenc0abefd2010-11-15 11:29:59 -0600102
Dinh Nguyenc0abefd2010-11-15 11:29:59 -0600103void __init mx53_init_irq(void)
104{
Jason Liu4c542392011-09-09 17:17:49 +0800105 tzic_init_irq(MX53_IO_ADDRESS(MX53_TZIC_BASE_ADDR));
Shawn Guob78d8e52011-06-06 00:07:55 +0800106}
107
Shawn Guo36223602011-06-22 22:41:30 +0800108static struct sdma_script_start_addrs imx51_sdma_script __initdata = {
109 .ap_2_ap_addr = 642,
110 .uart_2_mcu_addr = 817,
111 .mcu_2_app_addr = 747,
112 .mcu_2_shp_addr = 961,
113 .ata_2_mcu_addr = 1473,
114 .mcu_2_ata_addr = 1392,
115 .app_2_per_addr = 1033,
116 .app_2_mcu_addr = 683,
117 .shp_2_per_addr = 1251,
118 .shp_2_mcu_addr = 892,
119};
120
121static struct sdma_platform_data imx51_sdma_pdata __initdata = {
Shawn Guo2e534b22011-06-22 22:41:31 +0800122 .fw_name = "sdma-imx51.bin",
Shawn Guo36223602011-06-22 22:41:30 +0800123 .script_addrs = &imx51_sdma_script,
124};
125
Richard Zhao3bc34a62012-03-05 22:30:52 +0800126static const struct resource imx51_audmux_res[] __initconst = {
127 DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K),
128};
129
Shawn Guob78d8e52011-06-06 00:07:55 +0800130void __init imx51_soc_init(void)
131{
Shawn Guo69ac71d2012-09-20 14:21:16 +0800132 mxc_device_init();
133
Benoît Thébaudeauaeb27742012-06-22 21:04:06 +0200134 /* i.mx51 has the i.mx35 type gpio */
135 mxc_register_gpio("imx35-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH);
136 mxc_register_gpio("imx35-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH);
137 mxc_register_gpio("imx35-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
138 mxc_register_gpio("imx35-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
Shawn Guo36223602011-06-22 22:41:30 +0800139
Fabio Estevameb5558d2012-05-20 14:21:09 -0300140 pinctrl_provide_dummies();
141
Shawn Guo62550cd2011-07-13 21:33:17 +0800142 /* i.mx51 has the i.mx35 type sdma */
143 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
Fabio Estevamaa6a9fa2012-03-02 07:45:58 -0300144
145 /* Setup AIPS registers */
146 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR));
147 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR));
Linus Torvalds281b0532012-03-27 16:14:44 -0700148
Richard Zhao3bc34a62012-03-05 22:30:52 +0800149 /* i.mx51 has the i.mx31 type audmux */
150 platform_device_register_simple("imx31-audmux", 0, imx51_audmux_res,
151 ARRAY_SIZE(imx51_audmux_res));
Shawn Guob78d8e52011-06-06 00:07:55 +0800152}
153
Shawn Guo8321b752012-04-26 11:42:34 +0800154void __init imx51_init_late(void)
155{
156 mx51_neon_fixup();
Robert Lee565fa912012-05-21 17:50:26 -0500157 imx51_pm_init();
Shawn Guo8321b752012-04-26 11:42:34 +0800158}
Robert Leeaa96a182012-05-21 17:50:27 -0500159
160void __init imx53_init_late(void)
161{
162 imx53_pm_init();
Amit Kucheriaa329b482010-02-04 12:21:53 -0800163}