blob: 8f2afaa35dd92e60cd772eb59dc3e52fc19dba13 [file] [log] [blame]
Auke Kok9a799d72007-09-15 14:07:45 -07001/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
Shannon Nelson8c47eaa2010-01-13 01:49:34 +00004 Copyright(c) 1999 - 2010 Intel Corporation.
Auke Kok9a799d72007-09-15 14:07:45 -07005
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
Auke Kok9a799d72007-09-15 14:07:45 -070023 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28#include <linux/types.h>
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/netdevice.h>
32#include <linux/vmalloc.h>
33#include <linux/string.h>
34#include <linux/in.h>
35#include <linux/ip.h>
36#include <linux/tcp.h>
Lucy Liu60127862009-07-22 14:07:33 +000037#include <linux/pkt_sched.h>
Auke Kok9a799d72007-09-15 14:07:45 -070038#include <linux/ipv6.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090039#include <linux/slab.h>
Auke Kok9a799d72007-09-15 14:07:45 -070040#include <net/checksum.h>
41#include <net/ip6_checksum.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
Yi Zoueacd73f2009-05-13 13:11:06 +000044#include <scsi/fc/fc_fcoe.h>
Auke Kok9a799d72007-09-15 14:07:45 -070045
46#include "ixgbe.h"
47#include "ixgbe_common.h"
Don Skidmoreee5f7842009-11-06 12:56:20 +000048#include "ixgbe_dcb_82599.h"
Greg Rose1cdd1ec2010-01-09 02:26:46 +000049#include "ixgbe_sriov.h"
Auke Kok9a799d72007-09-15 14:07:45 -070050
51char ixgbe_driver_name[] = "ixgbe";
Stephen Hemminger9c8eb722007-10-29 10:46:24 -070052static const char ixgbe_driver_string[] =
Joe Perchese8e9f692010-09-07 21:34:53 +000053 "Intel(R) 10 Gigabit PCI Express Network Driver";
Auke Kok9a799d72007-09-15 14:07:45 -070054
Don Skidmore99faf682010-07-19 14:00:47 +000055#define DRV_VERSION "2.0.84-k2"
Stephen Hemminger9c8eb722007-10-29 10:46:24 -070056const char ixgbe_driver_version[] = DRV_VERSION;
Shannon Nelson8c47eaa2010-01-13 01:49:34 +000057static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation.";
Auke Kok9a799d72007-09-15 14:07:45 -070058
59static const struct ixgbe_info *ixgbe_info_tbl[] = {
Peter P Waskiewiczb4617242008-09-11 20:04:46 -070060 [board_82598] = &ixgbe_82598_info,
PJ Waskiewicze8e26352009-02-27 15:45:05 +000061 [board_82599] = &ixgbe_82599_info,
Auke Kok9a799d72007-09-15 14:07:45 -070062};
63
64/* ixgbe_pci_tbl - PCI Device ID Table
65 *
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
Alexey Dobriyana3aa1882010-01-07 11:58:11 +000072static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
Don Skidmore1e336d02009-01-26 20:57:51 -080073 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598),
74 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070075 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
Auke Kok3957d632007-10-31 15:22:10 -070076 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070077 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
Auke Kok3957d632007-10-31 15:22:10 -070078 board_82598 },
Jesse Brandeburg0befdb32008-10-31 00:46:40 -070079 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT),
80 board_82598 },
Peter P Waskiewicz Jr3845bec2009-07-16 15:50:52 +000081 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2),
82 board_82598 },
Auke Kok9a799d72007-09-15 14:07:45 -070083 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
Auke Kok3957d632007-10-31 15:22:10 -070084 board_82598 },
Jesse Brandeburg8d792cd2008-08-08 16:24:19 -070085 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT),
86 board_82598 },
Donald Skidmorec4900be2008-11-20 21:11:42 -080087 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT),
88 board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM),
90 board_82598 },
Jesse Brandeburgb95f5fc2008-09-11 19:58:59 -070091 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR),
92 board_82598 },
Donald Skidmorec4900be2008-11-20 21:11:42 -080093 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM),
94 board_82598 },
Don Skidmore2f21bdd2009-02-01 01:18:23 -080095 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX),
96 board_82598 },
PJ Waskiewicze8e26352009-02-27 15:45:05 +000097 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4),
98 board_82599 },
Peter P Waskiewicz Jr1fcf03e2009-05-17 20:58:04 +000099 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM),
100 board_82599 },
Don Skidmore74757d42009-12-08 07:22:23 +0000101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR),
102 board_82599 },
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP),
104 board_82599 },
Don Skidmore38ad1c82009-10-08 15:35:58 +0000105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM),
106 board_82599 },
Don Skidmoredbfec662009-10-02 08:58:25 +0000107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ),
108 board_82599 },
Peter P Waskiewicz Jr89111842009-09-14 07:47:49 +0000109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4),
110 board_82599 },
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -0700111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM),
112 board_82599 },
Don Skidmore312eb932009-10-02 08:58:04 +0000113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE),
114 board_82599 },
Auke Kok9a799d72007-09-15 14:07:45 -0700115
116 /* required last entry */
117 {0, }
118};
119MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
120
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400121#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800122static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
Joe Perchese8e9f692010-09-07 21:34:53 +0000123 void *p);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800124static struct notifier_block dca_notifier = {
125 .notifier_call = ixgbe_notify_dca,
126 .next = NULL,
127 .priority = 0
128};
129#endif
130
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000131#ifdef CONFIG_PCI_IOV
132static unsigned int max_vfs;
133module_param(max_vfs, uint, 0);
Joe Perchese8e9f692010-09-07 21:34:53 +0000134MODULE_PARM_DESC(max_vfs,
135 "Maximum number of virtual functions to allocate per physical function");
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000136#endif /* CONFIG_PCI_IOV */
137
Auke Kok9a799d72007-09-15 14:07:45 -0700138MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
139MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
140MODULE_LICENSE("GPL");
141MODULE_VERSION(DRV_VERSION);
142
143#define DEFAULT_DEBUG_LEVEL_SHIFT 3
144
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000145static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter)
146{
147 struct ixgbe_hw *hw = &adapter->hw;
148 u32 gcr;
149 u32 gpie;
150 u32 vmdctl;
151
152#ifdef CONFIG_PCI_IOV
153 /* disable iov and allow time for transactions to clear */
154 pci_disable_sriov(adapter->pdev);
155#endif
156
157 /* turn off device IOV mode */
158 gcr = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
159 gcr &= ~(IXGBE_GCR_EXT_SRIOV);
160 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr);
161 gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
162 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
163 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
164
165 /* set default pool back to 0 */
166 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
167 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
168 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
169
170 /* take a breather then clean up driver data */
171 msleep(100);
Joe Perchese8e9f692010-09-07 21:34:53 +0000172
173 kfree(adapter->vfinfo);
Greg Rose1cdd1ec2010-01-09 02:26:46 +0000174 adapter->vfinfo = NULL;
175
176 adapter->num_vfs = 0;
177 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
178}
179
Taku Izumidcd79ae2010-04-27 14:39:53 +0000180struct ixgbe_reg_info {
181 u32 ofs;
182 char *name;
183};
184
185static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
186
187 /* General Registers */
188 {IXGBE_CTRL, "CTRL"},
189 {IXGBE_STATUS, "STATUS"},
190 {IXGBE_CTRL_EXT, "CTRL_EXT"},
191
192 /* Interrupt Registers */
193 {IXGBE_EICR, "EICR"},
194
195 /* RX Registers */
196 {IXGBE_SRRCTL(0), "SRRCTL"},
197 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
198 {IXGBE_RDLEN(0), "RDLEN"},
199 {IXGBE_RDH(0), "RDH"},
200 {IXGBE_RDT(0), "RDT"},
201 {IXGBE_RXDCTL(0), "RXDCTL"},
202 {IXGBE_RDBAL(0), "RDBAL"},
203 {IXGBE_RDBAH(0), "RDBAH"},
204
205 /* TX Registers */
206 {IXGBE_TDBAL(0), "TDBAL"},
207 {IXGBE_TDBAH(0), "TDBAH"},
208 {IXGBE_TDLEN(0), "TDLEN"},
209 {IXGBE_TDH(0), "TDH"},
210 {IXGBE_TDT(0), "TDT"},
211 {IXGBE_TXDCTL(0), "TXDCTL"},
212
213 /* List Terminator */
214 {}
215};
216
217
218/*
219 * ixgbe_regdump - register printout routine
220 */
221static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
222{
223 int i = 0, j = 0;
224 char rname[16];
225 u32 regs[64];
226
227 switch (reginfo->ofs) {
228 case IXGBE_SRRCTL(0):
229 for (i = 0; i < 64; i++)
230 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
231 break;
232 case IXGBE_DCA_RXCTRL(0):
233 for (i = 0; i < 64; i++)
234 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
235 break;
236 case IXGBE_RDLEN(0):
237 for (i = 0; i < 64; i++)
238 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
239 break;
240 case IXGBE_RDH(0):
241 for (i = 0; i < 64; i++)
242 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
243 break;
244 case IXGBE_RDT(0):
245 for (i = 0; i < 64; i++)
246 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
247 break;
248 case IXGBE_RXDCTL(0):
249 for (i = 0; i < 64; i++)
250 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
251 break;
252 case IXGBE_RDBAL(0):
253 for (i = 0; i < 64; i++)
254 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
255 break;
256 case IXGBE_RDBAH(0):
257 for (i = 0; i < 64; i++)
258 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
259 break;
260 case IXGBE_TDBAL(0):
261 for (i = 0; i < 64; i++)
262 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
263 break;
264 case IXGBE_TDBAH(0):
265 for (i = 0; i < 64; i++)
266 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
267 break;
268 case IXGBE_TDLEN(0):
269 for (i = 0; i < 64; i++)
270 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
271 break;
272 case IXGBE_TDH(0):
273 for (i = 0; i < 64; i++)
274 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
275 break;
276 case IXGBE_TDT(0):
277 for (i = 0; i < 64; i++)
278 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
279 break;
280 case IXGBE_TXDCTL(0):
281 for (i = 0; i < 64; i++)
282 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
283 break;
284 default:
Joe Perchesc7689572010-09-07 21:35:17 +0000285 pr_info("%-15s %08x\n", reginfo->name,
Taku Izumidcd79ae2010-04-27 14:39:53 +0000286 IXGBE_READ_REG(hw, reginfo->ofs));
287 return;
288 }
289
290 for (i = 0; i < 8; i++) {
291 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
Joe Perchesc7689572010-09-07 21:35:17 +0000292 pr_err("%-15s", rname);
Taku Izumidcd79ae2010-04-27 14:39:53 +0000293 for (j = 0; j < 8; j++)
Joe Perchesc7689572010-09-07 21:35:17 +0000294 pr_cont(" %08x", regs[i*8+j]);
295 pr_cont("\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000296 }
297
298}
299
300/*
301 * ixgbe_dump - Print registers, tx-rings and rx-rings
302 */
303static void ixgbe_dump(struct ixgbe_adapter *adapter)
304{
305 struct net_device *netdev = adapter->netdev;
306 struct ixgbe_hw *hw = &adapter->hw;
307 struct ixgbe_reg_info *reginfo;
308 int n = 0;
309 struct ixgbe_ring *tx_ring;
310 struct ixgbe_tx_buffer *tx_buffer_info;
311 union ixgbe_adv_tx_desc *tx_desc;
312 struct my_u0 { u64 a; u64 b; } *u0;
313 struct ixgbe_ring *rx_ring;
314 union ixgbe_adv_rx_desc *rx_desc;
315 struct ixgbe_rx_buffer *rx_buffer_info;
316 u32 staterr;
317 int i = 0;
318
319 if (!netif_msg_hw(adapter))
320 return;
321
322 /* Print netdevice Info */
323 if (netdev) {
324 dev_info(&adapter->pdev->dev, "Net device Info\n");
Joe Perchesc7689572010-09-07 21:35:17 +0000325 pr_info("Device Name state "
Taku Izumidcd79ae2010-04-27 14:39:53 +0000326 "trans_start last_rx\n");
Joe Perchesc7689572010-09-07 21:35:17 +0000327 pr_info("%-15s %016lX %016lX %016lX\n",
328 netdev->name,
329 netdev->state,
330 netdev->trans_start,
331 netdev->last_rx);
Taku Izumidcd79ae2010-04-27 14:39:53 +0000332 }
333
334 /* Print Registers */
335 dev_info(&adapter->pdev->dev, "Register Dump\n");
Joe Perchesc7689572010-09-07 21:35:17 +0000336 pr_info(" Register Name Value\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000337 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
338 reginfo->name; reginfo++) {
339 ixgbe_regdump(hw, reginfo);
340 }
341
342 /* Print TX Ring Summary */
343 if (!netdev || !netif_running(netdev))
344 goto exit;
345
346 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
Joe Perchesc7689572010-09-07 21:35:17 +0000347 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000348 for (n = 0; n < adapter->num_tx_queues; n++) {
349 tx_ring = adapter->tx_ring[n];
350 tx_buffer_info =
351 &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
Joe Perchesc7689572010-09-07 21:35:17 +0000352 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
Taku Izumidcd79ae2010-04-27 14:39:53 +0000353 n, tx_ring->next_to_use, tx_ring->next_to_clean,
354 (u64)tx_buffer_info->dma,
355 tx_buffer_info->length,
356 tx_buffer_info->next_to_watch,
357 (u64)tx_buffer_info->time_stamp);
358 }
359
360 /* Print TX Rings */
361 if (!netif_msg_tx_done(adapter))
362 goto rx_ring_summary;
363
364 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
365
366 /* Transmit Descriptor Formats
367 *
368 * Advanced Transmit Descriptor
369 * +--------------------------------------------------------------+
370 * 0 | Buffer Address [63:0] |
371 * +--------------------------------------------------------------+
372 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
373 * +--------------------------------------------------------------+
374 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
375 */
376
377 for (n = 0; n < adapter->num_tx_queues; n++) {
378 tx_ring = adapter->tx_ring[n];
Joe Perchesc7689572010-09-07 21:35:17 +0000379 pr_info("------------------------------------\n");
380 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
381 pr_info("------------------------------------\n");
382 pr_info("T [desc] [address 63:0 ] "
Taku Izumidcd79ae2010-04-27 14:39:53 +0000383 "[PlPOIdStDDt Ln] [bi->dma ] "
384 "leng ntw timestamp bi->skb\n");
385
386 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
Alexander Duyck31f05a22010-08-19 13:40:31 +0000387 tx_desc = IXGBE_TX_DESC_ADV(tx_ring, i);
Taku Izumidcd79ae2010-04-27 14:39:53 +0000388 tx_buffer_info = &tx_ring->tx_buffer_info[i];
389 u0 = (struct my_u0 *)tx_desc;
Joe Perchesc7689572010-09-07 21:35:17 +0000390 pr_info("T [0x%03X] %016llX %016llX %016llX"
Taku Izumidcd79ae2010-04-27 14:39:53 +0000391 " %04X %3X %016llX %p", i,
392 le64_to_cpu(u0->a),
393 le64_to_cpu(u0->b),
394 (u64)tx_buffer_info->dma,
395 tx_buffer_info->length,
396 tx_buffer_info->next_to_watch,
397 (u64)tx_buffer_info->time_stamp,
398 tx_buffer_info->skb);
399 if (i == tx_ring->next_to_use &&
400 i == tx_ring->next_to_clean)
Joe Perchesc7689572010-09-07 21:35:17 +0000401 pr_cont(" NTC/U\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000402 else if (i == tx_ring->next_to_use)
Joe Perchesc7689572010-09-07 21:35:17 +0000403 pr_cont(" NTU\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000404 else if (i == tx_ring->next_to_clean)
Joe Perchesc7689572010-09-07 21:35:17 +0000405 pr_cont(" NTC\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000406 else
Joe Perchesc7689572010-09-07 21:35:17 +0000407 pr_cont("\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000408
409 if (netif_msg_pktdata(adapter) &&
410 tx_buffer_info->dma != 0)
411 print_hex_dump(KERN_INFO, "",
412 DUMP_PREFIX_ADDRESS, 16, 1,
413 phys_to_virt(tx_buffer_info->dma),
414 tx_buffer_info->length, true);
415 }
416 }
417
418 /* Print RX Rings Summary */
419rx_ring_summary:
420 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
Joe Perchesc7689572010-09-07 21:35:17 +0000421 pr_info("Queue [NTU] [NTC]\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000422 for (n = 0; n < adapter->num_rx_queues; n++) {
423 rx_ring = adapter->rx_ring[n];
Joe Perchesc7689572010-09-07 21:35:17 +0000424 pr_info("%5d %5X %5X\n",
425 n, rx_ring->next_to_use, rx_ring->next_to_clean);
Taku Izumidcd79ae2010-04-27 14:39:53 +0000426 }
427
428 /* Print RX Rings */
429 if (!netif_msg_rx_status(adapter))
430 goto exit;
431
432 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
433
434 /* Advanced Receive Descriptor (Read) Format
435 * 63 1 0
436 * +-----------------------------------------------------+
437 * 0 | Packet Buffer Address [63:1] |A0/NSE|
438 * +----------------------------------------------+------+
439 * 8 | Header Buffer Address [63:1] | DD |
440 * +-----------------------------------------------------+
441 *
442 *
443 * Advanced Receive Descriptor (Write-Back) Format
444 *
445 * 63 48 47 32 31 30 21 20 16 15 4 3 0
446 * +------------------------------------------------------+
447 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
448 * | Checksum Ident | | | | Type | Type |
449 * +------------------------------------------------------+
450 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
451 * +------------------------------------------------------+
452 * 63 48 47 32 31 20 19 0
453 */
454 for (n = 0; n < adapter->num_rx_queues; n++) {
455 rx_ring = adapter->rx_ring[n];
Joe Perchesc7689572010-09-07 21:35:17 +0000456 pr_info("------------------------------------\n");
457 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
458 pr_info("------------------------------------\n");
459 pr_info("R [desc] [ PktBuf A0] "
Taku Izumidcd79ae2010-04-27 14:39:53 +0000460 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
461 "<-- Adv Rx Read format\n");
Joe Perchesc7689572010-09-07 21:35:17 +0000462 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
Taku Izumidcd79ae2010-04-27 14:39:53 +0000463 "[vl er S cks ln] ---------------- [bi->skb] "
464 "<-- Adv Rx Write-Back format\n");
465
466 for (i = 0; i < rx_ring->count; i++) {
467 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Alexander Duyck31f05a22010-08-19 13:40:31 +0000468 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, i);
Taku Izumidcd79ae2010-04-27 14:39:53 +0000469 u0 = (struct my_u0 *)rx_desc;
470 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
471 if (staterr & IXGBE_RXD_STAT_DD) {
472 /* Descriptor Done */
Joe Perchesc7689572010-09-07 21:35:17 +0000473 pr_info("RWB[0x%03X] %016llX "
Taku Izumidcd79ae2010-04-27 14:39:53 +0000474 "%016llX ---------------- %p", i,
475 le64_to_cpu(u0->a),
476 le64_to_cpu(u0->b),
477 rx_buffer_info->skb);
478 } else {
Joe Perchesc7689572010-09-07 21:35:17 +0000479 pr_info("R [0x%03X] %016llX "
Taku Izumidcd79ae2010-04-27 14:39:53 +0000480 "%016llX %016llX %p", i,
481 le64_to_cpu(u0->a),
482 le64_to_cpu(u0->b),
483 (u64)rx_buffer_info->dma,
484 rx_buffer_info->skb);
485
486 if (netif_msg_pktdata(adapter)) {
487 print_hex_dump(KERN_INFO, "",
488 DUMP_PREFIX_ADDRESS, 16, 1,
489 phys_to_virt(rx_buffer_info->dma),
490 rx_ring->rx_buf_len, true);
491
492 if (rx_ring->rx_buf_len
493 < IXGBE_RXBUFFER_2048)
494 print_hex_dump(KERN_INFO, "",
495 DUMP_PREFIX_ADDRESS, 16, 1,
496 phys_to_virt(
497 rx_buffer_info->page_dma +
498 rx_buffer_info->page_offset
499 ),
500 PAGE_SIZE/2, true);
501 }
502 }
503
504 if (i == rx_ring->next_to_use)
Joe Perchesc7689572010-09-07 21:35:17 +0000505 pr_cont(" NTU\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000506 else if (i == rx_ring->next_to_clean)
Joe Perchesc7689572010-09-07 21:35:17 +0000507 pr_cont(" NTC\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000508 else
Joe Perchesc7689572010-09-07 21:35:17 +0000509 pr_cont("\n");
Taku Izumidcd79ae2010-04-27 14:39:53 +0000510
511 }
512 }
513
514exit:
515 return;
516}
517
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800518static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
519{
520 u32 ctrl_ext;
521
522 /* Let firmware take over control of h/w */
523 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
524 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
Joe Perchese8e9f692010-09-07 21:34:53 +0000525 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800526}
527
528static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
529{
530 u32 ctrl_ext;
531
532 /* Let firmware know the driver has taken over */
533 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
534 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
Joe Perchese8e9f692010-09-07 21:34:53 +0000535 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -0800536}
Auke Kok9a799d72007-09-15 14:07:45 -0700537
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000538/*
539 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
540 * @adapter: pointer to adapter struct
541 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
542 * @queue: queue to map the corresponding interrupt to
543 * @msix_vector: the vector to map to the corresponding queue
544 *
545 */
546static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
Joe Perchese8e9f692010-09-07 21:34:53 +0000547 u8 queue, u8 msix_vector)
Auke Kok9a799d72007-09-15 14:07:45 -0700548{
549 u32 ivar, index;
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000550 struct ixgbe_hw *hw = &adapter->hw;
551 switch (hw->mac.type) {
552 case ixgbe_mac_82598EB:
553 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
554 if (direction == -1)
555 direction = 0;
556 index = (((direction * 64) + queue) >> 2) & 0x1F;
557 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
558 ivar &= ~(0xFF << (8 * (queue & 0x3)));
559 ivar |= (msix_vector << (8 * (queue & 0x3)));
560 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
561 break;
562 case ixgbe_mac_82599EB:
563 if (direction == -1) {
564 /* other causes */
565 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
566 index = ((queue & 1) * 8);
567 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
568 ivar &= ~(0xFF << index);
569 ivar |= (msix_vector << index);
570 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
571 break;
572 } else {
573 /* tx or rx causes */
574 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
575 index = ((16 * (queue & 1)) + (8 * direction));
576 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
577 ivar &= ~(0xFF << index);
578 ivar |= (msix_vector << index);
579 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
580 break;
581 }
582 default:
583 break;
584 }
Auke Kok9a799d72007-09-15 14:07:45 -0700585}
586
Alexander Duyckfe49f042009-06-04 16:00:09 +0000587static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +0000588 u64 qmask)
Alexander Duyckfe49f042009-06-04 16:00:09 +0000589{
590 u32 mask;
591
592 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
593 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
594 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
595 } else {
596 mask = (qmask & 0xFFFFFFFF);
597 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
598 mask = (qmask >> 32);
599 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
600 }
601}
602
Alexander Duyck84418e32010-08-19 13:40:54 +0000603void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +0000604 struct ixgbe_tx_buffer
605 *tx_buffer_info)
Auke Kok9a799d72007-09-15 14:07:45 -0700606{
Alexander Duycke5a43542009-12-02 16:46:56 +0000607 if (tx_buffer_info->dma) {
608 if (tx_buffer_info->mapped_as_page)
Nick Nunley1b507732010-04-27 13:10:27 +0000609 dma_unmap_page(&adapter->pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +0000610 tx_buffer_info->dma,
611 tx_buffer_info->length,
Nick Nunley1b507732010-04-27 13:10:27 +0000612 DMA_TO_DEVICE);
Alexander Duycke5a43542009-12-02 16:46:56 +0000613 else
Nick Nunley1b507732010-04-27 13:10:27 +0000614 dma_unmap_single(&adapter->pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +0000615 tx_buffer_info->dma,
616 tx_buffer_info->length,
Nick Nunley1b507732010-04-27 13:10:27 +0000617 DMA_TO_DEVICE);
Alexander Duycke5a43542009-12-02 16:46:56 +0000618 tx_buffer_info->dma = 0;
619 }
Auke Kok9a799d72007-09-15 14:07:45 -0700620 if (tx_buffer_info->skb) {
621 dev_kfree_skb_any(tx_buffer_info->skb);
622 tx_buffer_info->skb = NULL;
623 }
Alexander Duyck44df32c2009-03-31 21:34:23 +0000624 tx_buffer_info->time_stamp = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700625 /* tx_buffer_info must be completely set up in the transmit path */
626}
627
Yi Zou26f23d82009-11-06 12:56:00 +0000628/**
John Fastabend7483d9d2010-05-18 16:00:10 +0000629 * ixgbe_tx_xon_state - check the tx ring xon state
Yi Zou26f23d82009-11-06 12:56:00 +0000630 * @adapter: the ixgbe adapter
631 * @tx_ring: the corresponding tx_ring
632 *
633 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
634 * corresponding TC of this tx_ring when checking TFCS.
635 *
John Fastabend7483d9d2010-05-18 16:00:10 +0000636 * Returns : true if in xon state (currently not paused)
Yi Zou26f23d82009-11-06 12:56:00 +0000637 */
John Fastabend7483d9d2010-05-18 16:00:10 +0000638static inline bool ixgbe_tx_xon_state(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +0000639 struct ixgbe_ring *tx_ring)
Yi Zou26f23d82009-11-06 12:56:00 +0000640{
Yi Zou26f23d82009-11-06 12:56:00 +0000641 u32 txoff = IXGBE_TFCS_TXOFF;
642
643#ifdef CONFIG_IXGBE_DCB
John Fastabendca739482010-06-03 17:03:45 +0000644 if (adapter->dcb_cfg.pfc_mode_enable) {
Jaswinder Singh Rajput30b768322009-11-20 04:02:27 +0000645 int tc;
Yi Zou26f23d82009-11-06 12:56:00 +0000646 int reg_idx = tx_ring->reg_idx;
647 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
648
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000649 switch (adapter->hw.mac.type) {
650 case ixgbe_mac_82598EB:
Yi Zou26f23d82009-11-06 12:56:00 +0000651 tc = reg_idx >> 2;
652 txoff = IXGBE_TFCS_TXOFF0;
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000653 break;
654 case ixgbe_mac_82599EB:
Yi Zou26f23d82009-11-06 12:56:00 +0000655 tc = 0;
656 txoff = IXGBE_TFCS_TXOFF;
657 if (dcb_i == 8) {
658 /* TC0, TC1 */
659 tc = reg_idx >> 5;
660 if (tc == 2) /* TC2, TC3 */
661 tc += (reg_idx - 64) >> 4;
662 else if (tc == 3) /* TC4, TC5, TC6, TC7 */
663 tc += 1 + ((reg_idx - 96) >> 3);
664 } else if (dcb_i == 4) {
665 /* TC0, TC1 */
666 tc = reg_idx >> 6;
667 if (tc == 1) {
668 tc += (reg_idx - 64) >> 5;
669 if (tc == 2) /* TC2, TC3 */
670 tc += (reg_idx - 96) >> 4;
671 }
672 }
PJ Waskiewicz6837e892010-01-06 17:50:29 +0000673 break;
674 default:
675 tc = 0;
Yi Zou26f23d82009-11-06 12:56:00 +0000676 }
677 txoff <<= tc;
678 }
679#endif
680 return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff;
681}
682
Auke Kok9a799d72007-09-15 14:07:45 -0700683static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +0000684 struct ixgbe_ring *tx_ring,
685 unsigned int eop)
Auke Kok9a799d72007-09-15 14:07:45 -0700686{
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700687 struct ixgbe_hw *hw = &adapter->hw;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700688
Auke Kok9a799d72007-09-15 14:07:45 -0700689 /* Detect a transmit hang in hardware, this serializes the
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700690 * check with the clearing of time_stamp and movement of eop */
Auke Kok9a799d72007-09-15 14:07:45 -0700691 adapter->detect_tx_hung = false;
Alexander Duyck44df32c2009-03-31 21:34:23 +0000692 if (tx_ring->tx_buffer_info[eop].time_stamp &&
Auke Kok9a799d72007-09-15 14:07:45 -0700693 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
John Fastabend7483d9d2010-05-18 16:00:10 +0000694 ixgbe_tx_xon_state(adapter, tx_ring)) {
Auke Kok9a799d72007-09-15 14:07:45 -0700695 /* detected Tx unit hang */
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700696 union ixgbe_adv_tx_desc *tx_desc;
Alexander Duyck31f05a22010-08-19 13:40:31 +0000697 tx_desc = IXGBE_TX_DESC_ADV(tx_ring, eop);
Emil Tantilov396e7992010-07-01 20:05:12 +0000698 e_err(drv, "Detected Tx Unit Hang\n"
Emil Tantilov849c4542010-06-03 16:53:41 +0000699 " Tx Queue <%d>\n"
700 " TDH, TDT <%x>, <%x>\n"
701 " next_to_use <%x>\n"
702 " next_to_clean <%x>\n"
703 "tx_buffer_info[next_to_clean]\n"
704 " time_stamp <%lx>\n"
705 " jiffies <%lx>\n",
706 tx_ring->queue_index,
Alexander Duyck84ea2592010-11-16 19:26:49 -0800707 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
708 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
Emil Tantilov849c4542010-06-03 16:53:41 +0000709 tx_ring->next_to_use, eop,
710 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
Auke Kok9a799d72007-09-15 14:07:45 -0700711 return true;
712 }
713
714 return false;
715}
716
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700717#define IXGBE_MAX_TXD_PWR 14
718#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800719
720/* Tx Descriptors needed, worst case */
721#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
722 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
723#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
Peter P Waskiewiczb4617242008-09-11 20:04:46 -0700724 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800725
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700726static void ixgbe_tx_timeout(struct net_device *netdev);
727
Auke Kok9a799d72007-09-15 14:07:45 -0700728/**
729 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
Alexander Duyckfe49f042009-06-04 16:00:09 +0000730 * @q_vector: structure containing interrupt and ring information
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700731 * @tx_ring: tx ring to clean
Auke Kok9a799d72007-09-15 14:07:45 -0700732 **/
Alexander Duyckfe49f042009-06-04 16:00:09 +0000733static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
Joe Perchese8e9f692010-09-07 21:34:53 +0000734 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -0700735{
Alexander Duyckfe49f042009-06-04 16:00:09 +0000736 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700737 struct net_device *netdev = adapter->netdev;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800738 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
739 struct ixgbe_tx_buffer *tx_buffer_info;
740 unsigned int i, eop, count = 0;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700741 unsigned int total_bytes = 0, total_packets = 0;
Auke Kok9a799d72007-09-15 14:07:45 -0700742
743 i = tx_ring->next_to_clean;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800744 eop = tx_ring->tx_buffer_info[i].next_to_watch;
Alexander Duyck31f05a22010-08-19 13:40:31 +0000745 eop_desc = IXGBE_TX_DESC_ADV(tx_ring, eop);
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800746
747 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +0000748 (count < tx_ring->work_limit)) {
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800749 bool cleaned = false;
Jeff Kirsher2d0bb1c2010-08-08 16:02:31 +0000750 rmb(); /* read buffer_info after eop_desc */
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800751 for ( ; !cleaned; count++) {
Alexander Duyck31f05a22010-08-19 13:40:31 +0000752 tx_desc = IXGBE_TX_DESC_ADV(tx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -0700753 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -0700754
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800755 tx_desc->wb.status = 0;
Alexander Duyck8ad494b2010-11-16 19:26:47 -0800756 cleaned = (i == eop);
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800757
Auke Kok9a799d72007-09-15 14:07:45 -0700758 i++;
759 if (i == tx_ring->count)
760 i = 0;
Alexander Duyck8ad494b2010-11-16 19:26:47 -0800761
762 if (cleaned && tx_buffer_info->skb) {
763 total_bytes += tx_buffer_info->bytecount;
764 total_packets += tx_buffer_info->gso_segs;
765 }
766
767 ixgbe_unmap_and_free_tx_resource(adapter,
768 tx_buffer_info);
Auke Kok9a799d72007-09-15 14:07:45 -0700769 }
770
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800771 eop = tx_ring->tx_buffer_info[i].next_to_watch;
Alexander Duyck31f05a22010-08-19 13:40:31 +0000772 eop_desc = IXGBE_TX_DESC_ADV(tx_ring, eop);
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800773 }
774
Auke Kok9a799d72007-09-15 14:07:45 -0700775 tx_ring->next_to_clean = i;
776
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800777#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700778 if (unlikely(count && netif_carrier_ok(netdev) &&
Joe Perchese8e9f692010-09-07 21:34:53 +0000779 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800780 /* Make sure that anybody stopping the queue after this
781 * sees the new next_to_clean.
782 */
783 smp_mb();
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -0800784 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
785 !test_bit(__IXGBE_DOWN, &adapter->state)) {
786 netif_wake_subqueue(netdev, tx_ring->queue_index);
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +0000787 ++tx_ring->restart_queue;
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -0800788 }
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -0800789 }
Auke Kok9a799d72007-09-15 14:07:45 -0700790
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700791 if (adapter->detect_tx_hung) {
792 if (ixgbe_check_tx_hang(adapter, tx_ring, i)) {
793 /* schedule immediate reset if we believe we hung */
Emil Tantilov396e7992010-07-01 20:05:12 +0000794 e_info(probe, "tx hang %d detected, resetting "
795 "adapter\n", adapter->tx_timeout_count + 1);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700796 ixgbe_tx_timeout(adapter->netdev);
797 }
798 }
Auke Kok9a799d72007-09-15 14:07:45 -0700799
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700800 /* re-arm the interrupt */
Alexander Duyckfe49f042009-06-04 16:00:09 +0000801 if (count >= tx_ring->work_limit)
802 ixgbe_irq_rearm_queues(adapter, ((u64)1 << q_vector->v_idx));
Auke Kok9a799d72007-09-15 14:07:45 -0700803
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700804 tx_ring->total_bytes += total_bytes;
805 tx_ring->total_packets += total_packets;
Eric Dumazetde1036b2010-10-20 23:00:04 +0000806 u64_stats_update_begin(&tx_ring->syncp);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -0700807 tx_ring->stats.packets += total_packets;
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -0800808 tx_ring->stats.bytes += total_bytes;
Eric Dumazetde1036b2010-10-20 23:00:04 +0000809 u64_stats_update_end(&tx_ring->syncp);
Eric Dumazet807540b2010-09-23 05:40:09 +0000810 return count < tx_ring->work_limit;
Auke Kok9a799d72007-09-15 14:07:45 -0700811}
812
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400813#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800814static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +0000815 struct ixgbe_ring *rx_ring)
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800816{
817 u32 rxctrl;
818 int cpu = get_cpu();
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000819 int q = rx_ring->reg_idx;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800820
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700821 if (rx_ring->cpu != cpu) {
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800822 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000823 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
824 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK;
825 rxctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
826 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
827 rxctrl &= ~IXGBE_DCA_RXCTRL_CPUID_MASK_82599;
828 rxctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
Joe Perchese8e9f692010-09-07 21:34:53 +0000829 IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599);
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000830 }
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800831 rxctrl |= IXGBE_DCA_RXCTRL_DESC_DCA_EN;
832 rxctrl |= IXGBE_DCA_RXCTRL_HEAD_DCA_EN;
Don Skidmore15005a32009-01-19 16:54:13 -0800833 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_RRO_EN);
834 rxctrl &= ~(IXGBE_DCA_RXCTRL_DESC_WRO_EN |
Joe Perchese8e9f692010-09-07 21:34:53 +0000835 IXGBE_DCA_RXCTRL_DESC_HSRO_EN);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800836 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_RXCTRL(q), rxctrl);
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700837 rx_ring->cpu = cpu;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800838 }
839 put_cpu();
840}
841
842static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +0000843 struct ixgbe_ring *tx_ring)
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800844{
845 u32 txctrl;
846 int cpu = get_cpu();
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000847 int q = tx_ring->reg_idx;
Don Skidmoreee5f7842009-11-06 12:56:20 +0000848 struct ixgbe_hw *hw = &adapter->hw;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800849
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700850 if (tx_ring->cpu != cpu) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000851 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
Don Skidmoreee5f7842009-11-06 12:56:20 +0000852 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000853 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
854 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
Don Skidmoreee5f7842009-11-06 12:56:20 +0000855 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
856 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000857 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
Don Skidmoreee5f7842009-11-06 12:56:20 +0000858 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q));
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000859 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
860 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
Joe Perchese8e9f692010-09-07 21:34:53 +0000861 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
Don Skidmoreee5f7842009-11-06 12:56:20 +0000862 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
863 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl);
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000864 }
Jesse Brandeburg3a581072008-08-26 04:27:08 -0700865 tx_ring->cpu = cpu;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800866 }
867 put_cpu();
868}
869
870static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
871{
872 int i;
873
874 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
875 return;
876
Alexander Duycke35ec122009-05-21 13:07:12 +0000877 /* always use CB2 mode, difference is masked in the CB driver */
878 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
879
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800880 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000881 adapter->tx_ring[i]->cpu = -1;
882 ixgbe_update_tx_dca(adapter, adapter->tx_ring[i]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800883 }
884 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +0000885 adapter->rx_ring[i]->cpu = -1;
886 ixgbe_update_rx_dca(adapter, adapter->rx_ring[i]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800887 }
888}
889
890static int __ixgbe_notify_dca(struct device *dev, void *data)
891{
892 struct net_device *netdev = dev_get_drvdata(dev);
893 struct ixgbe_adapter *adapter = netdev_priv(netdev);
894 unsigned long event = *(unsigned long *)data;
895
896 switch (event) {
897 case DCA_PROVIDER_ADD:
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -0700898 /* if we're already enabled, don't do it again */
899 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
900 break;
Denis V. Lunev652f0932008-03-27 14:39:17 +0300901 if (dca_add_requester(dev) == 0) {
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -0700902 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800903 ixgbe_setup_dca(adapter);
904 break;
905 }
906 /* Fall Through since DCA is disabled. */
907 case DCA_PROVIDER_REMOVE:
908 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
909 dca_remove_requester(dev);
910 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
911 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
912 }
913 break;
914 }
915
Denis V. Lunev652f0932008-03-27 14:39:17 +0300916 return 0;
Jeb Cramerbd0362d2008-03-03 15:04:02 -0800917}
918
Jeff Garzik5dd2d332008-10-16 05:09:31 -0400919#endif /* CONFIG_IXGBE_DCA */
Auke Kok9a799d72007-09-15 14:07:45 -0700920/**
921 * ixgbe_receive_skb - Send a completed packet up the stack
922 * @adapter: board private structure
923 * @skb: packet to send up
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700924 * @status: hardware indication of status of receive
925 * @rx_ring: rx descriptor ring (for a specific queue) to setup
926 * @rx_desc: rx descriptor
Auke Kok9a799d72007-09-15 14:07:45 -0700927 **/
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800928static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
Joe Perchese8e9f692010-09-07 21:34:53 +0000929 struct sk_buff *skb, u8 status,
930 struct ixgbe_ring *ring,
931 union ixgbe_adv_rx_desc *rx_desc)
Auke Kok9a799d72007-09-15 14:07:45 -0700932{
Herbert Xu78b6f4c2009-01-18 21:49:45 -0800933 struct ixgbe_adapter *adapter = q_vector->adapter;
934 struct napi_struct *napi = &q_vector->napi;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -0700935 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
936 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
Auke Kok9a799d72007-09-15 14:07:45 -0700937
Jesse Grossf62bbb52010-10-20 13:56:10 +0000938 if (is_vlan && (tag & VLAN_VID_MASK))
939 __vlan_hwaccel_put_tag(skb, tag);
940
941 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
942 napi_gro_receive(napi, skb);
943 else
944 netif_rx(skb);
Auke Kok9a799d72007-09-15 14:07:45 -0700945}
946
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800947/**
948 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
949 * @adapter: address of board private structure
950 * @status_err: hardware indication of status of receive
951 * @skb: skb currently being received and modified
952 **/
Auke Kok9a799d72007-09-15 14:07:45 -0700953static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
Don Skidmore8bae1b22009-07-23 18:00:39 +0000954 union ixgbe_adv_rx_desc *rx_desc,
955 struct sk_buff *skb)
Auke Kok9a799d72007-09-15 14:07:45 -0700956{
Don Skidmore8bae1b22009-07-23 18:00:39 +0000957 u32 status_err = le32_to_cpu(rx_desc->wb.upper.status_error);
958
Eric Dumazetbc8acf22010-09-02 13:07:41 -0700959 skb_checksum_none_assert(skb);
Auke Kok9a799d72007-09-15 14:07:45 -0700960
Jesse Brandeburg712744b2008-08-26 04:26:56 -0700961 /* Rx csum disabled */
962 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
Auke Kok9a799d72007-09-15 14:07:45 -0700963 return;
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800964
965 /* if IP and error */
966 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
967 (status_err & IXGBE_RXDADV_ERR_IPE)) {
Auke Kok9a799d72007-09-15 14:07:45 -0700968 adapter->hw_csum_rx_error++;
969 return;
970 }
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800971
972 if (!(status_err & IXGBE_RXD_STAT_L4CS))
973 return;
974
975 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
Don Skidmore8bae1b22009-07-23 18:00:39 +0000976 u16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
977
978 /*
979 * 82599 errata, UDP frames with a 0 checksum can be marked as
980 * checksum errors.
981 */
982 if ((pkt_info & IXGBE_RXDADV_PKTTYPE_UDP) &&
983 (adapter->hw.mac.type == ixgbe_mac_82599EB))
984 return;
985
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800986 adapter->hw_csum_rx_error++;
987 return;
988 }
989
Auke Kok9a799d72007-09-15 14:07:45 -0700990 /* It must be a TCP or UDP packet with a valid checksum */
Ayyappan Veeraiyane59bd252008-02-01 15:59:09 -0800991 skb->ip_summed = CHECKSUM_UNNECESSARY;
Auke Kok9a799d72007-09-15 14:07:45 -0700992}
993
Alexander Duyck84ea2592010-11-16 19:26:49 -0800994static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
PJ Waskiewicze8e26352009-02-27 15:45:05 +0000995{
996 /*
997 * Force memory writes to complete before letting h/w
998 * know there are new descriptors to fetch. (Only
999 * applicable for weak-ordered memory model archs,
1000 * such as IA-64).
1001 */
1002 wmb();
Alexander Duyck84ea2592010-11-16 19:26:49 -08001003 writel(val, rx_ring->tail);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001004}
1005
Auke Kok9a799d72007-09-15 14:07:45 -07001006/**
1007 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
1008 * @adapter: address of board private structure
1009 **/
Alexander Duyck84418e32010-08-19 13:40:54 +00001010void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00001011 struct ixgbe_ring *rx_ring,
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001012 u16 cleaned_count)
Auke Kok9a799d72007-09-15 14:07:45 -07001013{
Auke Kok9a799d72007-09-15 14:07:45 -07001014 struct pci_dev *pdev = adapter->pdev;
1015 union ixgbe_adv_rx_desc *rx_desc;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001016 struct ixgbe_rx_buffer *bi;
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001017 struct sk_buff *skb;
1018 u16 i = rx_ring->next_to_use;
Auke Kok9a799d72007-09-15 14:07:45 -07001019
1020 while (cleaned_count--) {
Alexander Duyck31f05a22010-08-19 13:40:31 +00001021 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, i);
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001022 bi = &rx_ring->rx_buffer_info[i];
1023 skb = bi->skb;
Auke Kok9a799d72007-09-15 14:07:45 -07001024
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001025 if (!skb) {
1026 skb = netdev_alloc_skb_ip_align(adapter->netdev,
1027 rx_ring->rx_buf_len);
Auke Kok9a799d72007-09-15 14:07:45 -07001028 if (!skb) {
1029 adapter->alloc_rx_buff_failed++;
1030 goto no_buffers;
1031 }
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001032 /* initialize queue mapping */
1033 skb_record_rx_queue(skb, rx_ring->queue_index);
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001034 bi->skb = skb;
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001035 }
Auke Kok9a799d72007-09-15 14:07:45 -07001036
Alexander Duyckd716a7d2010-08-19 13:33:41 +00001037 if (!bi->dma) {
1038 bi->dma = dma_map_single(&pdev->dev,
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001039 skb->data,
Joe Perchese8e9f692010-09-07 21:34:53 +00001040 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00001041 DMA_FROM_DEVICE);
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001042 if (dma_mapping_error(&pdev->dev, bi->dma)) {
1043 adapter->alloc_rx_buff_failed++;
1044 bi->dma = 0;
1045 goto no_buffers;
1046 }
Auke Kok9a799d72007-09-15 14:07:45 -07001047 }
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001048
Yi Zou6e455b892009-08-06 13:05:44 +00001049 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Alexander Duyckd5f398e2010-11-16 19:26:48 -08001050 if (!bi->page) {
1051 bi->page = netdev_alloc_page(adapter->netdev);
1052 if (!bi->page) {
1053 adapter->alloc_rx_page_failed++;
1054 goto no_buffers;
1055 }
1056 }
1057
1058 if (!bi->page_dma) {
1059 /* use a half page if we're re-using */
1060 bi->page_offset ^= PAGE_SIZE / 2;
1061 bi->page_dma = dma_map_page(&pdev->dev,
1062 bi->page,
1063 bi->page_offset,
1064 PAGE_SIZE / 2,
1065 DMA_FROM_DEVICE);
1066 if (dma_mapping_error(&pdev->dev,
1067 bi->page_dma)) {
1068 adapter->alloc_rx_page_failed++;
1069 bi->page_dma = 0;
1070 goto no_buffers;
1071 }
1072 }
1073
1074 /* Refresh the desc even if buffer_addrs didn't change
1075 * because each write-back erases this info. */
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001076 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
1077 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07001078 } else {
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001079 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
Alexander Duyck84418e32010-08-19 13:40:54 +00001080 rx_desc->read.hdr_addr = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001081 }
1082
1083 i++;
1084 if (i == rx_ring->count)
1085 i = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001086 }
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001087
Auke Kok9a799d72007-09-15 14:07:45 -07001088no_buffers:
1089 if (rx_ring->next_to_use != i) {
1090 rx_ring->next_to_use = i;
Alexander Duyck84ea2592010-11-16 19:26:49 -08001091 ixgbe_release_rx_desc(rx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -07001092 }
1093}
1094
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001095static inline u16 ixgbe_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
1096{
1097 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
1098}
1099
1100static inline u16 ixgbe_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
1101{
1102 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1103}
1104
Alexander Duyckf8212f92009-04-27 22:42:37 +00001105static inline u32 ixgbe_get_rsc_count(union ixgbe_adv_rx_desc *rx_desc)
1106{
1107 return (le32_to_cpu(rx_desc->wb.lower.lo_dword.data) &
Joe Perchese8e9f692010-09-07 21:34:53 +00001108 IXGBE_RXDADV_RSCCNT_MASK) >>
1109 IXGBE_RXDADV_RSCCNT_SHIFT;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001110}
1111
1112/**
1113 * ixgbe_transform_rsc_queue - change rsc queue into a full packet
1114 * @skb: pointer to the last skb in the rsc queue
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001115 * @count: pointer to number of packets coalesced in this context
Alexander Duyckf8212f92009-04-27 22:42:37 +00001116 *
1117 * This function changes a queue full of hw rsc buffers into a completed
1118 * packet. It uses the ->prev pointers to find the first packet and then
1119 * turns it into the frag list owner.
1120 **/
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001121static inline struct sk_buff *ixgbe_transform_rsc_queue(struct sk_buff *skb,
Joe Perchese8e9f692010-09-07 21:34:53 +00001122 u64 *count)
Alexander Duyckf8212f92009-04-27 22:42:37 +00001123{
1124 unsigned int frag_list_size = 0;
1125
1126 while (skb->prev) {
1127 struct sk_buff *prev = skb->prev;
1128 frag_list_size += skb->len;
1129 skb->prev = NULL;
1130 skb = prev;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001131 *count += 1;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001132 }
1133
1134 skb_shinfo(skb)->frag_list = skb->next;
1135 skb->next = NULL;
1136 skb->len += frag_list_size;
1137 skb->data_len += frag_list_size;
1138 skb->truesize += frag_list_size;
1139 return skb;
1140}
1141
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001142struct ixgbe_rsc_cb {
1143 dma_addr_t dma;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001144 bool delay_unmap;
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001145};
1146
1147#define IXGBE_RSC_CB(skb) ((struct ixgbe_rsc_cb *)(skb)->cb)
1148
Herbert Xu78b6f4c2009-01-18 21:49:45 -08001149static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
Joe Perchese8e9f692010-09-07 21:34:53 +00001150 struct ixgbe_ring *rx_ring,
1151 int *work_done, int work_to_do)
Auke Kok9a799d72007-09-15 14:07:45 -07001152{
Herbert Xu78b6f4c2009-01-18 21:49:45 -08001153 struct ixgbe_adapter *adapter = q_vector->adapter;
Auke Kok9a799d72007-09-15 14:07:45 -07001154 struct pci_dev *pdev = adapter->pdev;
1155 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
1156 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
1157 struct sk_buff *skb;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001158 unsigned int i, rsc_count = 0;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001159 u32 len, staterr;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07001160 u16 hdr_info;
1161 bool cleaned = false;
Auke Kok9a799d72007-09-15 14:07:45 -07001162 int cleaned_count = 0;
Ayyappan Veeraiyand2f4fbe2008-02-01 15:59:19 -08001163 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
Yi Zou3d8fd382009-06-08 14:38:44 +00001164#ifdef IXGBE_FCOE
1165 int ddp_bytes = 0;
1166#endif /* IXGBE_FCOE */
Auke Kok9a799d72007-09-15 14:07:45 -07001167
1168 i = rx_ring->next_to_clean;
Alexander Duyck31f05a22010-08-19 13:40:31 +00001169 rx_desc = IXGBE_RX_DESC_ADV(rx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -07001170 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1171 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -07001172
1173 while (staterr & IXGBE_RXD_STAT_DD) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001174 u32 upper_len = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001175 if (*work_done >= work_to_do)
1176 break;
1177 (*work_done)++;
1178
Milton Miller3c945e52010-02-19 17:44:42 +00001179 rmb(); /* read descriptor and rx_buffer_info after status DD */
Yi Zou6e455b892009-08-06 13:05:44 +00001180 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001181 hdr_info = le16_to_cpu(ixgbe_get_hdr_info(rx_desc));
1182 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001183 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07001184 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
Shannon Nelson0b746e02010-05-18 16:00:03 +00001185 if ((len > IXGBE_RX_HDR_SIZE) ||
1186 (upper_len && !(hdr_info & IXGBE_RXDADV_SPH)))
1187 len = IXGBE_RX_HDR_SIZE;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001188 } else {
Auke Kok9a799d72007-09-15 14:07:45 -07001189 len = le16_to_cpu(rx_desc->wb.upper.length);
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07001190 }
Auke Kok9a799d72007-09-15 14:07:45 -07001191
1192 cleaned = true;
1193 skb = rx_buffer_info->skb;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00001194 prefetch(skb->data);
Auke Kok9a799d72007-09-15 14:07:45 -07001195 rx_buffer_info->skb = NULL;
1196
Alexander Duyck21fa4e62009-06-04 15:59:49 +00001197 if (rx_buffer_info->dma) {
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001198 if ((adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
1199 (!(staterr & IXGBE_RXD_STAT_EOP)) &&
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001200 (!(skb->prev))) {
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001201 /*
1202 * When HWRSC is enabled, delay unmapping
1203 * of the first packet. It carries the
1204 * header information, HW may still
1205 * access the header after the writeback.
1206 * Only unmap it when EOP is reached
1207 */
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001208 IXGBE_RSC_CB(skb)->delay_unmap = true;
Mallikarjuna R Chilakala43634e82010-02-25 23:14:37 +00001209 IXGBE_RSC_CB(skb)->dma = rx_buffer_info->dma;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001210 } else {
Nick Nunley1b507732010-04-27 13:10:27 +00001211 dma_unmap_single(&pdev->dev,
Joe Perchese8e9f692010-09-07 21:34:53 +00001212 rx_buffer_info->dma,
1213 rx_ring->rx_buf_len,
1214 DMA_FROM_DEVICE);
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001215 }
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00001216 rx_buffer_info->dma = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001217 skb_put(skb, len);
1218 }
1219
1220 if (upper_len) {
Nick Nunley1b507732010-04-27 13:10:27 +00001221 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1222 PAGE_SIZE / 2, DMA_FROM_DEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -07001223 rx_buffer_info->page_dma = 0;
1224 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
Joe Perchese8e9f692010-09-07 21:34:53 +00001225 rx_buffer_info->page,
1226 rx_buffer_info->page_offset,
1227 upper_len);
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07001228
1229 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
1230 (page_count(rx_buffer_info->page) != 1))
1231 rx_buffer_info->page = NULL;
1232 else
1233 get_page(rx_buffer_info->page);
Auke Kok9a799d72007-09-15 14:07:45 -07001234
1235 skb->len += upper_len;
1236 skb->data_len += upper_len;
1237 skb->truesize += upper_len;
1238 }
1239
1240 i++;
1241 if (i == rx_ring->count)
1242 i = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07001243
Alexander Duyck31f05a22010-08-19 13:40:31 +00001244 next_rxd = IXGBE_RX_DESC_ADV(rx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -07001245 prefetch(next_rxd);
Auke Kok9a799d72007-09-15 14:07:45 -07001246 cleaned_count++;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001247
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00001248 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
Alexander Duyckf8212f92009-04-27 22:42:37 +00001249 rsc_count = ixgbe_get_rsc_count(rx_desc);
1250
1251 if (rsc_count) {
1252 u32 nextp = (staterr & IXGBE_RXDADV_NEXTP_MASK) >>
1253 IXGBE_RXDADV_NEXTP_SHIFT;
1254 next_buffer = &rx_ring->rx_buffer_info[nextp];
Alexander Duyckf8212f92009-04-27 22:42:37 +00001255 } else {
1256 next_buffer = &rx_ring->rx_buffer_info[i];
1257 }
1258
Auke Kok9a799d72007-09-15 14:07:45 -07001259 if (staterr & IXGBE_RXD_STAT_EOP) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00001260 if (skb->prev)
Joe Perchese8e9f692010-09-07 21:34:53 +00001261 skb = ixgbe_transform_rsc_queue(skb,
1262 &(rx_ring->rsc_count));
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001263 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001264 if (IXGBE_RSC_CB(skb)->delay_unmap) {
Nick Nunley1b507732010-04-27 13:10:27 +00001265 dma_unmap_single(&pdev->dev,
1266 IXGBE_RSC_CB(skb)->dma,
Joe Perchese8e9f692010-09-07 21:34:53 +00001267 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00001268 DMA_FROM_DEVICE);
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00001269 IXGBE_RSC_CB(skb)->dma = 0;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00001270 IXGBE_RSC_CB(skb)->delay_unmap = false;
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00001271 }
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001272 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED)
Joe Perchese8e9f692010-09-07 21:34:53 +00001273 rx_ring->rsc_count +=
1274 skb_shinfo(skb)->nr_frags;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00001275 else
1276 rx_ring->rsc_count++;
1277 rx_ring->rsc_flush++;
1278 }
Eric Dumazetde1036b2010-10-20 23:00:04 +00001279 u64_stats_update_begin(&rx_ring->syncp);
Auke Kok9a799d72007-09-15 14:07:45 -07001280 rx_ring->stats.packets++;
1281 rx_ring->stats.bytes += skb->len;
Eric Dumazetde1036b2010-10-20 23:00:04 +00001282 u64_stats_update_end(&rx_ring->syncp);
Auke Kok9a799d72007-09-15 14:07:45 -07001283 } else {
Yi Zou6e455b892009-08-06 13:05:44 +00001284 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00001285 rx_buffer_info->skb = next_buffer->skb;
1286 rx_buffer_info->dma = next_buffer->dma;
1287 next_buffer->skb = skb;
1288 next_buffer->dma = 0;
1289 } else {
1290 skb->next = next_buffer->skb;
1291 skb->next->prev = skb;
1292 }
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00001293 rx_ring->non_eop_descs++;
Auke Kok9a799d72007-09-15 14:07:45 -07001294 goto next_desc;
1295 }
1296
1297 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
1298 dev_kfree_skb_irq(skb);
1299 goto next_desc;
1300 }
1301
Don Skidmore8bae1b22009-07-23 18:00:39 +00001302 ixgbe_rx_checksum(adapter, rx_desc, skb);
Ayyappan Veeraiyand2f4fbe2008-02-01 15:59:19 -08001303
1304 /* probably a little skewed due to removing CRC */
1305 total_rx_bytes += skb->len;
1306 total_rx_packets++;
1307
Jesse Brandeburg74ce8dd2008-09-11 20:03:23 -07001308 skb->protocol = eth_type_trans(skb, adapter->netdev);
Yi Zou332d4a72009-05-13 13:11:53 +00001309#ifdef IXGBE_FCOE
1310 /* if ddp, not passing to ULD unless for FCP_RSP or error */
Yi Zou3d8fd382009-06-08 14:38:44 +00001311 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1312 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
1313 if (!ddp_bytes)
Yi Zou332d4a72009-05-13 13:11:53 +00001314 goto next_desc;
Yi Zou3d8fd382009-06-08 14:38:44 +00001315 }
Yi Zou332d4a72009-05-13 13:11:53 +00001316#endif /* IXGBE_FCOE */
Alexander Duyckfdaff1c2009-05-06 10:43:47 +00001317 ixgbe_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
Auke Kok9a799d72007-09-15 14:07:45 -07001318
1319next_desc:
1320 rx_desc->wb.upper.status_error = 0;
1321
1322 /* return some buffers to hardware, one at a time is too slow */
1323 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
1324 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
1325 cleaned_count = 0;
1326 }
1327
1328 /* use prefetched values */
1329 rx_desc = next_rxd;
Alexander Duyckf8212f92009-04-27 22:42:37 +00001330 rx_buffer_info = &rx_ring->rx_buffer_info[i];
Auke Kok9a799d72007-09-15 14:07:45 -07001331
1332 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07001333 }
1334
Auke Kok9a799d72007-09-15 14:07:45 -07001335 rx_ring->next_to_clean = i;
1336 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
1337
1338 if (cleaned_count)
1339 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
1340
Yi Zou3d8fd382009-06-08 14:38:44 +00001341#ifdef IXGBE_FCOE
1342 /* include DDPed FCoE data */
1343 if (ddp_bytes > 0) {
1344 unsigned int mss;
1345
1346 mss = adapter->netdev->mtu - sizeof(struct fcoe_hdr) -
1347 sizeof(struct fc_frame_header) -
1348 sizeof(struct fcoe_crc_eof);
1349 if (mss > 512)
1350 mss &= ~511;
1351 total_rx_bytes += ddp_bytes;
1352 total_rx_packets += DIV_ROUND_UP(ddp_bytes, mss);
1353 }
1354#endif /* IXGBE_FCOE */
1355
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001356 rx_ring->total_packets += total_rx_packets;
1357 rx_ring->total_bytes += total_rx_bytes;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001358
Auke Kok9a799d72007-09-15 14:07:45 -07001359 return cleaned;
1360}
1361
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001362static int ixgbe_clean_rxonly(struct napi_struct *, int);
Auke Kok9a799d72007-09-15 14:07:45 -07001363/**
1364 * ixgbe_configure_msix - Configure MSI-X hardware
1365 * @adapter: board private structure
1366 *
1367 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1368 * interrupts.
1369 **/
1370static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
1371{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001372 struct ixgbe_q_vector *q_vector;
1373 int i, j, q_vectors, v_idx, r_idx;
1374 u32 mask;
Auke Kok9a799d72007-09-15 14:07:45 -07001375
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001376 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1377
Jesse Brandeburg4df10462009-03-13 22:15:31 +00001378 /*
1379 * Populate the IVAR table and set the ITR values to the
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001380 * corresponding register.
1381 */
1382 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00001383 q_vector = adapter->q_vector[v_idx];
Akinobu Mita984b3f52010-03-05 13:41:37 -08001384 /* XXX for_each_set_bit(...) */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001385 r_idx = find_first_bit(q_vector->rxr_idx,
Joe Perchese8e9f692010-09-07 21:34:53 +00001386 adapter->num_rx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001387
1388 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001389 j = adapter->rx_ring[r_idx]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001390 ixgbe_set_ivar(adapter, 0, j, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001391 r_idx = find_next_bit(q_vector->rxr_idx,
Joe Perchese8e9f692010-09-07 21:34:53 +00001392 adapter->num_rx_queues,
1393 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001394 }
1395 r_idx = find_first_bit(q_vector->txr_idx,
Joe Perchese8e9f692010-09-07 21:34:53 +00001396 adapter->num_tx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001397
1398 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001399 j = adapter->tx_ring[r_idx]->reg_idx;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001400 ixgbe_set_ivar(adapter, 1, j, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001401 r_idx = find_next_bit(q_vector->txr_idx,
Joe Perchese8e9f692010-09-07 21:34:53 +00001402 adapter->num_tx_queues,
1403 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001404 }
1405
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001406 if (q_vector->txr_count && !q_vector->rxr_count)
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001407 /* tx only */
1408 q_vector->eitr = adapter->tx_eitr_param;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001409 else if (q_vector->rxr_count)
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001410 /* rx or mixed */
1411 q_vector->eitr = adapter->rx_eitr_param;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001412
Alexander Duyckfe49f042009-06-04 16:00:09 +00001413 ixgbe_write_eitr(q_vector);
Peter Waskiewiczb25ebfd2010-10-05 01:27:49 +00001414 /* If Flow Director is enabled, set interrupt affinity */
1415 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
1416 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
1417 /*
1418 * Allocate the affinity_hint cpumask, assign the mask
1419 * for this vector, and set our affinity_hint for
1420 * this irq.
1421 */
1422 if (!alloc_cpumask_var(&q_vector->affinity_mask,
1423 GFP_KERNEL))
1424 return;
1425 cpumask_set_cpu(v_idx, q_vector->affinity_mask);
1426 irq_set_affinity_hint(adapter->msix_entries[v_idx].vector,
1427 q_vector->affinity_mask);
1428 }
Auke Kok9a799d72007-09-15 14:07:45 -07001429 }
1430
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001431 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
1432 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
Joe Perchese8e9f692010-09-07 21:34:53 +00001433 v_idx);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001434 else if (adapter->hw.mac.type == ixgbe_mac_82599EB)
1435 ixgbe_set_ivar(adapter, -1, 1, v_idx);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001436 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
Auke Kok9a799d72007-09-15 14:07:45 -07001437
Jesse Brandeburg41fb9242008-09-11 19:55:58 -07001438 /* set up to autoclear timer, and the vectors */
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001439 mask = IXGBE_EIMS_ENABLE_MASK;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001440 if (adapter->num_vfs)
1441 mask &= ~(IXGBE_EIMS_OTHER |
1442 IXGBE_EIMS_MAILBOX |
1443 IXGBE_EIMS_LSC);
1444 else
1445 mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001446 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
Auke Kok9a799d72007-09-15 14:07:45 -07001447}
1448
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001449enum latency_range {
1450 lowest_latency = 0,
1451 low_latency = 1,
1452 bulk_latency = 2,
1453 latency_invalid = 255
1454};
1455
1456/**
1457 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1458 * @adapter: pointer to adapter
1459 * @eitr: eitr setting (ints per sec) to give last timeslice
1460 * @itr_setting: current throttle rate in ints/second
1461 * @packets: the number of packets during this measurement interval
1462 * @bytes: the number of bytes during this measurement interval
1463 *
1464 * Stores a new ITR value based on packets and byte
1465 * counts during the last interrupt. The advantage of per interrupt
1466 * computation is faster updates and more accurate ITR for the current
1467 * traffic pattern. Constants in this function were computed
1468 * based on theoretical maximum wire speed and thresholds were set based
1469 * on testing data as well as attempting to minimize response time
1470 * while increasing bulk throughput.
1471 * this functionality is controlled by the InterruptThrottleRate module
1472 * parameter (see ixgbe_param.c)
1473 **/
1474static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00001475 u32 eitr, u8 itr_setting,
1476 int packets, int bytes)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001477{
1478 unsigned int retval = itr_setting;
1479 u32 timepassed_us;
1480 u64 bytes_perint;
1481
1482 if (packets == 0)
1483 goto update_itr_done;
1484
1485
1486 /* simple throttlerate management
1487 * 0-20MB/s lowest (100000 ints/s)
1488 * 20-100MB/s low (20000 ints/s)
1489 * 100-1249MB/s bulk (8000 ints/s)
1490 */
1491 /* what was last interrupt timeslice? */
1492 timepassed_us = 1000000/eitr;
1493 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1494
1495 switch (itr_setting) {
1496 case lowest_latency:
1497 if (bytes_perint > adapter->eitr_low)
1498 retval = low_latency;
1499 break;
1500 case low_latency:
1501 if (bytes_perint > adapter->eitr_high)
1502 retval = bulk_latency;
1503 else if (bytes_perint <= adapter->eitr_low)
1504 retval = lowest_latency;
1505 break;
1506 case bulk_latency:
1507 if (bytes_perint <= adapter->eitr_high)
1508 retval = low_latency;
1509 break;
1510 }
1511
1512update_itr_done:
1513 return retval;
1514}
1515
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001516/**
1517 * ixgbe_write_eitr - write EITR register in hardware specific way
Alexander Duyckfe49f042009-06-04 16:00:09 +00001518 * @q_vector: structure containing interrupt and ring information
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001519 *
1520 * This function is made to be called by ethtool and by the driver
1521 * when it needs to update EITR registers at runtime. Hardware
1522 * specific quirks/differences are taken care of here.
1523 */
Alexander Duyckfe49f042009-06-04 16:00:09 +00001524void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001525{
Alexander Duyckfe49f042009-06-04 16:00:09 +00001526 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001527 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001528 int v_idx = q_vector->v_idx;
1529 u32 itr_reg = EITR_INTS_PER_SEC_TO_REG(q_vector->eitr);
1530
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001531 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1532 /* must write high and low 16 bits to reset counter */
1533 itr_reg |= (itr_reg << 16);
1534 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
1535 /*
Jesse Brandeburgf8d1dca2010-04-27 01:37:20 +00001536 * 82599 can support a value of zero, so allow it for
1537 * max interrupt rate, but there is an errata where it can
1538 * not be zero with RSC
1539 */
1540 if (itr_reg == 8 &&
1541 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
1542 itr_reg = 0;
1543
1544 /*
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001545 * set the WDIS bit to not clear the timer bits and cause an
1546 * immediate assertion of the interrupt
1547 */
1548 itr_reg |= IXGBE_EITR_CNT_WDIS;
1549 }
1550 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
1551}
1552
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001553static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
1554{
1555 struct ixgbe_adapter *adapter = q_vector->adapter;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001556 u32 new_itr;
1557 u8 current_itr, ret_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001558 int i, r_idx;
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001559 struct ixgbe_ring *rx_ring, *tx_ring;
1560
1561 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1562 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001563 tx_ring = adapter->tx_ring[r_idx];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001564 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
Joe Perchese8e9f692010-09-07 21:34:53 +00001565 q_vector->tx_itr,
1566 tx_ring->total_packets,
1567 tx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001568 /* if the result for this queue would decrease interrupt
1569 * rate for this vector then use that result */
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001570 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
Joe Perchese8e9f692010-09-07 21:34:53 +00001571 q_vector->tx_itr - 1 : ret_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001572 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001573 r_idx + 1);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001574 }
1575
1576 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1577 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001578 rx_ring = adapter->rx_ring[r_idx];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001579 ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
Joe Perchese8e9f692010-09-07 21:34:53 +00001580 q_vector->rx_itr,
1581 rx_ring->total_packets,
1582 rx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001583 /* if the result for this queue would decrease interrupt
1584 * rate for this vector then use that result */
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001585 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
Joe Perchese8e9f692010-09-07 21:34:53 +00001586 q_vector->rx_itr - 1 : ret_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001587 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001588 r_idx + 1);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001589 }
1590
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001591 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001592
1593 switch (current_itr) {
1594 /* counts and packets in update_itr are dependent on these numbers */
1595 case lowest_latency:
1596 new_itr = 100000;
1597 break;
1598 case low_latency:
1599 new_itr = 20000; /* aka hwitr = ~200 */
1600 break;
1601 case bulk_latency:
1602 default:
1603 new_itr = 8000;
1604 break;
1605 }
1606
1607 if (new_itr != q_vector->eitr) {
Alexander Duyckfe49f042009-06-04 16:00:09 +00001608 /* do an exponential smoothing */
1609 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
Jesse Brandeburg509ee932009-03-13 22:13:28 +00001610
1611 /* save the algorithm value here, not the smoothed one */
1612 q_vector->eitr = new_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00001613
1614 ixgbe_write_eitr(q_vector);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001615 }
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001616}
1617
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001618/**
1619 * ixgbe_check_overtemp_task - worker thread to check over tempurature
1620 * @work: pointer to work_struct containing our data
1621 **/
1622static void ixgbe_check_overtemp_task(struct work_struct *work)
1623{
1624 struct ixgbe_adapter *adapter = container_of(work,
Joe Perchese8e9f692010-09-07 21:34:53 +00001625 struct ixgbe_adapter,
1626 check_overtemp_task);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001627 struct ixgbe_hw *hw = &adapter->hw;
1628 u32 eicr = adapter->interrupt_event;
1629
Joe Perches7ca647b2010-09-07 21:35:40 +00001630 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
1631 return;
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001632
Joe Perches7ca647b2010-09-07 21:35:40 +00001633 switch (hw->device_id) {
1634 case IXGBE_DEV_ID_82599_T3_LOM: {
1635 u32 autoneg;
1636 bool link_up = false;
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001637
Joe Perches7ca647b2010-09-07 21:35:40 +00001638 if (hw->mac.ops.check_link)
1639 hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
1640
1641 if (((eicr & IXGBE_EICR_GPI_SDP0) && (!link_up)) ||
1642 (eicr & IXGBE_EICR_LSC))
1643 /* Check if this is due to overtemp */
1644 if (hw->phy.ops.check_overtemp(hw) == IXGBE_ERR_OVERTEMP)
1645 break;
1646 return;
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001647 }
Joe Perches7ca647b2010-09-07 21:35:40 +00001648 default:
1649 if (!(eicr & IXGBE_EICR_GPI_SDP0))
1650 return;
1651 break;
1652 }
1653 e_crit(drv,
1654 "Network adapter has been stopped because it has over heated. "
1655 "Restart the computer. If the problem persists, "
1656 "power off the system and replace the adapter\n");
1657 /* write to clear the interrupt */
1658 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP0);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001659}
1660
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001661static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
1662{
1663 struct ixgbe_hw *hw = &adapter->hw;
1664
1665 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
1666 (eicr & IXGBE_EICR_GPI_SDP1)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00001667 e_crit(probe, "Fan has stopped, replace the adapter\n");
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001668 /* write to clear the interrupt */
1669 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1670 }
1671}
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001672
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001673static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
1674{
1675 struct ixgbe_hw *hw = &adapter->hw;
1676
1677 if (eicr & IXGBE_EICR_GPI_SDP1) {
1678 /* Clear the interrupt */
1679 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
1680 schedule_work(&adapter->multispeed_fiber_task);
1681 } else if (eicr & IXGBE_EICR_GPI_SDP2) {
1682 /* Clear the interrupt */
1683 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
1684 schedule_work(&adapter->sfp_config_module_task);
1685 } else {
1686 /* Interrupt isn't for us... */
1687 return;
1688 }
1689}
1690
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001691static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
1692{
1693 struct ixgbe_hw *hw = &adapter->hw;
1694
1695 adapter->lsc_int++;
1696 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1697 adapter->link_check_timeout = jiffies;
1698 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1699 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
Nelson, Shannon8a0717f2009-11-12 18:47:11 +00001700 IXGBE_WRITE_FLUSH(hw);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001701 schedule_work(&adapter->watchdog_task);
1702 }
1703}
1704
Auke Kok9a799d72007-09-15 14:07:45 -07001705static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
1706{
1707 struct net_device *netdev = data;
1708 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1709 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmore54037502009-02-21 15:42:56 -08001710 u32 eicr;
1711
1712 /*
1713 * Workaround for Silicon errata. Use clear-by-write instead
1714 * of clear-by-read. Reading with EICS will return the
1715 * interrupt causes without clearing, which later be done
1716 * with the write to EICR.
1717 */
1718 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
1719 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
Auke Kok9a799d72007-09-15 14:07:45 -07001720
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07001721 if (eicr & IXGBE_EICR_LSC)
1722 ixgbe_check_lsc(adapter);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08001723
Greg Rose1cdd1ec2010-01-09 02:26:46 +00001724 if (eicr & IXGBE_EICR_MAILBOX)
1725 ixgbe_msg_task(adapter);
1726
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001727 if (hw->mac.type == ixgbe_mac_82598EB)
1728 ixgbe_check_fan_failure(adapter, eicr);
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07001729
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001730 if (hw->mac.type == ixgbe_mac_82599EB) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00001731 ixgbe_check_sfp_event(adapter, eicr);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07001732 adapter->interrupt_event = eicr;
1733 if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
1734 ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)))
1735 schedule_work(&adapter->check_overtemp_task);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001736
1737 /* Handle Flow Director Full threshold interrupt */
1738 if (eicr & IXGBE_EICR_FLOW_DIR) {
1739 int i;
1740 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_FLOW_DIR);
1741 /* Disable transmits before FDIR Re-initialization */
1742 netif_tx_stop_all_queues(netdev);
1743 for (i = 0; i < adapter->num_tx_queues; i++) {
1744 struct ixgbe_ring *tx_ring =
Joe Perchese8e9f692010-09-07 21:34:53 +00001745 adapter->tx_ring[i];
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001746 if (test_and_clear_bit(__IXGBE_FDIR_INIT_DONE,
Joe Perchese8e9f692010-09-07 21:34:53 +00001747 &tx_ring->reinit_state))
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00001748 schedule_work(&adapter->fdir_reinit_task);
1749 }
1750 }
1751 }
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08001752 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1753 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
Auke Kok9a799d72007-09-15 14:07:45 -07001754
1755 return IRQ_HANDLED;
1756}
1757
Alexander Duyckfe49f042009-06-04 16:00:09 +00001758static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
1759 u64 qmask)
1760{
1761 u32 mask;
1762
1763 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1764 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1765 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1766 } else {
1767 mask = (qmask & 0xFFFFFFFF);
1768 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(0), mask);
1769 mask = (qmask >> 32);
1770 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS_EX(1), mask);
1771 }
1772 /* skip the flush */
1773}
1774
1775static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00001776 u64 qmask)
Alexander Duyckfe49f042009-06-04 16:00:09 +00001777{
1778 u32 mask;
1779
1780 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
1781 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
1782 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, mask);
1783 } else {
1784 mask = (qmask & 0xFFFFFFFF);
1785 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), mask);
1786 mask = (qmask >> 32);
1787 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), mask);
1788 }
1789 /* skip the flush */
1790}
1791
Auke Kok9a799d72007-09-15 14:07:45 -07001792static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
1793{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001794 struct ixgbe_q_vector *q_vector = data;
1795 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001796 struct ixgbe_ring *tx_ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001797 int i, r_idx;
Auke Kok9a799d72007-09-15 14:07:45 -07001798
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001799 if (!q_vector->txr_count)
1800 return IRQ_HANDLED;
1801
1802 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1803 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001804 tx_ring = adapter->tx_ring[r_idx];
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001805 tx_ring->total_bytes = 0;
1806 tx_ring->total_packets = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001807 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001808 r_idx + 1);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001809 }
1810
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001811 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyck91281fd2009-06-04 16:00:27 +00001812 napi_schedule(&q_vector->napi);
1813
Auke Kok9a799d72007-09-15 14:07:45 -07001814 return IRQ_HANDLED;
1815}
1816
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001817/**
1818 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1819 * @irq: unused
1820 * @data: pointer to our q_vector struct for this interrupt vector
1821 **/
Auke Kok9a799d72007-09-15 14:07:45 -07001822static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
1823{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001824 struct ixgbe_q_vector *q_vector = data;
1825 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001826 struct ixgbe_ring *rx_ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001827 int r_idx;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001828 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07001829
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001830 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001831 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001832 rx_ring = adapter->rx_ring[r_idx];
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001833 rx_ring->total_bytes = 0;
1834 rx_ring->total_packets = 0;
1835 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001836 r_idx + 1);
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07001837 }
1838
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001839 if (!q_vector->rxr_count)
1840 return IRQ_HANDLED;
1841
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001842 /* disable interrupts on this vector only */
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001843 /* EIAM disabled interrupts (on this vector) for us */
Ben Hutchings288379f2009-01-19 16:43:59 -08001844 napi_schedule(&q_vector->napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001845
Auke Kok9a799d72007-09-15 14:07:45 -07001846 return IRQ_HANDLED;
1847}
1848
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001849static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
1850{
Alexander Duyck91281fd2009-06-04 16:00:27 +00001851 struct ixgbe_q_vector *q_vector = data;
1852 struct ixgbe_adapter *adapter = q_vector->adapter;
1853 struct ixgbe_ring *ring;
1854 int r_idx;
1855 int i;
1856
1857 if (!q_vector->txr_count && !q_vector->rxr_count)
1858 return IRQ_HANDLED;
1859
1860 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1861 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001862 ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001863 ring->total_bytes = 0;
1864 ring->total_packets = 0;
1865 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001866 r_idx + 1);
Alexander Duyck91281fd2009-06-04 16:00:27 +00001867 }
1868
1869 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1870 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001871 ring = adapter->rx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001872 ring->total_bytes = 0;
1873 ring->total_packets = 0;
1874 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001875 r_idx + 1);
Alexander Duyck91281fd2009-06-04 16:00:27 +00001876 }
1877
Jesse Brandeburg9b471442009-12-03 11:33:54 +00001878 /* EIAM disabled interrupts (on this vector) for us */
Alexander Duyck91281fd2009-06-04 16:00:27 +00001879 napi_schedule(&q_vector->napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001880
1881 return IRQ_HANDLED;
1882}
1883
1884/**
1885 * ixgbe_clean_rxonly - msix (aka one shot) rx clean routine
1886 * @napi: napi struct with our devices info in it
1887 * @budget: amount of work driver is allowed to do this pass, in packets
1888 *
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001889 * This function is optimized for cleaning one queue only on a single
1890 * q_vector!!!
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001891 **/
Auke Kok9a799d72007-09-15 14:07:45 -07001892static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
1893{
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001894 struct ixgbe_q_vector *q_vector =
Joe Perchese8e9f692010-09-07 21:34:53 +00001895 container_of(napi, struct ixgbe_q_vector, napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001896 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001897 struct ixgbe_ring *rx_ring = NULL;
Auke Kok9a799d72007-09-15 14:07:45 -07001898 int work_done = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001899 long r_idx;
Auke Kok9a799d72007-09-15 14:07:45 -07001900
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001901 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001902 rx_ring = adapter->rx_ring[r_idx];
Jeff Garzik5dd2d332008-10-16 05:09:31 -04001903#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08001904 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
Jesse Brandeburg3a581072008-08-26 04:27:08 -07001905 ixgbe_update_rx_dca(adapter, rx_ring);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08001906#endif
Auke Kok9a799d72007-09-15 14:07:45 -07001907
Herbert Xu78b6f4c2009-01-18 21:49:45 -08001908 ixgbe_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
Auke Kok9a799d72007-09-15 14:07:45 -07001909
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08001910 /* If all Rx work done, exit the polling mode */
1911 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08001912 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001913 if (adapter->rx_itr_setting & 1)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08001914 ixgbe_set_itr_msix(q_vector);
Auke Kok9a799d72007-09-15 14:07:45 -07001915 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Alexander Duyckfe49f042009-06-04 16:00:09 +00001916 ixgbe_irq_enable_queues(adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00001917 ((u64)1 << q_vector->v_idx));
Auke Kok9a799d72007-09-15 14:07:45 -07001918 }
1919
1920 return work_done;
1921}
1922
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001923/**
Alexander Duyck91281fd2009-06-04 16:00:27 +00001924 * ixgbe_clean_rxtx_many - msix (aka one shot) rx clean routine
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001925 * @napi: napi struct with our devices info in it
1926 * @budget: amount of work driver is allowed to do this pass, in packets
1927 *
1928 * This function will clean more than one rx queue associated with a
1929 * q_vector.
1930 **/
Alexander Duyck91281fd2009-06-04 16:00:27 +00001931static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001932{
1933 struct ixgbe_q_vector *q_vector =
Joe Perchese8e9f692010-09-07 21:34:53 +00001934 container_of(napi, struct ixgbe_q_vector, napi);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001935 struct ixgbe_adapter *adapter = q_vector->adapter;
Alexander Duyck91281fd2009-06-04 16:00:27 +00001936 struct ixgbe_ring *ring = NULL;
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001937 int work_done = 0, i;
1938 long r_idx;
Alexander Duyck91281fd2009-06-04 16:00:27 +00001939 bool tx_clean_complete = true;
1940
1941 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
1942 for (i = 0; i < q_vector->txr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001943 ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00001944#ifdef CONFIG_IXGBE_DCA
1945 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1946 ixgbe_update_tx_dca(adapter, ring);
1947#endif
1948 tx_clean_complete &= ixgbe_clean_tx_irq(q_vector, ring);
1949 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001950 r_idx + 1);
Alexander Duyck91281fd2009-06-04 16:00:27 +00001951 }
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001952
1953 /* attempt to distribute budget to each queue fairly, but don't allow
1954 * the budget to go below 1 because we'll exit polling */
1955 budget /= (q_vector->rxr_count ?: 1);
1956 budget = max(budget, 1);
1957 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1958 for (i = 0; i < q_vector->rxr_count; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001959 ring = adapter->rx_ring[r_idx];
Jeff Garzik5dd2d332008-10-16 05:09:31 -04001960#ifdef CONFIG_IXGBE_DCA
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001961 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
Alexander Duyck91281fd2009-06-04 16:00:27 +00001962 ixgbe_update_rx_dca(adapter, ring);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001963#endif
Alexander Duyck91281fd2009-06-04 16:00:27 +00001964 ixgbe_clean_rx_irq(q_vector, ring, &work_done, budget);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001965 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00001966 r_idx + 1);
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001967 }
1968
1969 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00001970 ring = adapter->rx_ring[r_idx];
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001971 /* If all Rx work done, exit the polling mode */
Jesse Brandeburg7f821872008-09-11 20:00:16 -07001972 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08001973 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00001974 if (adapter->rx_itr_setting & 1)
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001975 ixgbe_set_itr_msix(q_vector);
1976 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Alexander Duyckfe49f042009-06-04 16:00:09 +00001977 ixgbe_irq_enable_queues(adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00001978 ((u64)1 << q_vector->v_idx));
Jesse Brandeburgf0848272008-09-11 19:59:42 -07001979 return 0;
1980 }
1981
1982 return work_done;
1983}
Alexander Duyck91281fd2009-06-04 16:00:27 +00001984
1985/**
1986 * ixgbe_clean_txonly - msix (aka one shot) tx clean routine
1987 * @napi: napi struct with our devices info in it
1988 * @budget: amount of work driver is allowed to do this pass, in packets
1989 *
1990 * This function is optimized for cleaning one queue only on a single
1991 * q_vector!!!
1992 **/
1993static int ixgbe_clean_txonly(struct napi_struct *napi, int budget)
1994{
1995 struct ixgbe_q_vector *q_vector =
Joe Perchese8e9f692010-09-07 21:34:53 +00001996 container_of(napi, struct ixgbe_q_vector, napi);
Alexander Duyck91281fd2009-06-04 16:00:27 +00001997 struct ixgbe_adapter *adapter = q_vector->adapter;
1998 struct ixgbe_ring *tx_ring = NULL;
1999 int work_done = 0;
2000 long r_idx;
2001
2002 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002003 tx_ring = adapter->tx_ring[r_idx];
Alexander Duyck91281fd2009-06-04 16:00:27 +00002004#ifdef CONFIG_IXGBE_DCA
2005 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2006 ixgbe_update_tx_dca(adapter, tx_ring);
2007#endif
2008
2009 if (!ixgbe_clean_tx_irq(q_vector, tx_ring))
2010 work_done = budget;
2011
Nelson, Shannonf7554a22009-09-18 09:46:06 +00002012 /* If all Tx work done, exit the polling mode */
Alexander Duyck91281fd2009-06-04 16:00:27 +00002013 if (work_done < budget) {
2014 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00002015 if (adapter->tx_itr_setting & 1)
Alexander Duyck91281fd2009-06-04 16:00:27 +00002016 ixgbe_set_itr_msix(q_vector);
2017 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Joe Perchese8e9f692010-09-07 21:34:53 +00002018 ixgbe_irq_enable_queues(adapter,
2019 ((u64)1 << q_vector->v_idx));
Alexander Duyck91281fd2009-06-04 16:00:27 +00002020 }
2021
2022 return work_done;
2023}
2024
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002025static inline void map_vector_to_rxq(struct ixgbe_adapter *a, int v_idx,
Joe Perchese8e9f692010-09-07 21:34:53 +00002026 int r_idx)
Auke Kok9a799d72007-09-15 14:07:45 -07002027{
Alexander Duyck7a921c92009-05-06 10:43:28 +00002028 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
2029
2030 set_bit(r_idx, q_vector->rxr_idx);
2031 q_vector->rxr_count++;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002032}
Auke Kok9a799d72007-09-15 14:07:45 -07002033
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002034static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
Joe Perchese8e9f692010-09-07 21:34:53 +00002035 int t_idx)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002036{
Alexander Duyck7a921c92009-05-06 10:43:28 +00002037 struct ixgbe_q_vector *q_vector = a->q_vector[v_idx];
2038
2039 set_bit(t_idx, q_vector->txr_idx);
2040 q_vector->txr_count++;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002041}
Auke Kok9a799d72007-09-15 14:07:45 -07002042
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002043/**
2044 * ixgbe_map_rings_to_vectors - Maps descriptor rings to vectors
2045 * @adapter: board private structure to initialize
2046 * @vectors: allotted vector count for descriptor rings
2047 *
2048 * This function maps descriptor rings to the queue-specific vectors
2049 * we were allotted through the MSI-X enabling code. Ideally, we'd have
2050 * one vector per ring/queue, but on a constrained vector budget, we
2051 * group the rings as "efficiently" as possible. You would add new
2052 * mapping configurations in here.
2053 **/
2054static int ixgbe_map_rings_to_vectors(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00002055 int vectors)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002056{
2057 int v_start = 0;
2058 int rxr_idx = 0, txr_idx = 0;
2059 int rxr_remaining = adapter->num_rx_queues;
2060 int txr_remaining = adapter->num_tx_queues;
2061 int i, j;
2062 int rqpv, tqpv;
2063 int err = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07002064
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002065 /* No mapping required if MSI-X is disabled. */
2066 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
Auke Kok9a799d72007-09-15 14:07:45 -07002067 goto out;
2068
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002069 /*
2070 * The ideal configuration...
2071 * We have enough vectors to map one per queue.
2072 */
2073 if (vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
2074 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
2075 map_vector_to_rxq(adapter, v_start, rxr_idx);
2076
2077 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
2078 map_vector_to_txq(adapter, v_start, txr_idx);
2079
2080 goto out;
2081 }
2082
2083 /*
2084 * If we don't have enough vectors for a 1-to-1
2085 * mapping, we'll have to group them so there are
2086 * multiple queues per vector.
2087 */
2088 /* Re-adjusting *qpv takes care of the remainder. */
2089 for (i = v_start; i < vectors; i++) {
2090 rqpv = DIV_ROUND_UP(rxr_remaining, vectors - i);
2091 for (j = 0; j < rqpv; j++) {
2092 map_vector_to_rxq(adapter, i, rxr_idx);
2093 rxr_idx++;
2094 rxr_remaining--;
Auke Kok9a799d72007-09-15 14:07:45 -07002095 }
Auke Kok9a799d72007-09-15 14:07:45 -07002096 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002097 for (i = v_start; i < vectors; i++) {
2098 tqpv = DIV_ROUND_UP(txr_remaining, vectors - i);
2099 for (j = 0; j < tqpv; j++) {
2100 map_vector_to_txq(adapter, i, txr_idx);
2101 txr_idx++;
2102 txr_remaining--;
Auke Kok9a799d72007-09-15 14:07:45 -07002103 }
Auke Kok9a799d72007-09-15 14:07:45 -07002104 }
2105
Auke Kok9a799d72007-09-15 14:07:45 -07002106out:
Auke Kok9a799d72007-09-15 14:07:45 -07002107 return err;
2108}
2109
2110/**
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002111 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2112 * @adapter: board private structure
2113 *
2114 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2115 * interrupts from the kernel.
2116 **/
2117static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2118{
2119 struct net_device *netdev = adapter->netdev;
2120 irqreturn_t (*handler)(int, void *);
2121 int i, vector, q_vectors, err;
Joe Perchese8e9f692010-09-07 21:34:53 +00002122 int ri = 0, ti = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002123
2124 /* Decrement for Other and TCP Timer vectors */
2125 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2126
2127 /* Map the Tx/Rx rings to the vectors we were allotted. */
2128 err = ixgbe_map_rings_to_vectors(adapter, q_vectors);
2129 if (err)
2130 goto out;
2131
2132#define SET_HANDLER(_v) ((!(_v)->rxr_count) ? &ixgbe_msix_clean_tx : \
Joe Perchese8e9f692010-09-07 21:34:53 +00002133 (!(_v)->txr_count) ? &ixgbe_msix_clean_rx : \
2134 &ixgbe_msix_clean_many)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002135 for (vector = 0; vector < q_vectors; vector++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00002136 handler = SET_HANDLER(adapter->q_vector[vector]);
Robert Olssoncb13fc22008-11-25 16:43:52 -08002137
Joe Perchese8e9f692010-09-07 21:34:53 +00002138 if (handler == &ixgbe_msix_clean_rx) {
Robert Olssoncb13fc22008-11-25 16:43:52 -08002139 sprintf(adapter->name[vector], "%s-%s-%d",
2140 netdev->name, "rx", ri++);
Joe Perchese8e9f692010-09-07 21:34:53 +00002141 } else if (handler == &ixgbe_msix_clean_tx) {
Robert Olssoncb13fc22008-11-25 16:43:52 -08002142 sprintf(adapter->name[vector], "%s-%s-%d",
2143 netdev->name, "tx", ti++);
Joe Perchese8e9f692010-09-07 21:34:53 +00002144 } else
Robert Olssoncb13fc22008-11-25 16:43:52 -08002145 sprintf(adapter->name[vector], "%s-%s-%d",
2146 netdev->name, "TxRx", vector);
2147
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002148 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchese8e9f692010-09-07 21:34:53 +00002149 handler, 0, adapter->name[vector],
2150 adapter->q_vector[vector]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002151 if (err) {
Emil Tantilov396e7992010-07-01 20:05:12 +00002152 e_err(probe, "request_irq failed for MSIX interrupt "
Emil Tantilov849c4542010-06-03 16:53:41 +00002153 "Error: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002154 goto free_queue_irqs;
2155 }
2156 }
2157
2158 sprintf(adapter->name[vector], "%s:lsc", netdev->name);
2159 err = request_irq(adapter->msix_entries[vector].vector,
Joe Perchese8e9f692010-09-07 21:34:53 +00002160 ixgbe_msix_lsc, 0, adapter->name[vector], netdev);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002161 if (err) {
Emil Tantilov396e7992010-07-01 20:05:12 +00002162 e_err(probe, "request_irq for msix_lsc failed: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002163 goto free_queue_irqs;
2164 }
2165
2166 return 0;
2167
2168free_queue_irqs:
2169 for (i = vector - 1; i >= 0; i--)
2170 free_irq(adapter->msix_entries[--vector].vector,
Joe Perchese8e9f692010-09-07 21:34:53 +00002171 adapter->q_vector[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002172 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2173 pci_disable_msix(adapter->pdev);
2174 kfree(adapter->msix_entries);
2175 adapter->msix_entries = NULL;
2176out:
2177 return err;
2178}
2179
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002180static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
2181{
Alexander Duyck7a921c92009-05-06 10:43:28 +00002182 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002183 u8 current_itr;
2184 u32 new_itr = q_vector->eitr;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002185 struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
2186 struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002187
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07002188 q_vector->tx_itr = ixgbe_update_itr(adapter, new_itr,
Joe Perchese8e9f692010-09-07 21:34:53 +00002189 q_vector->tx_itr,
2190 tx_ring->total_packets,
2191 tx_ring->total_bytes);
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07002192 q_vector->rx_itr = ixgbe_update_itr(adapter, new_itr,
Joe Perchese8e9f692010-09-07 21:34:53 +00002193 q_vector->rx_itr,
2194 rx_ring->total_packets,
2195 rx_ring->total_bytes);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002196
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07002197 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002198
2199 switch (current_itr) {
2200 /* counts and packets in update_itr are dependent on these numbers */
2201 case lowest_latency:
2202 new_itr = 100000;
2203 break;
2204 case low_latency:
2205 new_itr = 20000; /* aka hwitr = ~200 */
2206 break;
2207 case bulk_latency:
2208 new_itr = 8000;
2209 break;
2210 default:
2211 break;
2212 }
2213
2214 if (new_itr != q_vector->eitr) {
Alexander Duyckfe49f042009-06-04 16:00:09 +00002215 /* do an exponential smoothing */
2216 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
Jesse Brandeburg509ee932009-03-13 22:13:28 +00002217
2218 /* save the algorithm value here, not the smoothed one */
2219 q_vector->eitr = new_itr;
Alexander Duyckfe49f042009-06-04 16:00:09 +00002220
2221 ixgbe_write_eitr(q_vector);
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002222 }
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08002223}
2224
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002225/**
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002226 * ixgbe_irq_enable - Enable default interrupt generation settings
2227 * @adapter: board private structure
2228 **/
Emil Tantilov6af3b9e2010-09-29 21:35:23 +00002229static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2230 bool flush)
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002231{
2232 u32 mask;
Nelson, Shannon835462f2009-04-27 22:42:54 +00002233
2234 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07002235 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2236 mask |= IXGBE_EIMS_GPI_SDP0;
David S. Miller6ab33d52008-11-20 16:44:00 -08002237 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2238 mask |= IXGBE_EIMS_GPI_SDP1;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002239 if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
Jesse Brandeburg2a41ff82009-03-13 22:14:30 +00002240 mask |= IXGBE_EIMS_ECC;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002241 mask |= IXGBE_EIMS_GPI_SDP1;
2242 mask |= IXGBE_EIMS_GPI_SDP2;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002243 if (adapter->num_vfs)
2244 mask |= IXGBE_EIMS_MAILBOX;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002245 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00002246 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
2247 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
2248 mask |= IXGBE_EIMS_FLOW_DIR;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002249
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002250 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
Emil Tantilov6af3b9e2010-09-29 21:35:23 +00002251 if (queues)
2252 ixgbe_irq_enable_queues(adapter, ~0);
2253 if (flush)
2254 IXGBE_WRITE_FLUSH(&adapter->hw);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002255
2256 if (adapter->num_vfs > 32) {
2257 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2258 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2259 }
Alexey Dobriyan79aefa42008-11-19 14:17:02 -08002260}
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002261
2262/**
2263 * ixgbe_intr - legacy mode Interrupt Handler
Auke Kok9a799d72007-09-15 14:07:45 -07002264 * @irq: interrupt number
2265 * @data: pointer to a network interface device structure
Auke Kok9a799d72007-09-15 14:07:45 -07002266 **/
2267static irqreturn_t ixgbe_intr(int irq, void *data)
2268{
2269 struct net_device *netdev = data;
2270 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2271 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck7a921c92009-05-06 10:43:28 +00002272 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
Auke Kok9a799d72007-09-15 14:07:45 -07002273 u32 eicr;
2274
Don Skidmore54037502009-02-21 15:42:56 -08002275 /*
Emil Tantilov6af3b9e2010-09-29 21:35:23 +00002276 * Workaround for silicon errata on 82598. Mask the interrupts
Don Skidmore54037502009-02-21 15:42:56 -08002277 * before the read of EICR.
2278 */
2279 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2280
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002281 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2282 * therefore no explict interrupt disable is necessary */
2283 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
Jesse Brandeburgf47cf662008-09-11 19:56:14 -07002284 if (!eicr) {
Emil Tantilov6af3b9e2010-09-29 21:35:23 +00002285 /*
2286 * shared interrupt alert!
Jesse Brandeburgf47cf662008-09-11 19:56:14 -07002287 * make sure interrupts are enabled because the read will
Emil Tantilov6af3b9e2010-09-29 21:35:23 +00002288 * have disabled interrupts due to EIAM
2289 * finish the workaround of silicon errata on 82598. Unmask
2290 * the interrupt that we masked before the EICR read.
2291 */
2292 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2293 ixgbe_irq_enable(adapter, true, true);
Auke Kok9a799d72007-09-15 14:07:45 -07002294 return IRQ_NONE; /* Not our interrupt */
Jesse Brandeburgf47cf662008-09-11 19:56:14 -07002295 }
Auke Kok9a799d72007-09-15 14:07:45 -07002296
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07002297 if (eicr & IXGBE_EICR_LSC)
2298 ixgbe_check_lsc(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002299
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002300 if (hw->mac.type == ixgbe_mac_82599EB)
2301 ixgbe_check_sfp_event(adapter, eicr);
2302
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07002303 ixgbe_check_fan_failure(adapter, eicr);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07002304 if ((adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2305 ((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)))
2306 schedule_work(&adapter->check_overtemp_task);
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07002307
Alexander Duyck7a921c92009-05-06 10:43:28 +00002308 if (napi_schedule_prep(&(q_vector->napi))) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002309 adapter->tx_ring[0]->total_packets = 0;
2310 adapter->tx_ring[0]->total_bytes = 0;
2311 adapter->rx_ring[0]->total_packets = 0;
2312 adapter->rx_ring[0]->total_bytes = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002313 /* would disable interrupts here but EIAM disabled it */
Alexander Duyck7a921c92009-05-06 10:43:28 +00002314 __napi_schedule(&(q_vector->napi));
Auke Kok9a799d72007-09-15 14:07:45 -07002315 }
2316
Emil Tantilov6af3b9e2010-09-29 21:35:23 +00002317 /*
2318 * re-enable link(maybe) and non-queue interrupts, no flush.
2319 * ixgbe_poll will re-enable the queue interrupts
2320 */
2321
2322 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2323 ixgbe_irq_enable(adapter, false, false);
2324
Auke Kok9a799d72007-09-15 14:07:45 -07002325 return IRQ_HANDLED;
2326}
2327
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002328static inline void ixgbe_reset_q_vectors(struct ixgbe_adapter *adapter)
2329{
2330 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2331
2332 for (i = 0; i < q_vectors; i++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00002333 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002334 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
2335 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
2336 q_vector->rxr_count = 0;
2337 q_vector->txr_count = 0;
2338 }
2339}
2340
Auke Kok9a799d72007-09-15 14:07:45 -07002341/**
2342 * ixgbe_request_irq - initialize interrupts
2343 * @adapter: board private structure
2344 *
2345 * Attempts to configure interrupts using the best available
2346 * capabilities of the hardware and kernel.
2347 **/
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002348static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07002349{
2350 struct net_device *netdev = adapter->netdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002351 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07002352
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002353 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2354 err = ixgbe_request_msix_irqs(adapter);
2355 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
Joe Perchesa0607fd2009-11-18 23:29:17 -08002356 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
Joe Perchese8e9f692010-09-07 21:34:53 +00002357 netdev->name, netdev);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002358 } else {
Joe Perchesa0607fd2009-11-18 23:29:17 -08002359 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
Joe Perchese8e9f692010-09-07 21:34:53 +00002360 netdev->name, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002361 }
2362
Auke Kok9a799d72007-09-15 14:07:45 -07002363 if (err)
Emil Tantilov396e7992010-07-01 20:05:12 +00002364 e_err(probe, "request_irq failed, Error %d\n", err);
Auke Kok9a799d72007-09-15 14:07:45 -07002365
Auke Kok9a799d72007-09-15 14:07:45 -07002366 return err;
2367}
2368
2369static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2370{
2371 struct net_device *netdev = adapter->netdev;
2372
2373 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002374 int i, q_vectors;
Auke Kok9a799d72007-09-15 14:07:45 -07002375
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002376 q_vectors = adapter->num_msix_vectors;
2377
2378 i = q_vectors - 1;
Auke Kok9a799d72007-09-15 14:07:45 -07002379 free_irq(adapter->msix_entries[i].vector, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002380
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002381 i--;
2382 for (; i >= 0; i--) {
2383 free_irq(adapter->msix_entries[i].vector,
Joe Perchese8e9f692010-09-07 21:34:53 +00002384 adapter->q_vector[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002385 }
2386
2387 ixgbe_reset_q_vectors(adapter);
2388 } else {
2389 free_irq(adapter->pdev->irq, netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07002390 }
2391}
2392
2393/**
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002394 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2395 * @adapter: board private structure
2396 **/
2397static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2398{
Nelson, Shannon835462f2009-04-27 22:42:54 +00002399 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2400 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2401 } else {
2402 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2403 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002404 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002405 if (adapter->num_vfs > 32)
2406 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002407 }
2408 IXGBE_WRITE_FLUSH(&adapter->hw);
2409 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
2410 int i;
2411 for (i = 0; i < adapter->num_msix_vectors; i++)
2412 synchronize_irq(adapter->msix_entries[i].vector);
2413 } else {
2414 synchronize_irq(adapter->pdev->irq);
2415 }
2416}
2417
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00002418/**
Auke Kok9a799d72007-09-15 14:07:45 -07002419 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2420 *
2421 **/
2422static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
2423{
Auke Kok9a799d72007-09-15 14:07:45 -07002424 struct ixgbe_hw *hw = &adapter->hw;
2425
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002426 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
Joe Perchese8e9f692010-09-07 21:34:53 +00002427 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr_param));
Auke Kok9a799d72007-09-15 14:07:45 -07002428
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002429 ixgbe_set_ivar(adapter, 0, 0, 0);
2430 ixgbe_set_ivar(adapter, 1, 0, 0);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08002431
2432 map_vector_to_rxq(adapter, 0, 0);
2433 map_vector_to_txq(adapter, 0, 0);
2434
Emil Tantilov396e7992010-07-01 20:05:12 +00002435 e_info(hw, "Legacy interrupt IVAR setup done\n");
Auke Kok9a799d72007-09-15 14:07:45 -07002436}
2437
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002438/**
2439 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2440 * @adapter: board private structure
2441 * @ring: structure containing ring specific data
2442 *
2443 * Configure the Tx descriptor ring after a reset.
2444 **/
Alexander Duyck84418e32010-08-19 13:40:54 +00002445void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
2446 struct ixgbe_ring *ring)
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002447{
2448 struct ixgbe_hw *hw = &adapter->hw;
2449 u64 tdba = ring->dma;
Alexander Duyck2f1860b2010-08-19 13:39:43 +00002450 int wait_loop = 10;
2451 u32 txdctl;
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002452 u16 reg_idx = ring->reg_idx;
2453
Alexander Duyck2f1860b2010-08-19 13:39:43 +00002454 /* disable queue to avoid issues while updating state */
2455 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2456 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx),
2457 txdctl & ~IXGBE_TXDCTL_ENABLE);
2458 IXGBE_WRITE_FLUSH(hw);
2459
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002460 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
Joe Perchese8e9f692010-09-07 21:34:53 +00002461 (tdba & DMA_BIT_MASK(32)));
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002462 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
2463 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
2464 ring->count * sizeof(union ixgbe_adv_tx_desc));
2465 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
2466 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
Alexander Duyck84ea2592010-11-16 19:26:49 -08002467 ring->tail = hw->hw_addr + IXGBE_TDT(reg_idx);
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002468
Alexander Duyck2f1860b2010-08-19 13:39:43 +00002469 /* configure fetching thresholds */
2470 if (adapter->rx_itr_setting == 0) {
2471 /* cannot set wthresh when itr==0 */
2472 txdctl &= ~0x007F0000;
2473 } else {
2474 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
2475 txdctl |= (8 << 16);
2476 }
2477 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2478 /* PThresh workaround for Tx hang with DFP enabled. */
2479 txdctl |= 32;
2480 }
2481
2482 /* reinitialize flowdirector state */
2483 set_bit(__IXGBE_FDIR_INIT_DONE, &ring->reinit_state);
2484
2485 /* enable queue */
2486 txdctl |= IXGBE_TXDCTL_ENABLE;
2487 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
2488
2489 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2490 if (hw->mac.type == ixgbe_mac_82598EB &&
2491 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2492 return;
2493
2494 /* poll to verify queue is enabled */
2495 do {
2496 msleep(1);
2497 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
2498 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
2499 if (!wait_loop)
2500 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002501}
2502
Alexander Duyck120ff942010-08-19 13:34:50 +00002503static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
2504{
2505 struct ixgbe_hw *hw = &adapter->hw;
2506 u32 rttdcs;
2507 u32 mask;
2508
2509 if (hw->mac.type == ixgbe_mac_82598EB)
2510 return;
2511
2512 /* disable the arbiter while setting MTQC */
2513 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
2514 rttdcs |= IXGBE_RTTDCS_ARBDIS;
2515 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2516
2517 /* set transmit pool layout */
2518 mask = (IXGBE_FLAG_SRIOV_ENABLED | IXGBE_FLAG_DCB_ENABLED);
2519 switch (adapter->flags & mask) {
2520
2521 case (IXGBE_FLAG_SRIOV_ENABLED):
2522 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2523 (IXGBE_MTQC_VT_ENA | IXGBE_MTQC_64VF));
2524 break;
2525
2526 case (IXGBE_FLAG_DCB_ENABLED):
2527 /* We enable 8 traffic classes, DCB only */
2528 IXGBE_WRITE_REG(hw, IXGBE_MTQC,
2529 (IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ));
2530 break;
2531
2532 default:
2533 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
2534 break;
2535 }
2536
2537 /* re-enable the arbiter */
2538 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
2539 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
2540}
2541
Auke Kok9a799d72007-09-15 14:07:45 -07002542/**
Jesse Brandeburg3a581072008-08-26 04:27:08 -07002543 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
Auke Kok9a799d72007-09-15 14:07:45 -07002544 * @adapter: board private structure
2545 *
2546 * Configure the Tx unit of the MAC after a reset.
2547 **/
2548static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
2549{
Alexander Duyck2f1860b2010-08-19 13:39:43 +00002550 struct ixgbe_hw *hw = &adapter->hw;
2551 u32 dmatxctl;
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002552 u32 i;
Auke Kok9a799d72007-09-15 14:07:45 -07002553
Alexander Duyck2f1860b2010-08-19 13:39:43 +00002554 ixgbe_setup_mtqc(adapter);
2555
2556 if (hw->mac.type != ixgbe_mac_82598EB) {
2557 /* DMATXCTL.EN must be before Tx queues are enabled */
2558 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
2559 dmatxctl |= IXGBE_DMATXCTL_TE;
2560 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
2561 }
2562
Auke Kok9a799d72007-09-15 14:07:45 -07002563 /* Setup the HW Tx Head and Tail descriptor pointers */
Alexander Duyck43e69bf2010-08-19 13:35:12 +00002564 for (i = 0; i < adapter->num_tx_queues; i++)
2565 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07002566}
2567
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002568#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
Auke Kok9a799d72007-09-15 14:07:45 -07002569
Yi Zoua6616b42009-08-06 13:05:23 +00002570static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00002571 struct ixgbe_ring *rx_ring)
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002572{
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002573 u32 srrctl;
Yi Zoua6616b42009-08-06 13:05:23 +00002574 int index;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002575 struct ixgbe_ring_feature *feature = adapter->ring_feature;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002576
Yi Zoua6616b42009-08-06 13:05:23 +00002577 index = rx_ring->reg_idx;
2578 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
2579 unsigned long mask;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002580 mask = (unsigned long) feature[RING_F_RSS].mask;
Alexander Duyck3be1adf2008-08-30 00:29:10 -07002581 index = index & mask;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002582 }
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002583 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(index));
2584
2585 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
2586 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
Alexander Duyck9e10e042010-08-19 13:40:06 +00002587 if (adapter->num_vfs)
2588 srrctl |= IXGBE_SRRCTL_DROP_EN;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002589
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002590 srrctl |= (IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
2591 IXGBE_SRRCTL_BSIZEHDR_MASK;
2592
Yi Zou6e455b892009-08-06 13:05:44 +00002593 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002594#if (PAGE_SIZE / 2) > IXGBE_MAX_RXBUFFER
2595 srrctl |= IXGBE_MAX_RXBUFFER >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2596#else
2597 srrctl |= (PAGE_SIZE / 2) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
2598#endif
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002599 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002600 } else {
Alexander Duyckafafd5b2009-05-07 10:38:56 +00002601 srrctl |= ALIGN(rx_ring->rx_buf_len, 1024) >>
2602 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002603 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002604 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00002605
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002606 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(index), srrctl);
2607}
2608
Alexander Duyck05abb122010-08-19 13:35:41 +00002609static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002610{
Alexander Duyck05abb122010-08-19 13:35:41 +00002611 struct ixgbe_hw *hw = &adapter->hw;
2612 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
Joe Perchese8e9f692010-09-07 21:34:53 +00002613 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2614 0x6A3E67EA, 0x14364D17, 0x3BED200D};
Alexander Duyck05abb122010-08-19 13:35:41 +00002615 u32 mrqc = 0, reta = 0;
2616 u32 rxcsum;
2617 int i, j;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002618 int mask;
2619
Alexander Duyck05abb122010-08-19 13:35:41 +00002620 /* Fill out hash function seeds */
2621 for (i = 0; i < 10; i++)
2622 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002623
Alexander Duyck05abb122010-08-19 13:35:41 +00002624 /* Fill out redirection table */
2625 for (i = 0, j = 0; i < 128; i++, j++) {
2626 if (j == adapter->ring_feature[RING_F_RSS].indices)
2627 j = 0;
2628 /* reta = 4-byte sliding window of
2629 * 0x00..(indices-1)(indices-1)00..etc. */
2630 reta = (reta << 8) | (j * 0x11);
2631 if ((i & 3) == 3)
2632 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
2633 }
2634
2635 /* Disable indicating checksum in descriptor, enables RSS hash */
2636 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
2637 rxcsum |= IXGBE_RXCSUM_PCSD;
2638 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
2639
2640 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
2641 mask = adapter->flags & IXGBE_FLAG_RSS_ENABLED;
2642 else
2643 mask = adapter->flags & (IXGBE_FLAG_RSS_ENABLED
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002644#ifdef CONFIG_IXGBE_DCB
Alexander Duyck05abb122010-08-19 13:35:41 +00002645 | IXGBE_FLAG_DCB_ENABLED
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002646#endif
Alexander Duyck05abb122010-08-19 13:35:41 +00002647 | IXGBE_FLAG_SRIOV_ENABLED
2648 );
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002649
2650 switch (mask) {
2651 case (IXGBE_FLAG_RSS_ENABLED):
2652 mrqc = IXGBE_MRQC_RSSEN;
2653 break;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002654 case (IXGBE_FLAG_SRIOV_ENABLED):
2655 mrqc = IXGBE_MRQC_VMDQEN;
2656 break;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002657#ifdef CONFIG_IXGBE_DCB
2658 case (IXGBE_FLAG_DCB_ENABLED):
2659 mrqc = IXGBE_MRQC_RT8TCEN;
2660 break;
2661#endif /* CONFIG_IXGBE_DCB */
2662 default:
2663 break;
2664 }
2665
Alexander Duyck05abb122010-08-19 13:35:41 +00002666 /* Perform hash on these packet types */
2667 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2668 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2669 | IXGBE_MRQC_RSS_FIELD_IPV6
2670 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2671
2672 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002673}
2674
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07002675/**
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002676 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2677 * @adapter: address of board private structure
2678 * @index: index of ring to set
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002679 **/
Alexander Duyck73670962010-08-19 13:38:34 +00002680static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
2681 struct ixgbe_ring *ring)
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002682{
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002683 struct ixgbe_hw *hw = &adapter->hw;
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002684 u32 rscctrl;
Mallikarjuna R Chilakalaedd2ea52009-11-23 10:45:11 -08002685 int rx_buf_len;
Alexander Duyck73670962010-08-19 13:38:34 +00002686 u16 reg_idx = ring->reg_idx;
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002687
Alexander Duyck73670962010-08-19 13:38:34 +00002688 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
2689 return;
2690
2691 rx_buf_len = ring->rx_buf_len;
2692 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002693 rscctrl |= IXGBE_RSCCTL_RSCEN;
2694 /*
2695 * we must limit the number of descriptors so that the
2696 * total size of max desc * buf_len is not greater
2697 * than 65535
2698 */
Alexander Duyck73670962010-08-19 13:38:34 +00002699 if (ring->flags & IXGBE_RING_RX_PS_ENABLED) {
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002700#if (MAX_SKB_FRAGS > 16)
2701 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2702#elif (MAX_SKB_FRAGS > 8)
2703 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2704#elif (MAX_SKB_FRAGS > 4)
2705 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2706#else
2707 rscctrl |= IXGBE_RSCCTL_MAXDESC_1;
2708#endif
2709 } else {
2710 if (rx_buf_len < IXGBE_RXBUFFER_4096)
2711 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2712 else if (rx_buf_len < IXGBE_RXBUFFER_8192)
2713 rscctrl |= IXGBE_RSCCTL_MAXDESC_8;
2714 else
2715 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2716 }
Alexander Duyck73670962010-08-19 13:38:34 +00002717 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
Nelson, Shannonbb5a9ad2009-09-18 09:46:27 +00002718}
2719
Alexander Duyck9e10e042010-08-19 13:40:06 +00002720/**
2721 * ixgbe_set_uta - Set unicast filter table address
2722 * @adapter: board private structure
2723 *
2724 * The unicast table address is a register array of 32-bit registers.
2725 * The table is meant to be used in a way similar to how the MTA is used
2726 * however due to certain limitations in the hardware it is necessary to
2727 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
2728 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
2729 **/
2730static void ixgbe_set_uta(struct ixgbe_adapter *adapter)
2731{
2732 struct ixgbe_hw *hw = &adapter->hw;
2733 int i;
2734
2735 /* The UTA table only exists on 82599 hardware and newer */
2736 if (hw->mac.type < ixgbe_mac_82599EB)
2737 return;
2738
2739 /* we only need to do this if VMDq is enabled */
2740 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2741 return;
2742
2743 for (i = 0; i < 128; i++)
2744 IXGBE_WRITE_REG(hw, IXGBE_UTA(i), ~0);
2745}
2746
2747#define IXGBE_MAX_RX_DESC_POLL 10
2748static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
2749 struct ixgbe_ring *ring)
2750{
2751 struct ixgbe_hw *hw = &adapter->hw;
2752 int reg_idx = ring->reg_idx;
2753 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
2754 u32 rxdctl;
2755
2756 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2757 if (hw->mac.type == ixgbe_mac_82598EB &&
2758 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
2759 return;
2760
2761 do {
2762 msleep(1);
2763 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
2764 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
2765
2766 if (!wait_loop) {
2767 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
2768 "the polling period\n", reg_idx);
2769 }
2770}
2771
Alexander Duyck84418e32010-08-19 13:40:54 +00002772void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
2773 struct ixgbe_ring *ring)
Alexander Duyckacd37172010-08-19 13:36:05 +00002774{
2775 struct ixgbe_hw *hw = &adapter->hw;
2776 u64 rdba = ring->dma;
Alexander Duyck9e10e042010-08-19 13:40:06 +00002777 u32 rxdctl;
Alexander Duyckacd37172010-08-19 13:36:05 +00002778 u16 reg_idx = ring->reg_idx;
2779
Alexander Duyck9e10e042010-08-19 13:40:06 +00002780 /* disable queue to avoid issues while updating state */
2781 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
2782 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx),
2783 rxdctl & ~IXGBE_RXDCTL_ENABLE);
2784 IXGBE_WRITE_FLUSH(hw);
2785
Alexander Duyckacd37172010-08-19 13:36:05 +00002786 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
2787 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
2788 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
2789 ring->count * sizeof(union ixgbe_adv_rx_desc));
2790 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
2791 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
Alexander Duyck84ea2592010-11-16 19:26:49 -08002792 ring->tail = hw->hw_addr + IXGBE_RDT(reg_idx);
Alexander Duyck9e10e042010-08-19 13:40:06 +00002793
2794 ixgbe_configure_srrctl(adapter, ring);
2795 ixgbe_configure_rscctl(adapter, ring);
2796
2797 if (hw->mac.type == ixgbe_mac_82598EB) {
2798 /*
2799 * enable cache line friendly hardware writes:
2800 * PTHRESH=32 descriptors (half the internal cache),
2801 * this also removes ugly rx_no_buffer_count increment
2802 * HTHRESH=4 descriptors (to minimize latency on fetch)
2803 * WTHRESH=8 burst writeback up to two cache lines
2804 */
2805 rxdctl &= ~0x3FFFFF;
2806 rxdctl |= 0x080420;
2807 }
2808
2809 /* enable receive descriptor ring */
2810 rxdctl |= IXGBE_RXDCTL_ENABLE;
2811 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
2812
2813 ixgbe_rx_desc_queue_enable(adapter, ring);
2814 ixgbe_alloc_rx_buffers(adapter, ring, IXGBE_DESC_UNUSED(ring));
Alexander Duyckacd37172010-08-19 13:36:05 +00002815}
2816
Alexander Duyck48654522010-08-19 13:36:27 +00002817static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
2818{
2819 struct ixgbe_hw *hw = &adapter->hw;
2820 int p;
2821
2822 /* PSRTYPE must be initialized in non 82598 adapters */
2823 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
Joe Perchese8e9f692010-09-07 21:34:53 +00002824 IXGBE_PSRTYPE_UDPHDR |
2825 IXGBE_PSRTYPE_IPV4HDR |
Alexander Duyck48654522010-08-19 13:36:27 +00002826 IXGBE_PSRTYPE_L2HDR |
Joe Perchese8e9f692010-09-07 21:34:53 +00002827 IXGBE_PSRTYPE_IPV6HDR;
Alexander Duyck48654522010-08-19 13:36:27 +00002828
2829 if (hw->mac.type == ixgbe_mac_82598EB)
2830 return;
2831
2832 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED)
2833 psrtype |= (adapter->num_rx_queues_per_pool << 29);
2834
2835 for (p = 0; p < adapter->num_rx_pools; p++)
2836 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(adapter->num_vfs + p),
2837 psrtype);
2838}
2839
Alexander Duyckf5b4a522010-08-19 13:38:57 +00002840static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
2841{
2842 struct ixgbe_hw *hw = &adapter->hw;
2843 u32 gcr_ext;
2844 u32 vt_reg_bits;
2845 u32 reg_offset, vf_shift;
2846 u32 vmdctl;
2847
2848 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
2849 return;
2850
2851 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
2852 vt_reg_bits = IXGBE_VMD_CTL_VMDQ_EN | IXGBE_VT_CTL_REPLEN;
2853 vt_reg_bits |= (adapter->num_vfs << IXGBE_VT_CTL_POOL_SHIFT);
2854 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl | vt_reg_bits);
2855
2856 vf_shift = adapter->num_vfs % 32;
2857 reg_offset = (adapter->num_vfs > 32) ? 1 : 0;
2858
2859 /* Enable only the PF's pool for Tx/Rx */
2860 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (1 << vf_shift));
2861 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), 0);
2862 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (1 << vf_shift));
2863 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), 0);
2864 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
2865
2866 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
2867 hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
2868
2869 /*
2870 * Set up VF register offsets for selected VT Mode,
2871 * i.e. 32 or 64 VFs for SR-IOV
2872 */
2873 gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
2874 gcr_ext |= IXGBE_GCR_EXT_MSIX_EN;
2875 gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64;
2876 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
2877
2878 /* enable Tx loopback for VF/PF communication */
2879 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
2880}
2881
Alexander Duyck477de6e2010-08-19 13:38:11 +00002882static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07002883{
Auke Kok9a799d72007-09-15 14:07:45 -07002884 struct ixgbe_hw *hw = &adapter->hw;
2885 struct net_device *netdev = adapter->netdev;
2886 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002887 int rx_buf_len;
Alexander Duyck477de6e2010-08-19 13:38:11 +00002888 struct ixgbe_ring *rx_ring;
2889 int i;
2890 u32 mhadd, hlreg0;
Alexander Duyck48654522010-08-19 13:36:27 +00002891
Auke Kok9a799d72007-09-15 14:07:45 -07002892 /* Decide whether to use packet split mode or not */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00002893 /* Do not use packet split if we're in SR-IOV Mode */
2894 if (!adapter->num_vfs)
2895 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
Auke Kok9a799d72007-09-15 14:07:45 -07002896
2897 /* Set the RX buffer length according to the mode */
2898 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002899 rx_buf_len = IXGBE_RX_HDR_SIZE;
Auke Kok9a799d72007-09-15 14:07:45 -07002900 } else {
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00002901 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
Alexander Duyckf8212f92009-04-27 22:42:37 +00002902 (netdev->mtu <= ETH_DATA_LEN))
Jesse Brandeburg7c6e0a42008-08-26 04:27:16 -07002903 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
Auke Kok9a799d72007-09-15 14:07:45 -07002904 else
Alexander Duyck477de6e2010-08-19 13:38:11 +00002905 rx_buf_len = ALIGN(max_frame + VLAN_HLEN, 1024);
2906 }
2907
2908#ifdef IXGBE_FCOE
2909 /* adjust max frame to be able to do baby jumbo for FCoE */
2910 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
2911 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
2912 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
2913
2914#endif /* IXGBE_FCOE */
2915 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
2916 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
2917 mhadd &= ~IXGBE_MHADD_MFS_MASK;
2918 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
2919
2920 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
Auke Kok9a799d72007-09-15 14:07:45 -07002921 }
2922
Auke Kok9a799d72007-09-15 14:07:45 -07002923 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
Alexander Duyck477de6e2010-08-19 13:38:11 +00002924 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
2925 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
Auke Kok9a799d72007-09-15 14:07:45 -07002926 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
2927
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00002928 /*
2929 * Setup the HW Rx Head and Tail Descriptor Pointers and
2930 * the Base and Length of the Rx Descriptor Ring
2931 */
Auke Kok9a799d72007-09-15 14:07:45 -07002932 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00002933 rx_ring = adapter->rx_ring[i];
Yi Zoua6616b42009-08-06 13:05:23 +00002934 rx_ring->rx_buf_len = rx_buf_len;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002935
Yi Zou6e455b892009-08-06 13:05:44 +00002936 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)
2937 rx_ring->flags |= IXGBE_RING_RX_PS_ENABLED;
Peter P Waskiewicz Jr1b3ff022009-09-14 07:47:27 +00002938 else
2939 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
Jesse Brandeburgcc41ac72008-08-26 04:27:27 -07002940
Yi Zou63f39bd2009-05-17 12:34:35 +00002941#ifdef IXGBE_FCOE
Joe Perchese8e9f692010-09-07 21:34:53 +00002942 if (netdev->features & NETIF_F_FCOE_MTU) {
Yi Zou63f39bd2009-05-17 12:34:35 +00002943 struct ixgbe_ring_feature *f;
2944 f = &adapter->ring_feature[RING_F_FCOE];
Yi Zou6e455b892009-08-06 13:05:44 +00002945 if ((i >= f->mask) && (i < f->mask + f->indices)) {
2946 rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED;
2947 if (rx_buf_len < IXGBE_FCOE_JUMBO_FRAME_SIZE)
2948 rx_ring->rx_buf_len =
Joe Perchese8e9f692010-09-07 21:34:53 +00002949 IXGBE_FCOE_JUMBO_FRAME_SIZE;
Yi Zou6e455b892009-08-06 13:05:44 +00002950 }
Yi Zou63f39bd2009-05-17 12:34:35 +00002951 }
Yi Zou63f39bd2009-05-17 12:34:35 +00002952#endif /* IXGBE_FCOE */
Alexander Duyck477de6e2010-08-19 13:38:11 +00002953 }
2954
2955}
2956
Alexander Duyck73670962010-08-19 13:38:34 +00002957static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
2958{
2959 struct ixgbe_hw *hw = &adapter->hw;
2960 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2961
2962 switch (hw->mac.type) {
2963 case ixgbe_mac_82598EB:
2964 /*
2965 * For VMDq support of different descriptor types or
2966 * buffer sizes through the use of multiple SRRCTL
2967 * registers, RDRXCTL.MVMEN must be set to 1
2968 *
2969 * also, the manual doesn't mention it clearly but DCA hints
2970 * will only use queue 0's tags unless this bit is set. Side
2971 * effects of setting this bit are only that SRRCTL must be
2972 * fully programmed [0..15]
2973 */
2974 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
2975 break;
2976 case ixgbe_mac_82599EB:
2977 /* Disable RSC for ACK packets */
2978 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2979 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2980 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
2981 /* hardware requires some bits to be set by default */
2982 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
2983 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
2984 break;
2985 default:
2986 /* We should do nothing since we don't know this hardware */
2987 return;
2988 }
2989
2990 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2991}
2992
Alexander Duyck477de6e2010-08-19 13:38:11 +00002993/**
2994 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
2995 * @adapter: board private structure
2996 *
2997 * Configure the Rx unit of the MAC after a reset.
2998 **/
2999static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3000{
3001 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck477de6e2010-08-19 13:38:11 +00003002 int i;
3003 u32 rxctrl;
Alexander Duyck477de6e2010-08-19 13:38:11 +00003004
3005 /* disable receives while setting up the descriptors */
3006 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3007 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3008
3009 ixgbe_setup_psrtype(adapter);
Alexander Duyck73670962010-08-19 13:38:34 +00003010 ixgbe_setup_rdrxctl(adapter);
Alexander Duyck477de6e2010-08-19 13:38:11 +00003011
Alexander Duyck9e10e042010-08-19 13:40:06 +00003012 /* Program registers for the distribution of queues */
Alexander Duyckf5b4a522010-08-19 13:38:57 +00003013 ixgbe_setup_mrqc(adapter);
Alexander Duyckf5b4a522010-08-19 13:38:57 +00003014
Alexander Duyck9e10e042010-08-19 13:40:06 +00003015 ixgbe_set_uta(adapter);
3016
Alexander Duyck477de6e2010-08-19 13:38:11 +00003017 /* set_rx_buffer_len must be called before ring initialization */
3018 ixgbe_set_rx_buffer_len(adapter);
3019
3020 /*
3021 * Setup the HW Rx Head and Tail Descriptor Pointers and
3022 * the Base and Length of the Rx Descriptor Ring
3023 */
Alexander Duyck9e10e042010-08-19 13:40:06 +00003024 for (i = 0; i < adapter->num_rx_queues; i++)
3025 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07003026
Alexander Duyck9e10e042010-08-19 13:40:06 +00003027 /* disable drop enable for 82598 parts */
3028 if (hw->mac.type == ixgbe_mac_82598EB)
3029 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3030
3031 /* enable all receives */
3032 rxctrl |= IXGBE_RXCTRL_RXEN;
3033 hw->mac.ops.enable_rx_dma(hw, rxctrl);
Auke Kok9a799d72007-09-15 14:07:45 -07003034}
3035
Auke Kok9a799d72007-09-15 14:07:45 -07003036static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
3037{
3038 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07003039 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose1ada1b12010-01-22 22:45:43 +00003040 int pool_ndx = adapter->num_vfs;
Auke Kok9a799d72007-09-15 14:07:45 -07003041
3042 /* add VID to filter table */
Greg Rose1ada1b12010-01-22 22:45:43 +00003043 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, true);
Jesse Grossf62bbb52010-10-20 13:56:10 +00003044 set_bit(vid, adapter->active_vlans);
Auke Kok9a799d72007-09-15 14:07:45 -07003045}
3046
3047static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
3048{
3049 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07003050 struct ixgbe_hw *hw = &adapter->hw;
Greg Rose1ada1b12010-01-22 22:45:43 +00003051 int pool_ndx = adapter->num_vfs;
Auke Kok9a799d72007-09-15 14:07:45 -07003052
Auke Kok9a799d72007-09-15 14:07:45 -07003053 /* remove VID from filter table */
Greg Rose1ada1b12010-01-22 22:45:43 +00003054 hw->mac.ops.set_vfta(&adapter->hw, vid, pool_ndx, false);
Jesse Grossf62bbb52010-10-20 13:56:10 +00003055 clear_bit(vid, adapter->active_vlans);
Auke Kok9a799d72007-09-15 14:07:45 -07003056}
3057
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003058/**
3059 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3060 * @adapter: driver data
3061 */
3062static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3063{
3064 struct ixgbe_hw *hw = &adapter->hw;
Jesse Grossf62bbb52010-10-20 13:56:10 +00003065 u32 vlnctrl;
3066
3067 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3068 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3069 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3070}
3071
3072/**
3073 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3074 * @adapter: driver data
3075 */
3076static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3077{
3078 struct ixgbe_hw *hw = &adapter->hw;
3079 u32 vlnctrl;
3080
3081 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3082 vlnctrl |= IXGBE_VLNCTRL_VFE;
3083 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3084 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3085}
3086
3087/**
3088 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3089 * @adapter: driver data
3090 */
3091static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3092{
3093 struct ixgbe_hw *hw = &adapter->hw;
3094 u32 vlnctrl;
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003095 int i, j;
3096
3097 switch (hw->mac.type) {
3098 case ixgbe_mac_82598EB:
Jesse Grossf62bbb52010-10-20 13:56:10 +00003099 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3100 vlnctrl &= ~IXGBE_VLNCTRL_VME;
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003101 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3102 break;
3103 case ixgbe_mac_82599EB:
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003104 for (i = 0; i < adapter->num_rx_queues; i++) {
3105 j = adapter->rx_ring[i]->reg_idx;
3106 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3107 vlnctrl &= ~IXGBE_RXDCTL_VME;
3108 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3109 }
3110 break;
3111 default:
3112 break;
3113 }
3114}
3115
3116/**
Jesse Grossf62bbb52010-10-20 13:56:10 +00003117 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003118 * @adapter: driver data
3119 */
Jesse Grossf62bbb52010-10-20 13:56:10 +00003120static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003121{
3122 struct ixgbe_hw *hw = &adapter->hw;
Jesse Grossf62bbb52010-10-20 13:56:10 +00003123 u32 vlnctrl;
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003124 int i, j;
3125
3126 switch (hw->mac.type) {
3127 case ixgbe_mac_82598EB:
Jesse Grossf62bbb52010-10-20 13:56:10 +00003128 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3129 vlnctrl |= IXGBE_VLNCTRL_VME;
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003130 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3131 break;
3132 case ixgbe_mac_82599EB:
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003133 for (i = 0; i < adapter->num_rx_queues; i++) {
3134 j = adapter->rx_ring[i]->reg_idx;
3135 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3136 vlnctrl |= IXGBE_RXDCTL_VME;
3137 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3138 }
3139 break;
3140 default:
3141 break;
3142 }
3143}
3144
Auke Kok9a799d72007-09-15 14:07:45 -07003145static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3146{
Jesse Grossf62bbb52010-10-20 13:56:10 +00003147 u16 vid;
Auke Kok9a799d72007-09-15 14:07:45 -07003148
Jesse Grossf62bbb52010-10-20 13:56:10 +00003149 ixgbe_vlan_rx_add_vid(adapter->netdev, 0);
3150
3151 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3152 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
Auke Kok9a799d72007-09-15 14:07:45 -07003153}
3154
3155/**
Alexander Duyck28500622010-06-15 09:25:48 +00003156 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3157 * @netdev: network interface device structure
3158 *
3159 * Writes unicast address list to the RAR table.
3160 * Returns: -ENOMEM on failure/insufficient address space
3161 * 0 on no addresses written
3162 * X on writing X addresses to the RAR table
3163 **/
3164static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3165{
3166 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3167 struct ixgbe_hw *hw = &adapter->hw;
3168 unsigned int vfn = adapter->num_vfs;
3169 unsigned int rar_entries = hw->mac.num_rar_entries - (vfn + 1);
3170 int count = 0;
3171
3172 /* return ENOMEM indicating insufficient memory for addresses */
3173 if (netdev_uc_count(netdev) > rar_entries)
3174 return -ENOMEM;
3175
3176 if (!netdev_uc_empty(netdev) && rar_entries) {
3177 struct netdev_hw_addr *ha;
3178 /* return error if we do not support writing to RAR table */
3179 if (!hw->mac.ops.set_rar)
3180 return -ENOMEM;
3181
3182 netdev_for_each_uc_addr(ha, netdev) {
3183 if (!rar_entries)
3184 break;
3185 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3186 vfn, IXGBE_RAH_AV);
3187 count++;
3188 }
3189 }
3190 /* write the addresses in reverse order to avoid write combining */
3191 for (; rar_entries > 0 ; rar_entries--)
3192 hw->mac.ops.clear_rar(hw, rar_entries);
3193
3194 return count;
3195}
3196
3197/**
Christopher Leech2c5645c2008-08-26 04:27:02 -07003198 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
Auke Kok9a799d72007-09-15 14:07:45 -07003199 * @netdev: network interface device structure
3200 *
Christopher Leech2c5645c2008-08-26 04:27:02 -07003201 * The set_rx_method entry point is called whenever the unicast/multicast
3202 * address list or the network interface flags are updated. This routine is
3203 * responsible for configuring the hardware for proper unicast, multicast and
3204 * promiscuous mode.
Auke Kok9a799d72007-09-15 14:07:45 -07003205 **/
Greg Rose7f870472010-01-09 02:25:29 +00003206void ixgbe_set_rx_mode(struct net_device *netdev)
Auke Kok9a799d72007-09-15 14:07:45 -07003207{
3208 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3209 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyck28500622010-06-15 09:25:48 +00003210 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3211 int count;
Auke Kok9a799d72007-09-15 14:07:45 -07003212
3213 /* Check for Promiscuous and All Multicast modes */
3214
3215 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3216
Alexander Duyckf5dc4422010-08-19 13:36:49 +00003217 /* set all bits that we expect to always be set */
3218 fctrl |= IXGBE_FCTRL_BAM;
3219 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3220 fctrl |= IXGBE_FCTRL_PMCF;
3221
Alexander Duyck28500622010-06-15 09:25:48 +00003222 /* clear the bits we are changing the status of */
3223 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3224
Auke Kok9a799d72007-09-15 14:07:45 -07003225 if (netdev->flags & IFF_PROMISC) {
Emil Tantilove433ea12010-05-13 17:33:00 +00003226 hw->addr_ctrl.user_set_promisc = true;
Auke Kok9a799d72007-09-15 14:07:45 -07003227 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
Alexander Duyck28500622010-06-15 09:25:48 +00003228 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003229 /* don't hardware filter vlans in promisc mode */
3230 ixgbe_vlan_filter_disable(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003231 } else {
Patrick McHardy746b9f02008-07-16 20:15:45 -07003232 if (netdev->flags & IFF_ALLMULTI) {
3233 fctrl |= IXGBE_FCTRL_MPE;
Alexander Duyck28500622010-06-15 09:25:48 +00003234 vmolr |= IXGBE_VMOLR_MPE;
3235 } else {
3236 /*
3237 * Write addresses to the MTA, if the attempt fails
3238 * then we should just turn on promiscous mode so
3239 * that we can at least receive multicast traffic
3240 */
3241 hw->mac.ops.update_mc_addr_list(hw, netdev);
3242 vmolr |= IXGBE_VMOLR_ROMPE;
Patrick McHardy746b9f02008-07-16 20:15:45 -07003243 }
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003244 ixgbe_vlan_filter_enable(adapter);
Emil Tantilove433ea12010-05-13 17:33:00 +00003245 hw->addr_ctrl.user_set_promisc = false;
Alexander Duyck28500622010-06-15 09:25:48 +00003246 /*
3247 * Write addresses to available RAR registers, if there is not
3248 * sufficient space to store all the addresses then enable
3249 * unicast promiscous mode
3250 */
3251 count = ixgbe_write_uc_addr_list(netdev);
3252 if (count < 0) {
3253 fctrl |= IXGBE_FCTRL_UPE;
3254 vmolr |= IXGBE_VMOLR_ROPE;
3255 }
3256 }
3257
3258 if (adapter->num_vfs) {
3259 ixgbe_restore_vf_multicasts(adapter);
3260 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
3261 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3262 IXGBE_VMOLR_ROPE);
3263 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
Auke Kok9a799d72007-09-15 14:07:45 -07003264 }
3265
3266 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
Jesse Grossf62bbb52010-10-20 13:56:10 +00003267
3268 if (netdev->features & NETIF_F_HW_VLAN_RX)
3269 ixgbe_vlan_strip_enable(adapter);
3270 else
3271 ixgbe_vlan_strip_disable(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003272}
3273
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003274static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3275{
3276 int q_idx;
3277 struct ixgbe_q_vector *q_vector;
3278 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3279
3280 /* legacy and MSI only use one vector */
3281 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3282 q_vectors = 1;
3283
3284 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Jesse Brandeburgf0848272008-09-11 19:59:42 -07003285 struct napi_struct *napi;
Alexander Duyck7a921c92009-05-06 10:43:28 +00003286 q_vector = adapter->q_vector[q_idx];
Jesse Brandeburgf0848272008-09-11 19:59:42 -07003287 napi = &q_vector->napi;
Alexander Duyck91281fd2009-06-04 16:00:27 +00003288 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3289 if (!q_vector->rxr_count || !q_vector->txr_count) {
3290 if (q_vector->txr_count == 1)
3291 napi->poll = &ixgbe_clean_txonly;
3292 else if (q_vector->rxr_count == 1)
3293 napi->poll = &ixgbe_clean_rxonly;
3294 }
3295 }
Jesse Brandeburgf0848272008-09-11 19:59:42 -07003296
3297 napi_enable(napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003298 }
3299}
3300
3301static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3302{
3303 int q_idx;
3304 struct ixgbe_q_vector *q_vector;
3305 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
3306
3307 /* legacy and MSI only use one vector */
3308 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED))
3309 q_vectors = 1;
3310
3311 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
Alexander Duyck7a921c92009-05-06 10:43:28 +00003312 q_vector = adapter->q_vector[q_idx];
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003313 napi_disable(&q_vector->napi);
3314 }
3315}
3316
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08003317#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08003318/*
3319 * ixgbe_configure_dcb - Configure DCB hardware
3320 * @adapter: ixgbe adapter struct
3321 *
3322 * This is called by the driver on open to configure the DCB hardware.
3323 * This is also called by the gennetlink interface when reconfiguring
3324 * the DCB state.
3325 */
3326static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
3327{
3328 struct ixgbe_hw *hw = &adapter->hw;
John Fastabend98063072010-10-28 00:59:57 +00003329 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003330 u32 txdctl;
Alexander Duyck2f90b862008-11-20 20:52:10 -08003331 int i, j;
3332
Alexander Duyck67ebd792010-08-19 13:34:04 +00003333 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
3334 if (hw->mac.type == ixgbe_mac_82598EB)
3335 netif_set_gso_max_size(adapter->netdev, 65536);
3336 return;
3337 }
3338
3339 if (hw->mac.type == ixgbe_mac_82598EB)
3340 netif_set_gso_max_size(adapter->netdev, 32768);
3341
John Fastabend98063072010-10-28 00:59:57 +00003342#ifdef CONFIG_FCOE
3343 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
3344 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
3345#endif
3346
John Fastabend80ab1932010-11-16 19:26:45 -08003347 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
John Fastabend98063072010-10-28 00:59:57 +00003348 DCB_TX_CONFIG);
John Fastabend80ab1932010-11-16 19:26:45 -08003349 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
John Fastabend98063072010-10-28 00:59:57 +00003350 DCB_RX_CONFIG);
Alexander Duyck2f90b862008-11-20 20:52:10 -08003351
3352 /* reconfigure the hardware */
3353 ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
3354
3355 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003356 j = adapter->tx_ring[i]->reg_idx;
Alexander Duyck2f90b862008-11-20 20:52:10 -08003357 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3358 /* PThresh workaround for Tx hang with DFP enabled. */
3359 txdctl |= 32;
3360 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
3361 }
3362 /* Enable VLAN tag insert/strip */
Jesse Grossf62bbb52010-10-20 13:56:10 +00003363 adapter->netdev->features |= NETIF_F_HW_VLAN_RX;
Jesse Brandeburg5f6c0182010-04-14 16:04:23 -07003364
Alexander Duyck2f90b862008-11-20 20:52:10 -08003365 hw->mac.ops.set_vfta(&adapter->hw, 0, 0, true);
3366}
3367
3368#endif
Auke Kok9a799d72007-09-15 14:07:45 -07003369static void ixgbe_configure(struct ixgbe_adapter *adapter)
3370{
3371 struct net_device *netdev = adapter->netdev;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003372 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07003373 int i;
3374
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08003375#ifdef CONFIG_IXGBE_DCB
Alexander Duyck67ebd792010-08-19 13:34:04 +00003376 ixgbe_configure_dcb(adapter);
Alexander Duyck2f90b862008-11-20 20:52:10 -08003377#endif
Auke Kok9a799d72007-09-15 14:07:45 -07003378
Jesse Grossf62bbb52010-10-20 13:56:10 +00003379 ixgbe_set_rx_mode(netdev);
3380 ixgbe_restore_vlan(adapter);
3381
Yi Zoueacd73f2009-05-13 13:11:06 +00003382#ifdef IXGBE_FCOE
3383 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
3384 ixgbe_configure_fcoe(adapter);
3385
3386#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003387 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3388 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003389 adapter->tx_ring[i]->atr_sample_rate =
Joe Perchese8e9f692010-09-07 21:34:53 +00003390 adapter->atr_sample_rate;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003391 ixgbe_init_fdir_signature_82599(hw, adapter->fdir_pballoc);
3392 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
3393 ixgbe_init_fdir_perfect_82599(hw, adapter->fdir_pballoc);
3394 }
Alexander Duyck933d41f2010-09-07 21:34:29 +00003395 ixgbe_configure_virtualization(adapter);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003396
Auke Kok9a799d72007-09-15 14:07:45 -07003397 ixgbe_configure_tx(adapter);
3398 ixgbe_configure_rx(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003399}
3400
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003401static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
3402{
3403 switch (hw->phy.type) {
3404 case ixgbe_phy_sfp_avago:
3405 case ixgbe_phy_sfp_ftl:
3406 case ixgbe_phy_sfp_intel:
3407 case ixgbe_phy_sfp_unknown:
Don Skidmoreea0a04d2010-05-18 16:00:13 +00003408 case ixgbe_phy_sfp_passive_tyco:
3409 case ixgbe_phy_sfp_passive_unknown:
3410 case ixgbe_phy_sfp_active_unknown:
3411 case ixgbe_phy_sfp_ftl_active:
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003412 return true;
3413 default:
3414 return false;
3415 }
3416}
3417
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003418/**
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003419 * ixgbe_sfp_link_config - set up SFP+ link
3420 * @adapter: pointer to private adapter struct
3421 **/
3422static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
3423{
3424 struct ixgbe_hw *hw = &adapter->hw;
3425
3426 if (hw->phy.multispeed_fiber) {
3427 /*
3428 * In multispeed fiber setups, the device may not have
3429 * had a physical connection when the driver loaded.
3430 * If that's the case, the initial link configuration
3431 * couldn't get the MAC into 10G or 1G mode, so we'll
3432 * never have a link status change interrupt fire.
3433 * We need to try and force an autonegotiation
3434 * session, then bring up link.
3435 */
3436 hw->mac.ops.setup_sfp(hw);
3437 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
3438 schedule_work(&adapter->multispeed_fiber_task);
3439 } else {
3440 /*
3441 * Direct Attach Cu and non-multispeed fiber modules
3442 * still need to be configured properly prior to
3443 * attempting link.
3444 */
3445 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_MOD_TASK))
3446 schedule_work(&adapter->sfp_config_module_task);
3447 }
3448}
3449
3450/**
3451 * ixgbe_non_sfp_link_config - set up non-SFP+ link
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003452 * @hw: pointer to private hardware struct
3453 *
3454 * Returns 0 on success, negative on failure
3455 **/
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003456static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003457{
3458 u32 autoneg;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00003459 bool negotiation, link_up = false;
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003460 u32 ret = IXGBE_ERR_LINK_SETUP;
3461
3462 if (hw->mac.ops.check_link)
3463 ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false);
3464
3465 if (ret)
3466 goto link_cfg_out;
3467
3468 if (hw->mac.ops.get_link_capabilities)
Joe Perchese8e9f692010-09-07 21:34:53 +00003469 ret = hw->mac.ops.get_link_capabilities(hw, &autoneg,
3470 &negotiation);
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003471 if (ret)
3472 goto link_cfg_out;
3473
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00003474 if (hw->mac.ops.setup_link)
3475 ret = hw->mac.ops.setup_link(hw, autoneg, negotiation, link_up);
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003476link_cfg_out:
3477 return ret;
3478}
3479
Alexander Duycka34bcff2010-08-19 13:39:20 +00003480static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07003481{
Auke Kok9a799d72007-09-15 14:07:45 -07003482 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duycka34bcff2010-08-19 13:39:20 +00003483 u32 gpie = 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003484
Jesse Brandeburg9b471442009-12-03 11:33:54 +00003485 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
Alexander Duycka34bcff2010-08-19 13:39:20 +00003486 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
3487 IXGBE_GPIE_OCD;
3488 gpie |= IXGBE_GPIE_EIAME;
Jesse Brandeburg9b471442009-12-03 11:33:54 +00003489 /*
3490 * use EIAM to auto-mask when MSI-X interrupt is asserted
3491 * this saves a register write for every interrupt
3492 */
3493 switch (hw->mac.type) {
3494 case ixgbe_mac_82598EB:
3495 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
3496 break;
3497 default:
3498 case ixgbe_mac_82599EB:
3499 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3500 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3501 break;
3502 }
3503 } else {
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003504 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3505 * specifically only auto mask tx and rx interrupts */
3506 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
Auke Kok9a799d72007-09-15 14:07:45 -07003507 }
3508
Alexander Duycka34bcff2010-08-19 13:39:20 +00003509 /* XXX: to interrupt immediately for EICS writes, enable this */
3510 /* gpie |= IXGBE_GPIE_EIMEN; */
3511
3512 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3513 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
3514 gpie |= IXGBE_GPIE_VTMODE_64;
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07003515 }
3516
Alexander Duycka34bcff2010-08-19 13:39:20 +00003517 /* Enable fan failure interrupt */
3518 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07003519 gpie |= IXGBE_SDP1_GPIEN;
Jesse Brandeburg0befdb32008-10-31 00:46:40 -07003520
Alexander Duycka34bcff2010-08-19 13:39:20 +00003521 if (hw->mac.type == ixgbe_mac_82599EB)
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003522 gpie |= IXGBE_SDP1_GPIEN;
3523 gpie |= IXGBE_SDP2_GPIEN;
Alexander Duycka34bcff2010-08-19 13:39:20 +00003524
3525 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
3526}
3527
3528static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
3529{
3530 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duycka34bcff2010-08-19 13:39:20 +00003531 int err;
Alexander Duycka34bcff2010-08-19 13:39:20 +00003532 u32 ctrl_ext;
3533
3534 ixgbe_get_hw_control(adapter);
3535 ixgbe_setup_gpie(adapter);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003536
Auke Kok9a799d72007-09-15 14:07:45 -07003537 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
3538 ixgbe_configure_msix(adapter);
3539 else
3540 ixgbe_configure_msi_and_legacy(adapter);
3541
Peter Waskiewicz61fac742010-04-27 00:38:15 +00003542 /* enable the optics */
3543 if (hw->phy.multispeed_fiber)
3544 hw->mac.ops.enable_tx_laser(hw);
3545
Auke Kok9a799d72007-09-15 14:07:45 -07003546 clear_bit(__IXGBE_DOWN, &adapter->state);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003547 ixgbe_napi_enable_all(adapter);
3548
3549 /* clear any pending interrupts, may auto mask */
3550 IXGBE_READ_REG(hw, IXGBE_EICR);
Emil Tantilov6af3b9e2010-09-29 21:35:23 +00003551 ixgbe_irq_enable(adapter, true, true);
Auke Kok9a799d72007-09-15 14:07:45 -07003552
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003553 /*
Don Skidmorebf069c92009-05-07 10:39:54 +00003554 * If this adapter has a fan, check to see if we had a failure
3555 * before we enabled the interrupt.
3556 */
3557 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
3558 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
3559 if (esdp & IXGBE_ESDP_SDP1)
Emil Tantilov396e7992010-07-01 20:05:12 +00003560 e_crit(drv, "Fan has stopped, replace the adapter\n");
Don Skidmorebf069c92009-05-07 10:39:54 +00003561 }
3562
3563 /*
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003564 * For hot-pluggable SFP+ devices, a new SFP+ module may have
Don Skidmore19343de2009-07-02 12:50:31 +00003565 * arrived before interrupts were enabled but after probe. Such
3566 * devices wouldn't have their type identified yet. We need to
3567 * kick off the SFP+ module setup first, then try to bring up link.
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003568 * If we're not hot-pluggable SFP+, we just need to configure link
3569 * and bring it up.
3570 */
Don Skidmore19343de2009-07-02 12:50:31 +00003571 if (hw->phy.type == ixgbe_phy_unknown) {
3572 err = hw->phy.ops.identify(hw);
3573 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Don Skidmore5da43c12009-07-02 12:50:52 +00003574 /*
3575 * Take the device down and schedule the sfp tasklet
3576 * which will unregister_netdev and log it.
3577 */
Don Skidmore19343de2009-07-02 12:50:31 +00003578 ixgbe_down(adapter);
Don Skidmore5da43c12009-07-02 12:50:52 +00003579 schedule_work(&adapter->sfp_config_module_task);
Don Skidmore19343de2009-07-02 12:50:31 +00003580 return err;
3581 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003582 }
3583
3584 if (ixgbe_is_sfp(hw)) {
3585 ixgbe_sfp_link_config(adapter);
3586 } else {
3587 err = ixgbe_non_sfp_link_config(hw);
3588 if (err)
Emil Tantilov396e7992010-07-01 20:05:12 +00003589 e_err(probe, "link_config FAILED %d\n", err);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00003590 }
Peter P Waskiewicz Jr0ecc0612009-02-06 21:46:54 -08003591
Peter P Waskiewicz Jr1da100b2009-01-19 16:55:03 -08003592 /* enable transmits */
Alexander Duyck477de6e2010-08-19 13:38:11 +00003593 netif_tx_start_all_queues(adapter->netdev);
Peter P Waskiewicz Jr1da100b2009-01-19 16:55:03 -08003594
Auke Kok9a799d72007-09-15 14:07:45 -07003595 /* bring the link up in the watchdog, this could race with our first
3596 * link up interrupt but shouldn't be a problem */
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07003597 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
3598 adapter->link_check_timeout = jiffies;
Auke Kok9a799d72007-09-15 14:07:45 -07003599 mod_timer(&adapter->watchdog_timer, jiffies);
Greg Rosec9205692010-01-22 22:46:22 +00003600
3601 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
3602 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
3603 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
3604 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
3605
Auke Kok9a799d72007-09-15 14:07:45 -07003606 return 0;
3607}
3608
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003609void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
3610{
3611 WARN_ON(in_interrupt());
3612 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
3613 msleep(1);
3614 ixgbe_down(adapter);
Greg Rose5809a1a2010-03-24 09:36:08 +00003615 /*
3616 * If SR-IOV enabled then wait a bit before bringing the adapter
3617 * back up to give the VFs time to respond to the reset. The
3618 * two second wait is based upon the watchdog timer cycle in
3619 * the VF driver.
3620 */
3621 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3622 msleep(2000);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003623 ixgbe_up(adapter);
3624 clear_bit(__IXGBE_RESETTING, &adapter->state);
3625}
3626
Auke Kok9a799d72007-09-15 14:07:45 -07003627int ixgbe_up(struct ixgbe_adapter *adapter)
3628{
3629 /* hardware has been reset, we need to reload some things */
3630 ixgbe_configure(adapter);
3631
3632 return ixgbe_up_complete(adapter);
3633}
3634
3635void ixgbe_reset(struct ixgbe_adapter *adapter)
3636{
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07003637 struct ixgbe_hw *hw = &adapter->hw;
Don Skidmore8ca783a2009-05-26 20:40:47 -07003638 int err;
3639
3640 err = hw->mac.ops.init_hw(hw);
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003641 switch (err) {
3642 case 0:
3643 case IXGBE_ERR_SFP_NOT_PRESENT:
3644 break;
3645 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
Emil Tantilov849c4542010-06-03 16:53:41 +00003646 e_dev_err("master disable timed out\n");
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003647 break;
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00003648 case IXGBE_ERR_EEPROM_VERSION:
3649 /* We are running on a pre-production device, log a warning */
Emil Tantilov849c4542010-06-03 16:53:41 +00003650 e_dev_warn("This device is a pre-production adapter/LOM. "
3651 "Please be aware there may be issuesassociated with "
3652 "your hardware. If you are experiencing problems "
3653 "please contact your Intel or hardware "
3654 "representative who provided you with this "
3655 "hardware.\n");
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00003656 break;
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003657 default:
Emil Tantilov849c4542010-06-03 16:53:41 +00003658 e_dev_err("Hardware Error: %d\n", err);
Peter P Waskiewicz Jrda4dd0f2009-06-04 11:10:35 +00003659 }
Auke Kok9a799d72007-09-15 14:07:45 -07003660
3661 /* reprogram the RAR[0] in case user changed it. */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00003662 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
3663 IXGBE_RAH_AV);
Auke Kok9a799d72007-09-15 14:07:45 -07003664}
3665
Auke Kok9a799d72007-09-15 14:07:45 -07003666/**
3667 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
3668 * @adapter: board private structure
3669 * @rx_ring: ring to free buffers from
3670 **/
3671static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00003672 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07003673{
3674 struct pci_dev *pdev = adapter->pdev;
3675 unsigned long size;
3676 unsigned int i;
3677
Alexander Duyck84418e32010-08-19 13:40:54 +00003678 /* ring already cleared, nothing to do */
3679 if (!rx_ring->rx_buffer_info)
3680 return;
Auke Kok9a799d72007-09-15 14:07:45 -07003681
Alexander Duyck84418e32010-08-19 13:40:54 +00003682 /* Free all the Rx ring sk_buffs */
Auke Kok9a799d72007-09-15 14:07:45 -07003683 for (i = 0; i < rx_ring->count; i++) {
3684 struct ixgbe_rx_buffer *rx_buffer_info;
3685
3686 rx_buffer_info = &rx_ring->rx_buffer_info[i];
3687 if (rx_buffer_info->dma) {
Nick Nunley1b507732010-04-27 13:10:27 +00003688 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
Joe Perchese8e9f692010-09-07 21:34:53 +00003689 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00003690 DMA_FROM_DEVICE);
Auke Kok9a799d72007-09-15 14:07:45 -07003691 rx_buffer_info->dma = 0;
3692 }
3693 if (rx_buffer_info->skb) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00003694 struct sk_buff *skb = rx_buffer_info->skb;
Auke Kok9a799d72007-09-15 14:07:45 -07003695 rx_buffer_info->skb = NULL;
Alexander Duyckf8212f92009-04-27 22:42:37 +00003696 do {
3697 struct sk_buff *this = skb;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00003698 if (IXGBE_RSC_CB(this)->delay_unmap) {
Nick Nunley1b507732010-04-27 13:10:27 +00003699 dma_unmap_single(&pdev->dev,
3700 IXGBE_RSC_CB(this)->dma,
Joe Perchese8e9f692010-09-07 21:34:53 +00003701 rx_ring->rx_buf_len,
Nick Nunley1b507732010-04-27 13:10:27 +00003702 DMA_FROM_DEVICE);
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00003703 IXGBE_RSC_CB(this)->dma = 0;
Mallikarjuna R Chilakalae8171aa2010-05-13 17:33:21 +00003704 IXGBE_RSC_CB(skb)->delay_unmap = false;
Mallikarjuna R Chilakalafd3686a2010-03-19 04:41:33 +00003705 }
Alexander Duyckf8212f92009-04-27 22:42:37 +00003706 skb = skb->prev;
3707 dev_kfree_skb(this);
3708 } while (skb);
Auke Kok9a799d72007-09-15 14:07:45 -07003709 }
3710 if (!rx_buffer_info->page)
3711 continue;
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00003712 if (rx_buffer_info->page_dma) {
Nick Nunley1b507732010-04-27 13:10:27 +00003713 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
3714 PAGE_SIZE / 2, DMA_FROM_DEVICE);
Jesse Brandeburg4f57ca62009-06-30 11:44:56 +00003715 rx_buffer_info->page_dma = 0;
3716 }
Auke Kok9a799d72007-09-15 14:07:45 -07003717 put_page(rx_buffer_info->page);
3718 rx_buffer_info->page = NULL;
Jesse Brandeburg762f4c52008-09-11 19:58:43 -07003719 rx_buffer_info->page_offset = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003720 }
3721
3722 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
3723 memset(rx_ring->rx_buffer_info, 0, size);
3724
3725 /* Zero out the descriptor ring */
3726 memset(rx_ring->desc, 0, rx_ring->size);
3727
3728 rx_ring->next_to_clean = 0;
3729 rx_ring->next_to_use = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003730}
3731
3732/**
3733 * ixgbe_clean_tx_ring - Free Tx Buffers
3734 * @adapter: board private structure
3735 * @tx_ring: ring to be cleaned
3736 **/
3737static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00003738 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07003739{
3740 struct ixgbe_tx_buffer *tx_buffer_info;
3741 unsigned long size;
3742 unsigned int i;
3743
Alexander Duyck84418e32010-08-19 13:40:54 +00003744 /* ring already cleared, nothing to do */
3745 if (!tx_ring->tx_buffer_info)
3746 return;
Auke Kok9a799d72007-09-15 14:07:45 -07003747
Alexander Duyck84418e32010-08-19 13:40:54 +00003748 /* Free all the Tx ring sk_buffs */
Auke Kok9a799d72007-09-15 14:07:45 -07003749 for (i = 0; i < tx_ring->count; i++) {
3750 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3751 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3752 }
3753
3754 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
3755 memset(tx_ring->tx_buffer_info, 0, size);
3756
3757 /* Zero out the descriptor ring */
3758 memset(tx_ring->desc, 0, tx_ring->size);
3759
3760 tx_ring->next_to_use = 0;
3761 tx_ring->next_to_clean = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003762}
3763
3764/**
Auke Kok9a799d72007-09-15 14:07:45 -07003765 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
3766 * @adapter: board private structure
3767 **/
3768static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
3769{
3770 int i;
3771
3772 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003773 ixgbe_clean_rx_ring(adapter, adapter->rx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07003774}
3775
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003776/**
3777 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
3778 * @adapter: board private structure
3779 **/
3780static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
3781{
3782 int i;
3783
3784 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003785 ixgbe_clean_tx_ring(adapter, adapter->tx_ring[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003786}
3787
Auke Kok9a799d72007-09-15 14:07:45 -07003788void ixgbe_down(struct ixgbe_adapter *adapter)
3789{
3790 struct net_device *netdev = adapter->netdev;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003791 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07003792 u32 rxctrl;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003793 u32 txdctl;
3794 int i, j;
Peter Waskiewiczb25ebfd2010-10-05 01:27:49 +00003795 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Auke Kok9a799d72007-09-15 14:07:45 -07003796
3797 /* signal that we are down to the interrupt handler */
3798 set_bit(__IXGBE_DOWN, &adapter->state);
3799
Greg Rose767081a2010-01-22 22:46:40 +00003800 /* disable receive for all VFs and wait one second */
3801 if (adapter->num_vfs) {
Greg Rose767081a2010-01-22 22:46:40 +00003802 /* ping all the active vfs to let them know we are going down */
3803 ixgbe_ping_all_vfs(adapter);
Greg Rose581d1aa2010-03-24 09:36:27 +00003804
Greg Rose767081a2010-01-22 22:46:40 +00003805 /* Disable all VFTE/VFRE TX/RX */
3806 ixgbe_disable_tx_rx(adapter);
Greg Rose581d1aa2010-03-24 09:36:27 +00003807
3808 /* Mark all the VFs as inactive */
3809 for (i = 0 ; i < adapter->num_vfs; i++)
3810 adapter->vfinfo[i].clear_to_send = 0;
Greg Rose767081a2010-01-22 22:46:40 +00003811 }
3812
Auke Kok9a799d72007-09-15 14:07:45 -07003813 /* disable receives */
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003814 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3815 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
Auke Kok9a799d72007-09-15 14:07:45 -07003816
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003817 IXGBE_WRITE_FLUSH(hw);
Auke Kok9a799d72007-09-15 14:07:45 -07003818 msleep(10);
3819
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003820 netif_tx_stop_all_queues(netdev);
3821
Don Skidmore0a1f87c2009-09-18 09:45:43 +00003822 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
3823 del_timer_sync(&adapter->sfp_timer);
Auke Kok9a799d72007-09-15 14:07:45 -07003824 del_timer_sync(&adapter->watchdog_timer);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07003825 cancel_work_sync(&adapter->watchdog_task);
Auke Kok9a799d72007-09-15 14:07:45 -07003826
John Fastabendc0dfb902010-04-27 02:13:39 +00003827 netif_carrier_off(netdev);
3828 netif_tx_disable(netdev);
3829
3830 ixgbe_irq_disable(adapter);
3831
3832 ixgbe_napi_disable_all(adapter);
3833
Peter Waskiewiczb25ebfd2010-10-05 01:27:49 +00003834 /* Cleanup the affinity_hint CPU mask memory and callback */
3835 for (i = 0; i < num_q_vectors; i++) {
3836 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
3837 /* clear the affinity_mask in the IRQ descriptor */
3838 irq_set_affinity_hint(adapter->msix_entries[i]. vector, NULL);
3839 /* release the CPU mask memory */
3840 free_cpumask_var(q_vector->affinity_mask);
3841 }
3842
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003843 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
3844 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
3845 cancel_work_sync(&adapter->fdir_reinit_task);
3846
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07003847 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
3848 cancel_work_sync(&adapter->check_overtemp_task);
3849
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003850 /* disable transmits in the hardware now that interrupts are off */
3851 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003852 j = adapter->tx_ring[i]->reg_idx;
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003853 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
3854 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j),
Joe Perchese8e9f692010-09-07 21:34:53 +00003855 (txdctl & ~IXGBE_TXDCTL_ENABLE));
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003856 }
PJ Waskiewicz88512532009-03-13 22:15:10 +00003857 /* Disable the Tx DMA engine on 82599 */
3858 if (hw->mac.type == ixgbe_mac_82599EB)
3859 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
Joe Perchese8e9f692010-09-07 21:34:53 +00003860 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
3861 ~IXGBE_DMATXCTL_TE));
Jesse Brandeburg7f821872008-09-11 20:00:16 -07003862
John Fastabend9f756f02010-06-29 18:28:36 +00003863 /* power down the optics */
3864 if (hw->phy.multispeed_fiber)
3865 hw->mac.ops.disable_tx_laser(hw);
3866
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00003867 /* clear n-tuple filters that are cached */
3868 ethtool_ntuple_flush(netdev);
3869
Paul Larson6f4a0e42008-06-24 17:00:56 -07003870 if (!pci_channel_offline(adapter->pdev))
3871 ixgbe_reset(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003872 ixgbe_clean_all_tx_rings(adapter);
3873 ixgbe_clean_all_rx_rings(adapter);
3874
Jeff Garzik5dd2d332008-10-16 05:09:31 -04003875#ifdef CONFIG_IXGBE_DCA
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -07003876 /* since we reset the hardware DCA settings were cleared */
Alexander Duycke35ec122009-05-21 13:07:12 +00003877 ixgbe_setup_dca(adapter);
Jesse Brandeburg96b0e0f2008-08-26 04:27:21 -07003878#endif
Auke Kok9a799d72007-09-15 14:07:45 -07003879}
3880
Auke Kok9a799d72007-09-15 14:07:45 -07003881/**
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003882 * ixgbe_poll - NAPI Rx polling callback
3883 * @napi: structure for representing this polling device
3884 * @budget: how many packets driver is allowed to clean
3885 *
3886 * This function is used for legacy and MSI, NAPI mode
Auke Kok9a799d72007-09-15 14:07:45 -07003887 **/
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003888static int ixgbe_poll(struct napi_struct *napi, int budget)
Auke Kok9a799d72007-09-15 14:07:45 -07003889{
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003890 struct ixgbe_q_vector *q_vector =
Joe Perchese8e9f692010-09-07 21:34:53 +00003891 container_of(napi, struct ixgbe_q_vector, napi);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08003892 struct ixgbe_adapter *adapter = q_vector->adapter;
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003893 int tx_clean_complete, work_done = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07003894
Jeff Garzik5dd2d332008-10-16 05:09:31 -04003895#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08003896 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003897 ixgbe_update_tx_dca(adapter, adapter->tx_ring[0]);
3898 ixgbe_update_rx_dca(adapter, adapter->rx_ring[0]);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08003899 }
3900#endif
3901
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00003902 tx_clean_complete = ixgbe_clean_tx_irq(q_vector, adapter->tx_ring[0]);
3903 ixgbe_clean_rx_irq(q_vector, adapter->rx_ring[0], &work_done, budget);
Auke Kok9a799d72007-09-15 14:07:45 -07003904
Jesse Brandeburg9a1a69ad2009-03-13 22:14:10 +00003905 if (!tx_clean_complete)
David S. Millerd2c7ddd2008-01-15 22:43:24 -08003906 work_done = budget;
3907
David S. Miller53e52c72008-01-07 21:06:12 -08003908 /* If budget not fully consumed, exit the polling mode */
3909 if (work_done < budget) {
Ben Hutchings288379f2009-01-19 16:43:59 -08003910 napi_complete(napi);
Nelson, Shannonf7554a22009-09-18 09:46:06 +00003911 if (adapter->rx_itr_setting & 1)
Ayyappan Veeraiyanf494e8f2008-03-03 15:03:57 -08003912 ixgbe_set_itr(adapter);
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003913 if (!test_bit(__IXGBE_DOWN, &adapter->state))
Nelson, Shannon835462f2009-04-27 22:42:54 +00003914 ixgbe_irq_enable_queues(adapter, IXGBE_EIMS_RTX_QUEUE);
Auke Kok9a799d72007-09-15 14:07:45 -07003915 }
Auke Kok9a799d72007-09-15 14:07:45 -07003916 return work_done;
3917}
3918
3919/**
3920 * ixgbe_tx_timeout - Respond to a Tx Hang
3921 * @netdev: network interface device structure
3922 **/
3923static void ixgbe_tx_timeout(struct net_device *netdev)
3924{
3925 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3926
3927 /* Do the reset outside of interrupt context */
3928 schedule_work(&adapter->reset_task);
3929}
3930
3931static void ixgbe_reset_task(struct work_struct *work)
3932{
3933 struct ixgbe_adapter *adapter;
3934 adapter = container_of(work, struct ixgbe_adapter, reset_task);
3935
Alexander Duyck2f90b862008-11-20 20:52:10 -08003936 /* If we're already down or resetting, just bail */
3937 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
3938 test_bit(__IXGBE_RESETTING, &adapter->state))
3939 return;
3940
Auke Kok9a799d72007-09-15 14:07:45 -07003941 adapter->tx_timeout_count++;
3942
Taku Izumidcd79ae2010-04-27 14:39:53 +00003943 ixgbe_dump(adapter);
3944 netdev_err(adapter->netdev, "Reset adapter\n");
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08003945 ixgbe_reinit_locked(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07003946}
3947
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003948#ifdef CONFIG_IXGBE_DCB
3949static inline bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003950{
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003951 bool ret = false;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003952 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_DCB];
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003953
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003954 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
3955 return ret;
3956
3957 f->mask = 0x7 << 3;
3958 adapter->num_rx_queues = f->indices;
3959 adapter->num_tx_queues = f->indices;
3960 ret = true;
Jesse Brandeburgb9804972008-09-11 20:00:29 -07003961
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003962 return ret;
3963}
3964#endif
3965
Jesse Brandeburg4df10462009-03-13 22:15:31 +00003966/**
3967 * ixgbe_set_rss_queues: Allocate queues for RSS
3968 * @adapter: board private structure to initialize
3969 *
3970 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
3971 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
3972 *
3973 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003974static inline bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
3975{
3976 bool ret = false;
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003977 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_RSS];
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003978
3979 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Jesse Brandeburg0cefafa2009-05-19 09:19:11 +00003980 f->mask = 0xF;
3981 adapter->num_rx_queues = f->indices;
3982 adapter->num_tx_queues = f->indices;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003983 ret = true;
3984 } else {
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08003985 ret = false;
3986 }
3987
3988 return ret;
3989}
3990
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00003991/**
3992 * ixgbe_set_fdir_queues: Allocate queues for Flow Director
3993 * @adapter: board private structure to initialize
3994 *
3995 * Flow Director is an advanced Rx filter, attempting to get Rx flows back
3996 * to the original CPU that initiated the Tx session. This runs in addition
3997 * to RSS, so if a packet doesn't match an FDIR filter, we can still spread the
3998 * Rx load across CPUs using RSS.
3999 *
4000 **/
Joe Perchese8e9f692010-09-07 21:34:53 +00004001static inline bool ixgbe_set_fdir_queues(struct ixgbe_adapter *adapter)
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004002{
4003 bool ret = false;
4004 struct ixgbe_ring_feature *f_fdir = &adapter->ring_feature[RING_F_FDIR];
4005
4006 f_fdir->indices = min((int)num_online_cpus(), f_fdir->indices);
4007 f_fdir->mask = 0;
4008
4009 /* Flow Director must have RSS enabled */
4010 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
4011 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4012 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)))) {
4013 adapter->num_tx_queues = f_fdir->indices;
4014 adapter->num_rx_queues = f_fdir->indices;
4015 ret = true;
4016 } else {
4017 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
4018 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
4019 }
4020 return ret;
4021}
4022
Yi Zou0331a832009-05-17 12:33:52 +00004023#ifdef IXGBE_FCOE
4024/**
4025 * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
4026 * @adapter: board private structure to initialize
4027 *
4028 * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
4029 * The ring feature mask is not used as a mask for FCoE, as it can take any 8
4030 * rx queues out of the max number of rx queues, instead, it is used as the
4031 * index of the first rx queue used by FCoE.
4032 *
4033 **/
4034static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
4035{
4036 bool ret = false;
4037 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
4038
4039 f->indices = min((int)num_online_cpus(), f->indices);
4040 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00004041 adapter->num_rx_queues = 1;
4042 adapter->num_tx_queues = 1;
Yi Zou0331a832009-05-17 12:33:52 +00004043#ifdef CONFIG_IXGBE_DCB
4044 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Emil Tantilov396e7992010-07-01 20:05:12 +00004045 e_info(probe, "FCoE enabled with DCB\n");
Yi Zou0331a832009-05-17 12:33:52 +00004046 ixgbe_set_dcb_queues(adapter);
4047 }
4048#endif
4049 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Emil Tantilov396e7992010-07-01 20:05:12 +00004050 e_info(probe, "FCoE enabled with RSS\n");
Yi Zou8faa2a72009-07-09 02:29:50 +00004051 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
4052 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
4053 ixgbe_set_fdir_queues(adapter);
4054 else
4055 ixgbe_set_rss_queues(adapter);
Yi Zou0331a832009-05-17 12:33:52 +00004056 }
4057 /* adding FCoE rx rings to the end */
4058 f->mask = adapter->num_rx_queues;
4059 adapter->num_rx_queues += f->indices;
Yi Zou8de8b2e2009-09-03 14:55:50 +00004060 adapter->num_tx_queues += f->indices;
Yi Zou0331a832009-05-17 12:33:52 +00004061
4062 ret = true;
4063 }
4064
4065 return ret;
4066}
4067
4068#endif /* IXGBE_FCOE */
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004069/**
4070 * ixgbe_set_sriov_queues: Allocate queues for IOV use
4071 * @adapter: board private structure to initialize
4072 *
4073 * IOV doesn't actually use anything, so just NAK the
4074 * request for now and let the other queue routines
4075 * figure out what to do.
4076 */
4077static inline bool ixgbe_set_sriov_queues(struct ixgbe_adapter *adapter)
4078{
4079 return false;
4080}
4081
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004082/*
4083 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
4084 * @adapter: board private structure to initialize
4085 *
4086 * This is the top level queue allocation routine. The order here is very
4087 * important, starting with the "most" number of features turned on at once,
4088 * and ending with the smallest set of features. This way large combinations
4089 * can be allocated if they're turned on, and smaller combinations are the
4090 * fallthrough conditions.
4091 *
4092 **/
Ben Hutchings847f53f2010-09-27 08:28:56 +00004093static int ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004094{
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004095 /* Start with base case */
4096 adapter->num_rx_queues = 1;
4097 adapter->num_tx_queues = 1;
4098 adapter->num_rx_pools = adapter->num_rx_queues;
4099 adapter->num_rx_queues_per_pool = 1;
4100
4101 if (ixgbe_set_sriov_queues(adapter))
Ben Hutchings847f53f2010-09-27 08:28:56 +00004102 goto done;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004103
Yi Zou0331a832009-05-17 12:33:52 +00004104#ifdef IXGBE_FCOE
4105 if (ixgbe_set_fcoe_queues(adapter))
4106 goto done;
4107
4108#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004109#ifdef CONFIG_IXGBE_DCB
4110 if (ixgbe_set_dcb_queues(adapter))
Wu Fengguangaf22ab12009-04-14 21:54:07 -07004111 goto done;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004112
4113#endif
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004114 if (ixgbe_set_fdir_queues(adapter))
4115 goto done;
4116
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004117 if (ixgbe_set_rss_queues(adapter))
Wu Fengguangaf22ab12009-04-14 21:54:07 -07004118 goto done;
4119
4120 /* fallback to base case */
4121 adapter->num_rx_queues = 1;
4122 adapter->num_tx_queues = 1;
4123
4124done:
Ben Hutchings847f53f2010-09-27 08:28:56 +00004125 /* Notify the stack of the (possibly) reduced queue counts. */
John Fastabendf0796d52010-07-01 13:21:57 +00004126 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
Ben Hutchings847f53f2010-09-27 08:28:56 +00004127 return netif_set_real_num_rx_queues(adapter->netdev,
4128 adapter->num_rx_queues);
Jesse Brandeburgb9804972008-09-11 20:00:29 -07004129}
4130
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004131static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00004132 int vectors)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004133{
4134 int err, vector_threshold;
4135
4136 /* We'll want at least 3 (vector_threshold):
4137 * 1) TxQ[0] Cleanup
4138 * 2) RxQ[0] Cleanup
4139 * 3) Other (Link Status Change, etc.)
4140 * 4) TCP Timer (optional)
4141 */
4142 vector_threshold = MIN_MSIX_COUNT;
4143
4144 /* The more we get, the more we will assign to Tx/Rx Cleanup
4145 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
4146 * Right now, we simply care about how many we'll get; we'll
4147 * set them up later while requesting irq's.
4148 */
4149 while (vectors >= vector_threshold) {
4150 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
Joe Perchese8e9f692010-09-07 21:34:53 +00004151 vectors);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004152 if (!err) /* Success in acquiring all requested vectors. */
4153 break;
4154 else if (err < 0)
4155 vectors = 0; /* Nasty failure, quit now */
4156 else /* err == number of vectors we should try again with */
4157 vectors = err;
4158 }
4159
4160 if (vectors < vector_threshold) {
4161 /* Can't allocate enough MSI-X interrupts? Oh well.
4162 * This just means we'll go with either a single MSI
4163 * vector or fall back to legacy interrupts.
4164 */
Emil Tantilov849c4542010-06-03 16:53:41 +00004165 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev,
4166 "Unable to allocate MSI-X interrupts\n");
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004167 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
4168 kfree(adapter->msix_entries);
4169 adapter->msix_entries = NULL;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004170 } else {
4171 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED; /* Woot! */
Peter P Waskiewicz Jreb7f1392009-02-01 01:18:58 -08004172 /*
4173 * Adjust for only the vectors we'll use, which is minimum
4174 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
4175 * vectors we were allocated.
4176 */
4177 adapter->num_msix_vectors = min(vectors,
Joe Perchese8e9f692010-09-07 21:34:53 +00004178 adapter->max_msix_q_vectors + NON_Q_VECTORS);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004179 }
4180}
4181
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004182/**
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004183 * ixgbe_cache_ring_rss - Descriptor ring to register mapping for RSS
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004184 * @adapter: board private structure to initialize
4185 *
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004186 * Cache the descriptor ring offsets for RSS to the assigned rings.
4187 *
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004188 **/
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004189static inline bool ixgbe_cache_ring_rss(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004190{
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004191 int i;
4192 bool ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004193
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004194 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
4195 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004196 adapter->rx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004197 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004198 adapter->tx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004199 ret = true;
4200 } else {
4201 ret = false;
4202 }
4203
4204 return ret;
4205}
4206
4207#ifdef CONFIG_IXGBE_DCB
4208/**
4209 * ixgbe_cache_ring_dcb - Descriptor ring to register mapping for DCB
4210 * @adapter: board private structure to initialize
4211 *
4212 * Cache the descriptor ring offsets for DCB to the assigned rings.
4213 *
4214 **/
4215static inline bool ixgbe_cache_ring_dcb(struct ixgbe_adapter *adapter)
4216{
4217 int i;
4218 bool ret = false;
4219 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
4220
4221 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
4222 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
Alexander Duyck2f90b862008-11-20 20:52:10 -08004223 /* the number of queues is assumed to be symmetric */
4224 for (i = 0; i < dcb_i; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004225 adapter->rx_ring[i]->reg_idx = i << 3;
4226 adapter->tx_ring[i]->reg_idx = i << 2;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004227 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004228 ret = true;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004229 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004230 if (dcb_i == 8) {
4231 /*
4232 * Tx TC0 starts at: descriptor queue 0
4233 * Tx TC1 starts at: descriptor queue 32
4234 * Tx TC2 starts at: descriptor queue 64
4235 * Tx TC3 starts at: descriptor queue 80
4236 * Tx TC4 starts at: descriptor queue 96
4237 * Tx TC5 starts at: descriptor queue 104
4238 * Tx TC6 starts at: descriptor queue 112
4239 * Tx TC7 starts at: descriptor queue 120
4240 *
4241 * Rx TC0-TC7 are offset by 16 queues each
4242 */
4243 for (i = 0; i < 3; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004244 adapter->tx_ring[i]->reg_idx = i << 5;
4245 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004246 }
4247 for ( ; i < 5; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004248 adapter->tx_ring[i]->reg_idx =
Joe Perchese8e9f692010-09-07 21:34:53 +00004249 ((i + 2) << 4);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004250 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004251 }
4252 for ( ; i < dcb_i; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004253 adapter->tx_ring[i]->reg_idx =
Joe Perchese8e9f692010-09-07 21:34:53 +00004254 ((i + 8) << 3);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004255 adapter->rx_ring[i]->reg_idx = i << 4;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004256 }
4257
4258 ret = true;
4259 } else if (dcb_i == 4) {
4260 /*
4261 * Tx TC0 starts at: descriptor queue 0
4262 * Tx TC1 starts at: descriptor queue 64
4263 * Tx TC2 starts at: descriptor queue 96
4264 * Tx TC3 starts at: descriptor queue 112
4265 *
4266 * Rx TC0-TC3 are offset by 32 queues each
4267 */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004268 adapter->tx_ring[0]->reg_idx = 0;
4269 adapter->tx_ring[1]->reg_idx = 64;
4270 adapter->tx_ring[2]->reg_idx = 96;
4271 adapter->tx_ring[3]->reg_idx = 112;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004272 for (i = 0 ; i < dcb_i; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004273 adapter->rx_ring[i]->reg_idx = i << 5;
PJ Waskiewiczf92ef202009-04-16 15:00:20 +00004274
4275 ret = true;
4276 } else {
4277 ret = false;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004278 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004279 } else {
4280 ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004281 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004282 } else {
4283 ret = false;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004284 }
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004285
4286 return ret;
4287}
4288#endif
4289
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004290/**
4291 * ixgbe_cache_ring_fdir - Descriptor ring to register mapping for Flow Director
4292 * @adapter: board private structure to initialize
4293 *
4294 * Cache the descriptor ring offsets for Flow Director to the assigned rings.
4295 *
4296 **/
Joe Perchese8e9f692010-09-07 21:34:53 +00004297static inline bool ixgbe_cache_ring_fdir(struct ixgbe_adapter *adapter)
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004298{
4299 int i;
4300 bool ret = false;
4301
4302 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED &&
4303 ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
4304 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))) {
4305 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004306 adapter->rx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004307 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004308 adapter->tx_ring[i]->reg_idx = i;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004309 ret = true;
4310 }
4311
4312 return ret;
4313}
4314
Yi Zou0331a832009-05-17 12:33:52 +00004315#ifdef IXGBE_FCOE
4316/**
4317 * ixgbe_cache_ring_fcoe - Descriptor ring to register mapping for the FCoE
4318 * @adapter: board private structure to initialize
4319 *
4320 * Cache the descriptor ring offsets for FCoE mode to the assigned rings.
4321 *
4322 */
4323static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
4324{
Yi Zou8de8b2e2009-09-03 14:55:50 +00004325 int i, fcoe_rx_i = 0, fcoe_tx_i = 0;
Yi Zou0331a832009-05-17 12:33:52 +00004326 bool ret = false;
4327 struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
4328
4329 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
4330#ifdef CONFIG_IXGBE_DCB
4331 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
Yi Zou8de8b2e2009-09-03 14:55:50 +00004332 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
4333
Yi Zou0331a832009-05-17 12:33:52 +00004334 ixgbe_cache_ring_dcb(adapter);
Yi Zou8de8b2e2009-09-03 14:55:50 +00004335 /* find out queues in TC for FCoE */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004336 fcoe_rx_i = adapter->rx_ring[fcoe->tc]->reg_idx + 1;
4337 fcoe_tx_i = adapter->tx_ring[fcoe->tc]->reg_idx + 1;
Yi Zou8de8b2e2009-09-03 14:55:50 +00004338 /*
4339 * In 82599, the number of Tx queues for each traffic
4340 * class for both 8-TC and 4-TC modes are:
4341 * TCs : TC0 TC1 TC2 TC3 TC4 TC5 TC6 TC7
4342 * 8 TCs: 32 32 16 16 8 8 8 8
4343 * 4 TCs: 64 64 32 32
4344 * We have max 8 queues for FCoE, where 8 the is
4345 * FCoE redirection table size. If TC for FCoE is
4346 * less than or equal to TC3, we have enough queues
4347 * to add max of 8 queues for FCoE, so we start FCoE
4348 * tx descriptor from the next one, i.e., reg_idx + 1.
4349 * If TC for FCoE is above TC3, implying 8 TC mode,
4350 * and we need 8 for FCoE, we have to take all queues
4351 * in that traffic class for FCoE.
4352 */
4353 if ((f->indices == IXGBE_FCRETA_SIZE) && (fcoe->tc > 3))
4354 fcoe_tx_i--;
Yi Zou0331a832009-05-17 12:33:52 +00004355 }
4356#endif /* CONFIG_IXGBE_DCB */
4357 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
Yi Zou8faa2a72009-07-09 02:29:50 +00004358 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) ||
4359 (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
4360 ixgbe_cache_ring_fdir(adapter);
4361 else
4362 ixgbe_cache_ring_rss(adapter);
4363
Yi Zou8de8b2e2009-09-03 14:55:50 +00004364 fcoe_rx_i = f->mask;
4365 fcoe_tx_i = f->mask;
Yi Zou0331a832009-05-17 12:33:52 +00004366 }
Yi Zou8de8b2e2009-09-03 14:55:50 +00004367 for (i = 0; i < f->indices; i++, fcoe_rx_i++, fcoe_tx_i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004368 adapter->rx_ring[f->mask + i]->reg_idx = fcoe_rx_i;
4369 adapter->tx_ring[f->mask + i]->reg_idx = fcoe_tx_i;
Yi Zou8de8b2e2009-09-03 14:55:50 +00004370 }
Yi Zou0331a832009-05-17 12:33:52 +00004371 ret = true;
4372 }
4373 return ret;
4374}
4375
4376#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004377/**
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004378 * ixgbe_cache_ring_sriov - Descriptor ring to register mapping for sriov
4379 * @adapter: board private structure to initialize
4380 *
4381 * SR-IOV doesn't use any descriptor rings but changes the default if
4382 * no other mapping is used.
4383 *
4384 */
4385static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter *adapter)
4386{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004387 adapter->rx_ring[0]->reg_idx = adapter->num_vfs * 2;
4388 adapter->tx_ring[0]->reg_idx = adapter->num_vfs * 2;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004389 if (adapter->num_vfs)
4390 return true;
4391 else
4392 return false;
4393}
4394
4395/**
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004396 * ixgbe_cache_ring_register - Descriptor ring to register mapping
4397 * @adapter: board private structure to initialize
4398 *
4399 * Once we know the feature-set enabled for the device, we'll cache
4400 * the register offset the descriptor ring is assigned to.
4401 *
4402 * Note, the order the various feature calls is important. It must start with
4403 * the "most" features enabled at the same time, then trickle down to the
4404 * least amount of features turned on at once.
4405 **/
4406static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
4407{
4408 /* start with default case */
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004409 adapter->rx_ring[0]->reg_idx = 0;
4410 adapter->tx_ring[0]->reg_idx = 0;
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004411
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004412 if (ixgbe_cache_ring_sriov(adapter))
4413 return;
4414
Yi Zou0331a832009-05-17 12:33:52 +00004415#ifdef IXGBE_FCOE
4416 if (ixgbe_cache_ring_fcoe(adapter))
4417 return;
4418
4419#endif /* IXGBE_FCOE */
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004420#ifdef CONFIG_IXGBE_DCB
4421 if (ixgbe_cache_ring_dcb(adapter))
4422 return;
4423
4424#endif
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004425 if (ixgbe_cache_ring_fdir(adapter))
4426 return;
4427
Peter P Waskiewicz Jrbc971142009-02-05 23:53:59 -08004428 if (ixgbe_cache_ring_rss(adapter))
4429 return;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004430}
4431
Auke Kok9a799d72007-09-15 14:07:45 -07004432/**
4433 * ixgbe_alloc_queues - Allocate memory for all rings
4434 * @adapter: board private structure to initialize
4435 *
4436 * We allocate one ring per queue at run-time since we don't know the
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004437 * number of queues at compile-time. The polling_netdev array is
4438 * intended for Multiqueue, but should work fine with a single queue.
Auke Kok9a799d72007-09-15 14:07:45 -07004439 **/
Alexander Duyck2f90b862008-11-20 20:52:10 -08004440static int ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
Auke Kok9a799d72007-09-15 14:07:45 -07004441{
4442 int i;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004443 int orig_node = adapter->node;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004444
4445 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004446 struct ixgbe_ring *ring = adapter->tx_ring[i];
4447 if (orig_node == -1) {
4448 int cur_node = next_online_node(adapter->node);
4449 if (cur_node == MAX_NUMNODES)
4450 cur_node = first_online_node;
4451 adapter->node = cur_node;
4452 }
4453 ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
Joe Perchese8e9f692010-09-07 21:34:53 +00004454 adapter->node);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004455 if (!ring)
4456 ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
4457 if (!ring)
4458 goto err_tx_ring_allocation;
4459 ring->count = adapter->tx_ring_count;
4460 ring->queue_index = i;
4461 ring->numa_node = adapter->node;
4462
4463 adapter->tx_ring[i] = ring;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004464 }
Jesse Brandeburgb9804972008-09-11 20:00:29 -07004465
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004466 /* Restore the adapter's original node */
4467 adapter->node = orig_node;
4468
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004469 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004470 struct ixgbe_ring *ring = adapter->rx_ring[i];
4471 if (orig_node == -1) {
4472 int cur_node = next_online_node(adapter->node);
4473 if (cur_node == MAX_NUMNODES)
4474 cur_node = first_online_node;
4475 adapter->node = cur_node;
4476 }
4477 ring = kzalloc_node(sizeof(struct ixgbe_ring), GFP_KERNEL,
Joe Perchese8e9f692010-09-07 21:34:53 +00004478 adapter->node);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004479 if (!ring)
4480 ring = kzalloc(sizeof(struct ixgbe_ring), GFP_KERNEL);
4481 if (!ring)
4482 goto err_rx_ring_allocation;
4483 ring->count = adapter->rx_ring_count;
4484 ring->queue_index = i;
4485 ring->numa_node = adapter->node;
4486
4487 adapter->rx_ring[i] = ring;
Auke Kok9a799d72007-09-15 14:07:45 -07004488 }
4489
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004490 /* Restore the adapter's original node */
4491 adapter->node = orig_node;
4492
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004493 ixgbe_cache_ring_register(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004494
4495 return 0;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004496
4497err_rx_ring_allocation:
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004498 for (i = 0; i < adapter->num_tx_queues; i++)
4499 kfree(adapter->tx_ring[i]);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004500err_tx_ring_allocation:
4501 return -ENOMEM;
4502}
4503
4504/**
4505 * ixgbe_set_interrupt_capability - set MSI-X or MSI if supported
4506 * @adapter: board private structure to initialize
4507 *
4508 * Attempt to configure the interrupts using the best available
4509 * capabilities of the hardware and the kernel.
4510 **/
Al Virofeea6a52008-11-27 15:34:07 -08004511static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004512{
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00004513 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004514 int err = 0;
4515 int vector, v_budget;
4516
4517 /*
4518 * It's easy to be greedy for MSI-X vectors, but it really
4519 * doesn't do us much good if we have a lot more vectors
4520 * than CPU's. So let's be conservative and only ask for
PJ Waskiewicz342bde12009-11-12 23:50:43 +00004521 * (roughly) the same number of vectors as there are CPU's.
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004522 */
4523 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
Joe Perchese8e9f692010-09-07 21:34:53 +00004524 (int)num_online_cpus()) + NON_Q_VECTORS;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004525
4526 /*
4527 * At the same time, hardware can only support a maximum of
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00004528 * hw.mac->max_msix_vectors vectors. With features
4529 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
4530 * descriptor queues supported by our device. Thus, we cap it off in
4531 * those rare cases where the cpu count also exceeds our vector limit.
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004532 */
PJ Waskiewicz8be0e462009-03-31 21:34:05 +00004533 v_budget = min(v_budget, (int)hw->mac.max_msix_vectors);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004534
4535 /* A failure in MSI-X entry allocation isn't fatal, but it does
4536 * mean we disable MSI-X capabilities of the adapter. */
4537 adapter->msix_entries = kcalloc(v_budget,
Joe Perchese8e9f692010-09-07 21:34:53 +00004538 sizeof(struct msix_entry), GFP_KERNEL);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004539 if (adapter->msix_entries) {
4540 for (vector = 0; vector < v_budget; vector++)
4541 adapter->msix_entries[vector].entry = vector;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004542
Alexander Duyck7a921c92009-05-06 10:43:28 +00004543 ixgbe_acquire_msix_vectors(adapter, v_budget);
4544
4545 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4546 goto out;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004547 }
David S. Miller26d27842010-05-03 15:18:22 -07004548
Alexander Duyck7a921c92009-05-06 10:43:28 +00004549 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
4550 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004551 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
4552 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
4553 adapter->atr_sample_rate = 0;
Greg Rose1cdd1ec2010-01-09 02:26:46 +00004554 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4555 ixgbe_disable_sriov(adapter);
4556
Ben Hutchings847f53f2010-09-27 08:28:56 +00004557 err = ixgbe_set_num_queues(adapter);
4558 if (err)
4559 return err;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004560
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004561 err = pci_enable_msi(adapter->pdev);
4562 if (!err) {
4563 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
4564 } else {
Emil Tantilov849c4542010-06-03 16:53:41 +00004565 netif_printk(adapter, hw, KERN_DEBUG, adapter->netdev,
4566 "Unable to allocate MSI interrupt, "
4567 "falling back to legacy. Error: %d\n", err);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004568 /* reset err */
4569 err = 0;
4570 }
4571
4572out:
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004573 return err;
4574}
4575
Alexander Duyck7a921c92009-05-06 10:43:28 +00004576/**
4577 * ixgbe_alloc_q_vectors - Allocate memory for interrupt vectors
4578 * @adapter: board private structure to initialize
4579 *
4580 * We allocate one q_vector per queue interrupt. If allocation fails we
4581 * return -ENOMEM.
4582 **/
4583static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter)
4584{
4585 int q_idx, num_q_vectors;
4586 struct ixgbe_q_vector *q_vector;
4587 int napi_vectors;
4588 int (*poll)(struct napi_struct *, int);
4589
4590 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4591 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
4592 napi_vectors = adapter->num_rx_queues;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004593 poll = &ixgbe_clean_rxtx_many;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004594 } else {
4595 num_q_vectors = 1;
4596 napi_vectors = 1;
4597 poll = &ixgbe_poll;
4598 }
4599
4600 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004601 q_vector = kzalloc_node(sizeof(struct ixgbe_q_vector),
Joe Perchese8e9f692010-09-07 21:34:53 +00004602 GFP_KERNEL, adapter->node);
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004603 if (!q_vector)
4604 q_vector = kzalloc(sizeof(struct ixgbe_q_vector),
Joe Perchese8e9f692010-09-07 21:34:53 +00004605 GFP_KERNEL);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004606 if (!q_vector)
4607 goto err_out;
4608 q_vector->adapter = adapter;
Nelson, Shannonf7554a22009-09-18 09:46:06 +00004609 if (q_vector->txr_count && !q_vector->rxr_count)
4610 q_vector->eitr = adapter->tx_eitr_param;
4611 else
4612 q_vector->eitr = adapter->rx_eitr_param;
Alexander Duyckfe49f042009-06-04 16:00:09 +00004613 q_vector->v_idx = q_idx;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004614 netif_napi_add(adapter->netdev, &q_vector->napi, (*poll), 64);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004615 adapter->q_vector[q_idx] = q_vector;
4616 }
4617
4618 return 0;
4619
4620err_out:
4621 while (q_idx) {
4622 q_idx--;
4623 q_vector = adapter->q_vector[q_idx];
4624 netif_napi_del(&q_vector->napi);
4625 kfree(q_vector);
4626 adapter->q_vector[q_idx] = NULL;
4627 }
4628 return -ENOMEM;
4629}
4630
4631/**
4632 * ixgbe_free_q_vectors - Free memory allocated for interrupt vectors
4633 * @adapter: board private structure to initialize
4634 *
4635 * This function frees the memory allocated to the q_vectors. In addition if
4636 * NAPI is enabled it will delete any references to the NAPI struct prior
4637 * to freeing the q_vector.
4638 **/
4639static void ixgbe_free_q_vectors(struct ixgbe_adapter *adapter)
4640{
4641 int q_idx, num_q_vectors;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004642
Alexander Duyck91281fd2009-06-04 16:00:27 +00004643 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
Alexander Duyck7a921c92009-05-06 10:43:28 +00004644 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004645 else
Alexander Duyck7a921c92009-05-06 10:43:28 +00004646 num_q_vectors = 1;
Alexander Duyck7a921c92009-05-06 10:43:28 +00004647
4648 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
4649 struct ixgbe_q_vector *q_vector = adapter->q_vector[q_idx];
Alexander Duyck7a921c92009-05-06 10:43:28 +00004650 adapter->q_vector[q_idx] = NULL;
Alexander Duyck91281fd2009-06-04 16:00:27 +00004651 netif_napi_del(&q_vector->napi);
Alexander Duyck7a921c92009-05-06 10:43:28 +00004652 kfree(q_vector);
4653 }
4654}
4655
Don Skidmore7b25cdb2009-08-25 04:47:32 +00004656static void ixgbe_reset_interrupt_capability(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004657{
4658 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4659 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
4660 pci_disable_msix(adapter->pdev);
4661 kfree(adapter->msix_entries);
4662 adapter->msix_entries = NULL;
4663 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
4664 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
4665 pci_disable_msi(adapter->pdev);
4666 }
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004667}
4668
4669/**
4670 * ixgbe_init_interrupt_scheme - Determine proper interrupt scheme
4671 * @adapter: board private structure to initialize
4672 *
4673 * We determine which interrupt scheme to use based on...
4674 * - Kernel support (MSI, MSI-X)
4675 * - which can be user-defined (via MODULE_PARAM)
4676 * - Hardware queue count (num_*_queues)
4677 * - defined by miscellaneous hardware support/features (RSS, etc.)
4678 **/
Alexander Duyck2f90b862008-11-20 20:52:10 -08004679int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter)
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004680{
4681 int err;
4682
4683 /* Number of supported queues */
Ben Hutchings847f53f2010-09-27 08:28:56 +00004684 err = ixgbe_set_num_queues(adapter);
4685 if (err)
4686 return err;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004687
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004688 err = ixgbe_set_interrupt_capability(adapter);
4689 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004690 e_dev_err("Unable to setup interrupt capabilities\n");
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004691 goto err_set_interrupt;
4692 }
4693
Alexander Duyck7a921c92009-05-06 10:43:28 +00004694 err = ixgbe_alloc_q_vectors(adapter);
4695 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004696 e_dev_err("Unable to allocate memory for queue vectors\n");
Alexander Duyck7a921c92009-05-06 10:43:28 +00004697 goto err_alloc_q_vectors;
4698 }
4699
4700 err = ixgbe_alloc_queues(adapter);
4701 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004702 e_dev_err("Unable to allocate memory for queues\n");
Alexander Duyck7a921c92009-05-06 10:43:28 +00004703 goto err_alloc_queues;
4704 }
4705
Emil Tantilov849c4542010-06-03 16:53:41 +00004706 e_dev_info("Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
Emil Tantilov396e7992010-07-01 20:05:12 +00004707 (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
4708 adapter->num_rx_queues, adapter->num_tx_queues);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004709
4710 set_bit(__IXGBE_DOWN, &adapter->state);
4711
4712 return 0;
4713
Alexander Duyck7a921c92009-05-06 10:43:28 +00004714err_alloc_queues:
4715 ixgbe_free_q_vectors(adapter);
4716err_alloc_q_vectors:
4717 ixgbe_reset_interrupt_capability(adapter);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004718err_set_interrupt:
Alexander Duyck7a921c92009-05-06 10:43:28 +00004719 return err;
4720}
4721
Eric Dumazet1a515022010-11-16 19:26:42 -08004722static void ring_free_rcu(struct rcu_head *head)
4723{
4724 kfree(container_of(head, struct ixgbe_ring, rcu));
4725}
4726
Alexander Duyck7a921c92009-05-06 10:43:28 +00004727/**
4728 * ixgbe_clear_interrupt_scheme - Clear the current interrupt scheme settings
4729 * @adapter: board private structure to clear interrupt scheme on
4730 *
4731 * We go through and clear interrupt specific resources and reset the structure
4732 * to pre-load conditions
4733 **/
4734void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter)
4735{
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004736 int i;
4737
4738 for (i = 0; i < adapter->num_tx_queues; i++) {
4739 kfree(adapter->tx_ring[i]);
4740 adapter->tx_ring[i] = NULL;
4741 }
4742 for (i = 0; i < adapter->num_rx_queues; i++) {
Eric Dumazet1a515022010-11-16 19:26:42 -08004743 struct ixgbe_ring *ring = adapter->rx_ring[i];
4744
4745 /* ixgbe_get_stats64() might access this ring, we must wait
4746 * a grace period before freeing it.
4747 */
4748 call_rcu(&ring->rcu, ring_free_rcu);
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004749 adapter->rx_ring[i] = NULL;
4750 }
Alexander Duyck7a921c92009-05-06 10:43:28 +00004751
4752 ixgbe_free_q_vectors(adapter);
4753 ixgbe_reset_interrupt_capability(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07004754}
4755
4756/**
Donald Skidmorec4900be2008-11-20 21:11:42 -08004757 * ixgbe_sfp_timer - worker thread to find a missing module
4758 * @data: pointer to our adapter struct
4759 **/
4760static void ixgbe_sfp_timer(unsigned long data)
4761{
4762 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
4763
Jesse Brandeburg4df10462009-03-13 22:15:31 +00004764 /*
4765 * Do the sfp_timer outside of interrupt context due to the
Donald Skidmorec4900be2008-11-20 21:11:42 -08004766 * delays that sfp+ detection requires
4767 */
4768 schedule_work(&adapter->sfp_task);
4769}
4770
4771/**
4772 * ixgbe_sfp_task - worker thread to find a missing module
4773 * @work: pointer to work_struct containing our data
4774 **/
4775static void ixgbe_sfp_task(struct work_struct *work)
4776{
4777 struct ixgbe_adapter *adapter = container_of(work,
Joe Perchese8e9f692010-09-07 21:34:53 +00004778 struct ixgbe_adapter,
4779 sfp_task);
Donald Skidmorec4900be2008-11-20 21:11:42 -08004780 struct ixgbe_hw *hw = &adapter->hw;
4781
4782 if ((hw->phy.type == ixgbe_phy_nl) &&
4783 (hw->phy.sfp_type == ixgbe_sfp_type_not_present)) {
4784 s32 ret = hw->phy.ops.identify_sfp(hw);
Don Skidmore63d6e1d2009-07-02 12:50:12 +00004785 if (ret == IXGBE_ERR_SFP_NOT_PRESENT)
Donald Skidmorec4900be2008-11-20 21:11:42 -08004786 goto reschedule;
4787 ret = hw->phy.ops.reset(hw);
4788 if (ret == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004789 e_dev_err("failed to initialize because an unsupported "
4790 "SFP+ module type was detected.\n");
4791 e_dev_err("Reload the driver after installing a "
4792 "supported module.\n");
Donald Skidmorec4900be2008-11-20 21:11:42 -08004793 unregister_netdev(adapter->netdev);
4794 } else {
Emil Tantilov396e7992010-07-01 20:05:12 +00004795 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
Donald Skidmorec4900be2008-11-20 21:11:42 -08004796 }
4797 /* don't need this routine any more */
4798 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
4799 }
4800 return;
4801reschedule:
4802 if (test_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state))
4803 mod_timer(&adapter->sfp_timer,
Joe Perchese8e9f692010-09-07 21:34:53 +00004804 round_jiffies(jiffies + (2 * HZ)));
Donald Skidmorec4900be2008-11-20 21:11:42 -08004805}
4806
4807/**
Auke Kok9a799d72007-09-15 14:07:45 -07004808 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4809 * @adapter: board private structure to initialize
4810 *
4811 * ixgbe_sw_init initializes the Adapter private data structure.
4812 * Fields are initialized based on PCI device information and
4813 * OS network device settings (MTU size).
4814 **/
4815static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
4816{
4817 struct ixgbe_hw *hw = &adapter->hw;
4818 struct pci_dev *pdev = adapter->pdev;
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00004819 struct net_device *dev = adapter->netdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004820 unsigned int rss;
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08004821#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08004822 int j;
4823 struct tc_configuration *tc;
4824#endif
John Fastabend16b61be2010-11-16 19:26:44 -08004825 int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004826
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07004827 /* PCI config space info */
4828
4829 hw->vendor_id = pdev->vendor;
4830 hw->device_id = pdev->device;
4831 hw->revision_id = pdev->revision;
4832 hw->subsystem_vendor_id = pdev->subsystem_vendor;
4833 hw->subsystem_device_id = pdev->subsystem_device;
4834
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004835 /* Set capability flags */
4836 rss = min(IXGBE_MAX_RSS_INDICES, (int)num_online_cpus());
4837 adapter->ring_feature[RING_F_RSS].indices = rss;
4838 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004839 adapter->ring_feature[RING_F_DCB].indices = IXGBE_MAX_DCB_INDICES;
Don Skidmorebf069c92009-05-07 10:39:54 +00004840 if (hw->mac.type == ixgbe_mac_82598EB) {
4841 if (hw->device_id == IXGBE_DEV_ID_82598AT)
4842 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004843 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
Don Skidmorebf069c92009-05-07 10:39:54 +00004844 } else if (hw->mac.type == ixgbe_mac_82599EB) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00004845 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00004846 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
4847 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07004848 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
4849 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
Peter Waskiewicz9a713e72010-02-10 16:07:54 +00004850 if (dev->features & NETIF_F_NTUPLE) {
4851 /* Flow Director perfect filter enabled */
4852 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
4853 adapter->atr_sample_rate = 0;
4854 spin_lock_init(&adapter->fdir_perfect_lock);
4855 } else {
4856 /* Flow Director hash filters enabled */
4857 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
4858 adapter->atr_sample_rate = 20;
4859 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004860 adapter->ring_feature[RING_F_FDIR].indices =
Joe Perchese8e9f692010-09-07 21:34:53 +00004861 IXGBE_MAX_FDIR_INDICES;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00004862 adapter->fdir_pballoc = 0;
Yi Zoueacd73f2009-05-13 13:11:06 +00004863#ifdef IXGBE_FCOE
Yi Zou0d551582009-07-22 14:07:12 +00004864 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
4865 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
4866 adapter->ring_feature[RING_F_FCOE].indices = 0;
Yi Zou61a0f422009-12-03 11:32:22 +00004867#ifdef CONFIG_IXGBE_DCB
Yi Zou6ee16522009-08-31 12:34:28 +00004868 /* Default traffic class to use for FCoE */
4869 adapter->fcoe.tc = IXGBE_FCOE_DEFTC;
John Fastabend56075a92010-07-26 20:41:31 +00004870 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
Yi Zou61a0f422009-12-03 11:32:22 +00004871#endif
Yi Zoueacd73f2009-05-13 13:11:06 +00004872#endif /* IXGBE_FCOE */
Alexander Duyckf8212f92009-04-27 22:42:37 +00004873 }
Alexander Duyck2f90b862008-11-20 20:52:10 -08004874
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08004875#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08004876 /* Configure DCB traffic classes */
4877 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
4878 tc = &adapter->dcb_cfg.tc_config[j];
4879 tc->path[DCB_TX_CONFIG].bwg_id = 0;
4880 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
4881 tc->path[DCB_RX_CONFIG].bwg_id = 0;
4882 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
4883 tc->dcb_pfc = pfc_disabled;
4884 }
4885 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
4886 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
4887 adapter->dcb_cfg.rx_pba_cfg = pba_equal;
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00004888 adapter->dcb_cfg.pfc_mode_enable = false;
Alexander Duyck2f90b862008-11-20 20:52:10 -08004889 adapter->dcb_cfg.round_robin_enable = false;
4890 adapter->dcb_set_bitmap = 0x00;
4891 ixgbe_copy_dcb_cfg(&adapter->dcb_cfg, &adapter->temp_dcb_cfg,
Joe Perchese8e9f692010-09-07 21:34:53 +00004892 adapter->ring_feature[RING_F_DCB].indices);
Alexander Duyck2f90b862008-11-20 20:52:10 -08004893
4894#endif
Auke Kok9a799d72007-09-15 14:07:45 -07004895
4896 /* default flow control settings */
Don Skidmorecd7664f2009-03-31 21:33:44 +00004897 hw->fc.requested_mode = ixgbe_fc_full;
Don Skidmore71fd5702009-03-31 21:35:05 +00004898 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00004899#ifdef CONFIG_DCB
4900 adapter->last_lfc_mode = hw->fc.current_mode;
4901#endif
John Fastabend16b61be2010-11-16 19:26:44 -08004902 hw->fc.high_water = FC_HIGH_WATER(max_frame);
4903 hw->fc.low_water = FC_LOW_WATER(max_frame);
Jesse Brandeburg2b9ade92008-08-26 04:27:10 -07004904 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
4905 hw->fc.send_xon = true;
Don Skidmore71fd5702009-03-31 21:35:05 +00004906 hw->fc.disable_fc_autoneg = false;
Auke Kok9a799d72007-09-15 14:07:45 -07004907
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07004908 /* enable itr by default in dynamic mode */
Nelson, Shannonf7554a22009-09-18 09:46:06 +00004909 adapter->rx_itr_setting = 1;
4910 adapter->rx_eitr_param = 20000;
4911 adapter->tx_itr_setting = 1;
4912 adapter->tx_eitr_param = 10000;
Jesse Brandeburg30efa5a2008-09-11 19:58:14 -07004913
4914 /* set defaults for eitr in MegaBytes */
4915 adapter->eitr_low = 10;
4916 adapter->eitr_high = 20;
4917
4918 /* set default ring sizes */
4919 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
4920 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
4921
Auke Kok9a799d72007-09-15 14:07:45 -07004922 /* initialize eeprom parameters */
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07004923 if (ixgbe_init_eeprom_params_generic(hw)) {
Emil Tantilov849c4542010-06-03 16:53:41 +00004924 e_dev_err("EEPROM initialization failed\n");
Auke Kok9a799d72007-09-15 14:07:45 -07004925 return -EIO;
4926 }
4927
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08004928 /* enable rx csum by default */
Auke Kok9a799d72007-09-15 14:07:45 -07004929 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
4930
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004931 /* get assigned NUMA node */
4932 adapter->node = dev_to_node(&pdev->dev);
4933
Auke Kok9a799d72007-09-15 14:07:45 -07004934 set_bit(__IXGBE_DOWN, &adapter->state);
4935
4936 return 0;
4937}
4938
4939/**
4940 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4941 * @adapter: board private structure
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004942 * @tx_ring: tx descriptor ring (for a specific queue) to setup
Auke Kok9a799d72007-09-15 14:07:45 -07004943 *
4944 * Return 0 on success, negative on failure
4945 **/
4946int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00004947 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07004948{
4949 struct pci_dev *pdev = adapter->pdev;
4950 int size;
4951
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004952 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004953 tx_ring->tx_buffer_info = vmalloc_node(size, tx_ring->numa_node);
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00004954 if (!tx_ring->tx_buffer_info)
4955 tx_ring->tx_buffer_info = vmalloc(size);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004956 if (!tx_ring->tx_buffer_info)
4957 goto err;
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004958 memset(tx_ring->tx_buffer_info, 0, size);
Auke Kok9a799d72007-09-15 14:07:45 -07004959
4960 /* round up to nearest 4K */
Peter P Waskiewicz Jr12207e42009-02-06 21:47:24 -08004961 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004962 tx_ring->size = ALIGN(tx_ring->size, 4096);
Auke Kok9a799d72007-09-15 14:07:45 -07004963
Nick Nunley1b507732010-04-27 13:10:27 +00004964 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
4965 &tx_ring->dma, GFP_KERNEL);
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004966 if (!tx_ring->desc)
4967 goto err;
Auke Kok9a799d72007-09-15 14:07:45 -07004968
Jesse Brandeburg3a581072008-08-26 04:27:08 -07004969 tx_ring->next_to_use = 0;
4970 tx_ring->next_to_clean = 0;
4971 tx_ring->work_limit = tx_ring->count;
Auke Kok9a799d72007-09-15 14:07:45 -07004972 return 0;
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004973
4974err:
4975 vfree(tx_ring->tx_buffer_info);
4976 tx_ring->tx_buffer_info = NULL;
Emil Tantilov396e7992010-07-01 20:05:12 +00004977 e_err(probe, "Unable to allocate memory for the Tx descriptor ring\n");
Jesse Brandeburge01c31a2008-08-26 04:27:13 -07004978 return -ENOMEM;
Auke Kok9a799d72007-09-15 14:07:45 -07004979}
4980
4981/**
Alexander Duyck69888672008-09-11 20:05:39 -07004982 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4983 * @adapter: board private structure
4984 *
4985 * If this function returns with an error, then it's possible one or
4986 * more of the rings is populated (while the rest are not). It is the
4987 * callers duty to clean those orphaned rings.
4988 *
4989 * Return 0 on success, negative on failure
4990 **/
4991static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
4992{
4993 int i, err = 0;
4994
4995 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00004996 err = ixgbe_setup_tx_resources(adapter, adapter->tx_ring[i]);
Alexander Duyck69888672008-09-11 20:05:39 -07004997 if (!err)
4998 continue;
Emil Tantilov396e7992010-07-01 20:05:12 +00004999 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
Alexander Duyck69888672008-09-11 20:05:39 -07005000 break;
5001 }
5002
5003 return err;
5004}
5005
5006/**
Auke Kok9a799d72007-09-15 14:07:45 -07005007 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5008 * @adapter: board private structure
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005009 * @rx_ring: rx descriptor ring (for a specific queue) to setup
Auke Kok9a799d72007-09-15 14:07:45 -07005010 *
5011 * Returns 0 on success, negative on failure
5012 **/
5013int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00005014 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07005015{
5016 struct pci_dev *pdev = adapter->pdev;
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08005017 int size;
Auke Kok9a799d72007-09-15 14:07:45 -07005018
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005019 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
Jesse Brandeburg1a6c14a2010-02-03 14:18:50 +00005020 rx_ring->rx_buffer_info = vmalloc_node(size, adapter->node);
5021 if (!rx_ring->rx_buffer_info)
5022 rx_ring->rx_buffer_info = vmalloc(size);
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005023 if (!rx_ring->rx_buffer_info) {
Emil Tantilov396e7992010-07-01 20:05:12 +00005024 e_err(probe, "vmalloc allocation failed for the Rx "
5025 "descriptor ring\n");
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07005026 goto alloc_failed;
Auke Kok9a799d72007-09-15 14:07:45 -07005027 }
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005028 memset(rx_ring->rx_buffer_info, 0, size);
Auke Kok9a799d72007-09-15 14:07:45 -07005029
Auke Kok9a799d72007-09-15 14:07:45 -07005030 /* Round up to nearest 4K */
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005031 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5032 rx_ring->size = ALIGN(rx_ring->size, 4096);
Auke Kok9a799d72007-09-15 14:07:45 -07005033
Nick Nunley1b507732010-04-27 13:10:27 +00005034 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
5035 &rx_ring->dma, GFP_KERNEL);
Auke Kok9a799d72007-09-15 14:07:45 -07005036
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005037 if (!rx_ring->desc) {
Emil Tantilov396e7992010-07-01 20:05:12 +00005038 e_err(probe, "Memory allocation failed for the Rx "
5039 "descriptor ring\n");
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005040 vfree(rx_ring->rx_buffer_info);
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07005041 goto alloc_failed;
Auke Kok9a799d72007-09-15 14:07:45 -07005042 }
5043
Jesse Brandeburg3a581072008-08-26 04:27:08 -07005044 rx_ring->next_to_clean = 0;
5045 rx_ring->next_to_use = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07005046
5047 return 0;
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07005048
5049alloc_failed:
Mallikarjuna R Chilakala177db6f2008-06-18 15:32:19 -07005050 return -ENOMEM;
Auke Kok9a799d72007-09-15 14:07:45 -07005051}
5052
5053/**
Alexander Duyck69888672008-09-11 20:05:39 -07005054 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5055 * @adapter: board private structure
5056 *
5057 * If this function returns with an error, then it's possible one or
5058 * more of the rings is populated (while the rest are not). It is the
5059 * callers duty to clean those orphaned rings.
5060 *
5061 * Return 0 on success, negative on failure
5062 **/
5063
5064static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5065{
5066 int i, err = 0;
5067
5068 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005069 err = ixgbe_setup_rx_resources(adapter, adapter->rx_ring[i]);
Alexander Duyck69888672008-09-11 20:05:39 -07005070 if (!err)
5071 continue;
Emil Tantilov396e7992010-07-01 20:05:12 +00005072 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
Alexander Duyck69888672008-09-11 20:05:39 -07005073 break;
5074 }
5075
5076 return err;
5077}
5078
5079/**
Auke Kok9a799d72007-09-15 14:07:45 -07005080 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5081 * @adapter: board private structure
5082 * @tx_ring: Tx descriptor ring for a specific queue
5083 *
5084 * Free all transmit software resources
5085 **/
Jesse Brandeburgc431f972008-09-11 19:59:16 -07005086void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00005087 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07005088{
5089 struct pci_dev *pdev = adapter->pdev;
5090
5091 ixgbe_clean_tx_ring(adapter, tx_ring);
5092
5093 vfree(tx_ring->tx_buffer_info);
5094 tx_ring->tx_buffer_info = NULL;
5095
Nick Nunley1b507732010-04-27 13:10:27 +00005096 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
5097 tx_ring->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07005098
5099 tx_ring->desc = NULL;
5100}
5101
5102/**
5103 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5104 * @adapter: board private structure
5105 *
5106 * Free all transmit software resources
5107 **/
5108static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5109{
5110 int i;
5111
5112 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005113 if (adapter->tx_ring[i]->desc)
5114 ixgbe_free_tx_resources(adapter, adapter->tx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07005115}
5116
5117/**
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07005118 * ixgbe_free_rx_resources - Free Rx Resources
Auke Kok9a799d72007-09-15 14:07:45 -07005119 * @adapter: board private structure
5120 * @rx_ring: ring to clean the resources from
5121 *
5122 * Free all receive software resources
5123 **/
Jesse Brandeburgc431f972008-09-11 19:59:16 -07005124void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00005125 struct ixgbe_ring *rx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07005126{
5127 struct pci_dev *pdev = adapter->pdev;
5128
5129 ixgbe_clean_rx_ring(adapter, rx_ring);
5130
5131 vfree(rx_ring->rx_buffer_info);
5132 rx_ring->rx_buffer_info = NULL;
5133
Nick Nunley1b507732010-04-27 13:10:27 +00005134 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
5135 rx_ring->dma);
Auke Kok9a799d72007-09-15 14:07:45 -07005136
5137 rx_ring->desc = NULL;
5138}
5139
5140/**
5141 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5142 * @adapter: board private structure
5143 *
5144 * Free all receive software resources
5145 **/
5146static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5147{
5148 int i;
5149
5150 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005151 if (adapter->rx_ring[i]->desc)
5152 ixgbe_free_rx_resources(adapter, adapter->rx_ring[i]);
Auke Kok9a799d72007-09-15 14:07:45 -07005153}
5154
5155/**
Auke Kok9a799d72007-09-15 14:07:45 -07005156 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5157 * @netdev: network interface device structure
5158 * @new_mtu: new value for maximum frame size
5159 *
5160 * Returns 0 on success, negative on failure
5161 **/
5162static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5163{
5164 struct ixgbe_adapter *adapter = netdev_priv(netdev);
John Fastabend16b61be2010-11-16 19:26:44 -08005165 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07005166 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5167
Jesse Brandeburg42c783c2008-09-11 19:56:28 -07005168 /* MTU < 68 is an error and causes problems on some kernels */
5169 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
Auke Kok9a799d72007-09-15 14:07:45 -07005170 return -EINVAL;
5171
Emil Tantilov396e7992010-07-01 20:05:12 +00005172 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08005173 /* must set new MTU before calling down or up */
Auke Kok9a799d72007-09-15 14:07:45 -07005174 netdev->mtu = new_mtu;
5175
John Fastabend16b61be2010-11-16 19:26:44 -08005176 hw->fc.high_water = FC_HIGH_WATER(max_frame);
5177 hw->fc.low_water = FC_LOW_WATER(max_frame);
5178
Ayyappan Veeraiyand4f80882008-02-01 15:58:41 -08005179 if (netif_running(netdev))
5180 ixgbe_reinit_locked(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005181
5182 return 0;
5183}
5184
5185/**
5186 * ixgbe_open - Called when a network interface is made active
5187 * @netdev: network interface device structure
5188 *
5189 * Returns 0 on success, negative value on failure
5190 *
5191 * The open entry point is called when a network interface is made
5192 * active by the system (IFF_UP). At this point all resources needed
5193 * for transmit and receive operations are allocated, the interrupt
5194 * handler is registered with the OS, the watchdog timer is started,
5195 * and the stack is notified that the interface is ready.
5196 **/
5197static int ixgbe_open(struct net_device *netdev)
5198{
5199 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5200 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07005201
Auke Kok4bebfaa2008-02-11 09:26:01 -08005202 /* disallow open during test */
5203 if (test_bit(__IXGBE_TESTING, &adapter->state))
5204 return -EBUSY;
5205
Jesse Brandeburg54386462009-04-17 20:44:27 +00005206 netif_carrier_off(netdev);
5207
Auke Kok9a799d72007-09-15 14:07:45 -07005208 /* allocate transmit descriptors */
5209 err = ixgbe_setup_all_tx_resources(adapter);
5210 if (err)
5211 goto err_setup_tx;
5212
Auke Kok9a799d72007-09-15 14:07:45 -07005213 /* allocate receive descriptors */
5214 err = ixgbe_setup_all_rx_resources(adapter);
5215 if (err)
5216 goto err_setup_rx;
5217
5218 ixgbe_configure(adapter);
5219
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08005220 err = ixgbe_request_irq(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005221 if (err)
5222 goto err_req_irq;
5223
Auke Kok9a799d72007-09-15 14:07:45 -07005224 err = ixgbe_up_complete(adapter);
5225 if (err)
5226 goto err_up;
5227
Jeff Kirsherd55b53f2008-07-18 04:33:03 -07005228 netif_tx_start_all_queues(netdev);
5229
Auke Kok9a799d72007-09-15 14:07:45 -07005230 return 0;
5231
5232err_up:
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08005233 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005234 ixgbe_free_irq(adapter);
5235err_req_irq:
Auke Kok9a799d72007-09-15 14:07:45 -07005236err_setup_rx:
Mallikarjuna R Chilakalaa20a1192009-03-31 21:34:44 +00005237 ixgbe_free_all_rx_resources(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005238err_setup_tx:
Mallikarjuna R Chilakalaa20a1192009-03-31 21:34:44 +00005239 ixgbe_free_all_tx_resources(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005240 ixgbe_reset(adapter);
5241
5242 return err;
5243}
5244
5245/**
5246 * ixgbe_close - Disables a network interface
5247 * @netdev: network interface device structure
5248 *
5249 * Returns 0, this is not allowed to fail
5250 *
5251 * The close entry point is called when an interface is de-activated
5252 * by the OS. The hardware is still under the drivers control, but
5253 * needs to be disabled. A global MAC reset is issued to stop the
5254 * hardware, and all transmit and receive resources are freed.
5255 **/
5256static int ixgbe_close(struct net_device *netdev)
5257{
5258 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005259
5260 ixgbe_down(adapter);
5261 ixgbe_free_irq(adapter);
5262
5263 ixgbe_free_all_tx_resources(adapter);
5264 ixgbe_free_all_rx_resources(adapter);
5265
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08005266 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07005267
5268 return 0;
5269}
5270
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005271#ifdef CONFIG_PM
5272static int ixgbe_resume(struct pci_dev *pdev)
5273{
5274 struct net_device *netdev = pci_get_drvdata(pdev);
5275 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5276 u32 err;
5277
5278 pci_set_power_state(pdev, PCI_D0);
5279 pci_restore_state(pdev);
Don Skidmore656ab812009-12-23 21:19:19 -08005280 /*
5281 * pci_restore_state clears dev->state_saved so call
5282 * pci_save_state to restore it.
5283 */
5284 pci_save_state(pdev);
gouji-new9ce77662009-05-06 10:44:45 +00005285
5286 err = pci_enable_device_mem(pdev);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005287 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00005288 e_dev_err("Cannot enable PCI device from suspend\n");
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005289 return err;
5290 }
5291 pci_set_master(pdev);
5292
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07005293 pci_wake_from_d3(pdev, false);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005294
5295 err = ixgbe_init_interrupt_scheme(adapter);
5296 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00005297 e_dev_err("Cannot initialize interrupts for device\n");
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005298 return err;
5299 }
5300
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005301 ixgbe_reset(adapter);
5302
Waskiewicz Jr, Peter P495dce12009-04-23 11:15:18 +00005303 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5304
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005305 if (netif_running(netdev)) {
5306 err = ixgbe_open(adapter->netdev);
5307 if (err)
5308 return err;
5309 }
5310
5311 netif_device_attach(netdev);
5312
5313 return 0;
5314}
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005315#endif /* CONFIG_PM */
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005316
5317static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005318{
5319 struct net_device *netdev = pci_get_drvdata(pdev);
5320 struct ixgbe_adapter *adapter = netdev_priv(netdev);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005321 struct ixgbe_hw *hw = &adapter->hw;
5322 u32 ctrl, fctrl;
5323 u32 wufc = adapter->wol;
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005324#ifdef CONFIG_PM
5325 int retval = 0;
5326#endif
5327
5328 netif_device_detach(netdev);
5329
5330 if (netif_running(netdev)) {
5331 ixgbe_down(adapter);
5332 ixgbe_free_irq(adapter);
5333 ixgbe_free_all_tx_resources(adapter);
5334 ixgbe_free_all_rx_resources(adapter);
5335 }
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005336
5337#ifdef CONFIG_PM
5338 retval = pci_save_state(pdev);
5339 if (retval)
5340 return retval;
Jesse Brandeburg4df10462009-03-13 22:15:31 +00005341
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005342#endif
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005343 if (wufc) {
5344 ixgbe_set_rx_mode(netdev);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005345
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005346 /* turn on all-multi mode if wake on multicast is enabled */
5347 if (wufc & IXGBE_WUFC_MC) {
5348 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5349 fctrl |= IXGBE_FCTRL_MPE;
5350 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5351 }
5352
5353 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5354 ctrl |= IXGBE_CTRL_GIO_DIS;
5355 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5356
5357 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5358 } else {
5359 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5360 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5361 }
5362
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07005363 if (wufc && hw->mac.type == ixgbe_mac_82599EB)
5364 pci_wake_from_d3(pdev, true);
5365 else
5366 pci_wake_from_d3(pdev, false);
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005367
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005368 *enable_wake = !!wufc;
5369
Andy Gospodarekfa378132010-06-29 18:28:12 +00005370 ixgbe_clear_interrupt_scheme(adapter);
5371
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005372 ixgbe_release_hw_control(adapter);
5373
5374 pci_disable_device(pdev);
5375
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005376 return 0;
5377}
5378
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005379#ifdef CONFIG_PM
5380static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5381{
5382 int retval;
5383 bool wake;
5384
5385 retval = __ixgbe_shutdown(pdev, &wake);
5386 if (retval)
5387 return retval;
5388
5389 if (wake) {
5390 pci_prepare_to_sleep(pdev);
5391 } else {
5392 pci_wake_from_d3(pdev, false);
5393 pci_set_power_state(pdev, PCI_D3hot);
5394 }
5395
5396 return 0;
5397}
5398#endif /* CONFIG_PM */
5399
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005400static void ixgbe_shutdown(struct pci_dev *pdev)
5401{
Rafael J. Wysocki9d8d05a2009-04-15 17:44:01 +00005402 bool wake;
5403
5404 __ixgbe_shutdown(pdev, &wake);
5405
5406 if (system_state == SYSTEM_POWER_OFF) {
5407 pci_wake_from_d3(pdev, wake);
5408 pci_set_power_state(pdev, PCI_D3hot);
5409 }
Alexander Duyckb3c8b4b2008-09-11 20:04:56 -07005410}
5411
5412/**
Auke Kok9a799d72007-09-15 14:07:45 -07005413 * ixgbe_update_stats - Update the board statistics counters.
5414 * @adapter: board private structure
5415 **/
5416void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5417{
Ajit Khaparde2d86f132009-10-07 02:43:49 +00005418 struct net_device *netdev = adapter->netdev;
Auke Kok9a799d72007-09-15 14:07:45 -07005419 struct ixgbe_hw *hw = &adapter->hw;
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005420 u64 total_mpc = 0;
5421 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00005422 u64 non_eop_descs = 0, restart_queue = 0;
Joe Perches7ca647b2010-09-07 21:35:40 +00005423 struct ixgbe_hw_stats *hwstats = &adapter->stats;
Auke Kok9a799d72007-09-15 14:07:45 -07005424
Don Skidmored08935c2010-06-11 13:20:29 +00005425 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5426 test_bit(__IXGBE_RESETTING, &adapter->state))
5427 return;
5428
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005429 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
Alexander Duyckf8212f92009-04-27 22:42:37 +00005430 u64 rsc_count = 0;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005431 u64 rsc_flush = 0;
PJ Waskiewiczd51019a2009-03-13 22:12:48 +00005432 for (i = 0; i < 16; i++)
5433 adapter->hw_rx_no_dma_resources +=
Joe Perches7ca647b2010-09-07 21:35:40 +00005434 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005435 for (i = 0; i < adapter->num_rx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005436 rsc_count += adapter->rx_ring[i]->rsc_count;
5437 rsc_flush += adapter->rx_ring[i]->rsc_flush;
Mallikarjuna R Chilakala94b982b2009-11-23 06:32:06 +00005438 }
5439 adapter->rsc_total_count = rsc_count;
5440 adapter->rsc_total_flush = rsc_flush;
PJ Waskiewiczd51019a2009-03-13 22:12:48 +00005441 }
5442
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00005443 /* gather some stats to the adapter struct that are per queue */
5444 for (i = 0; i < adapter->num_tx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005445 restart_queue += adapter->tx_ring[i]->restart_queue;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00005446 adapter->restart_queue = restart_queue;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00005447
5448 for (i = 0; i < adapter->num_rx_queues; i++)
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005449 non_eop_descs += adapter->rx_ring[i]->non_eop_descs;
Mallikarjuna R Chilakalaeb985f02009-12-15 11:56:59 +00005450 adapter->non_eop_descs = non_eop_descs;
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00005451
Joe Perches7ca647b2010-09-07 21:35:40 +00005452 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005453 for (i = 0; i < 8; i++) {
5454 /* for packet buffers not used, the register should read 0 */
5455 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5456 missed_rx += mpc;
Joe Perches7ca647b2010-09-07 21:35:40 +00005457 hwstats->mpc[i] += mpc;
5458 total_mpc += hwstats->mpc[i];
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005459 if (hw->mac.type == ixgbe_mac_82598EB)
Joe Perches7ca647b2010-09-07 21:35:40 +00005460 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5461 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5462 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5463 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5464 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005465 if (hw->mac.type == ixgbe_mac_82599EB) {
Joe Perches7ca647b2010-09-07 21:35:40 +00005466 hwstats->pxonrxc[i] +=
5467 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5468 hwstats->pxoffrxc[i] +=
5469 IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
5470 hwstats->qprdc[i] += IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005471 } else {
Joe Perches7ca647b2010-09-07 21:35:40 +00005472 hwstats->pxonrxc[i] +=
5473 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5474 hwstats->pxoffrxc[i] +=
5475 IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005476 }
Joe Perches7ca647b2010-09-07 21:35:40 +00005477 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5478 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005479 }
Joe Perches7ca647b2010-09-07 21:35:40 +00005480 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005481 /* work around hardware counting issue */
Joe Perches7ca647b2010-09-07 21:35:40 +00005482 hwstats->gprc -= missed_rx;
Auke Kok9a799d72007-09-15 14:07:45 -07005483
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005484 /* 82598 hardware only has a 32 bit counter in the high register */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005485 if (hw->mac.type == ixgbe_mac_82599EB) {
Ben Greearaad71912009-09-30 12:08:16 +00005486 u64 tmp;
Joe Perches7ca647b2010-09-07 21:35:40 +00005487 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
Joe Perchese8e9f692010-09-07 21:34:53 +00005488 tmp = IXGBE_READ_REG(hw, IXGBE_GORCH) & 0xF;
5489 /* 4 high bits of GORC */
Joe Perches7ca647b2010-09-07 21:35:40 +00005490 hwstats->gorc += (tmp << 32);
5491 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
Joe Perchese8e9f692010-09-07 21:34:53 +00005492 tmp = IXGBE_READ_REG(hw, IXGBE_GOTCH) & 0xF;
5493 /* 4 high bits of GOTC */
Joe Perches7ca647b2010-09-07 21:35:40 +00005494 hwstats->gotc += (tmp << 32);
5495 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
Joe Perchese8e9f692010-09-07 21:34:53 +00005496 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
Joe Perches7ca647b2010-09-07 21:35:40 +00005497 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5498 hwstats->lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
5499 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5500 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
Yi Zou6d455222009-05-13 13:12:16 +00005501#ifdef IXGBE_FCOE
Joe Perches7ca647b2010-09-07 21:35:40 +00005502 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5503 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5504 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5505 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5506 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5507 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
Yi Zou6d455222009-05-13 13:12:16 +00005508#endif /* IXGBE_FCOE */
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005509 } else {
Joe Perches7ca647b2010-09-07 21:35:40 +00005510 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5511 hwstats->lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
5512 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5513 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5514 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005515 }
Auke Kok9a799d72007-09-15 14:07:45 -07005516 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
Joe Perches7ca647b2010-09-07 21:35:40 +00005517 hwstats->bprc += bprc;
5518 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005519 if (hw->mac.type == ixgbe_mac_82598EB)
Joe Perches7ca647b2010-09-07 21:35:40 +00005520 hwstats->mprc -= bprc;
5521 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5522 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5523 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5524 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5525 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5526 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5527 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5528 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005529 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
Joe Perches7ca647b2010-09-07 21:35:40 +00005530 hwstats->lxontxc += lxon;
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005531 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
Joe Perches7ca647b2010-09-07 21:35:40 +00005532 hwstats->lxofftxc += lxoff;
5533 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5534 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5535 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
Ayyappan Veeraiyan6f11eef2008-02-01 15:59:14 -08005536 /*
5537 * 82598 errata - tx of flow control packets is included in tx counters
5538 */
5539 xon_off_tot = lxon + lxoff;
Joe Perches7ca647b2010-09-07 21:35:40 +00005540 hwstats->gptc -= xon_off_tot;
5541 hwstats->mptc -= xon_off_tot;
5542 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5543 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5544 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5545 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5546 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5547 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5548 hwstats->ptc64 -= xon_off_tot;
5549 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5550 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5551 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5552 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5553 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5554 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
Auke Kok9a799d72007-09-15 14:07:45 -07005555
5556 /* Fill out the OS statistics structure */
Joe Perches7ca647b2010-09-07 21:35:40 +00005557 netdev->stats.multicast = hwstats->mprc;
Auke Kok9a799d72007-09-15 14:07:45 -07005558
5559 /* Rx Errors */
Joe Perches7ca647b2010-09-07 21:35:40 +00005560 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
Ajit Khaparde2d86f132009-10-07 02:43:49 +00005561 netdev->stats.rx_dropped = 0;
Joe Perches7ca647b2010-09-07 21:35:40 +00005562 netdev->stats.rx_length_errors = hwstats->rlec;
5563 netdev->stats.rx_crc_errors = hwstats->crcerrs;
Ajit Khaparde2d86f132009-10-07 02:43:49 +00005564 netdev->stats.rx_missed_errors = total_mpc;
Auke Kok9a799d72007-09-15 14:07:45 -07005565}
5566
5567/**
5568 * ixgbe_watchdog - Timer Call-back
5569 * @data: pointer to adapter cast into an unsigned long
5570 **/
5571static void ixgbe_watchdog(unsigned long data)
5572{
5573 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005574 struct ixgbe_hw *hw = &adapter->hw;
Alexander Duyckfe49f042009-06-04 16:00:09 +00005575 u64 eics = 0;
5576 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07005577
Alexander Duyckfe49f042009-06-04 16:00:09 +00005578 /*
5579 * Do the watchdog outside of interrupt context due to the lovely
5580 * delays that some of the newer hardware requires
5581 */
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00005582
Alexander Duyckfe49f042009-06-04 16:00:09 +00005583 if (test_bit(__IXGBE_DOWN, &adapter->state))
5584 goto watchdog_short_circuit;
Jesse Brandeburg22d5a712009-03-19 01:24:04 +00005585
Alexander Duyckfe49f042009-06-04 16:00:09 +00005586 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5587 /*
5588 * for legacy and MSI interrupts don't set any bits
5589 * that are enabled for EIAM, because this operation
5590 * would set *both* EIMS and EICS for any bit in EIAM
5591 */
5592 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5593 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5594 goto watchdog_reschedule;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005595 }
5596
Alexander Duyckfe49f042009-06-04 16:00:09 +00005597 /* get one bit for every active tx/rx interrupt vector */
5598 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
5599 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5600 if (qv->rxr_count || qv->txr_count)
5601 eics |= ((u64)1 << i);
5602 }
5603
5604 /* Cause software interrupt to ensure rx rings are cleaned */
5605 ixgbe_irq_rearm_queues(adapter, eics);
5606
5607watchdog_reschedule:
5608 /* Reset the timer */
5609 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
5610
5611watchdog_short_circuit:
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005612 schedule_work(&adapter->watchdog_task);
5613}
5614
5615/**
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005616 * ixgbe_multispeed_fiber_task - worker thread to configure multispeed fiber
5617 * @work: pointer to work_struct containing our data
5618 **/
5619static void ixgbe_multispeed_fiber_task(struct work_struct *work)
5620{
5621 struct ixgbe_adapter *adapter = container_of(work,
Joe Perchese8e9f692010-09-07 21:34:53 +00005622 struct ixgbe_adapter,
5623 multispeed_fiber_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005624 struct ixgbe_hw *hw = &adapter->hw;
5625 u32 autoneg;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005626 bool negotiation;
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005627
5628 adapter->flags |= IXGBE_FLAG_IN_SFP_LINK_TASK;
Mallikarjuna R Chilakalaa1f25322009-06-30 11:44:36 +00005629 autoneg = hw->phy.autoneg_advertised;
5630 if ((!autoneg) && (hw->mac.ops.get_link_capabilities))
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005631 hw->mac.ops.get_link_capabilities(hw, &autoneg, &negotiation);
Mallikarjuna R Chilakala1097cd12010-03-18 14:34:52 +00005632 hw->mac.autotry_restart = false;
Mallikarjuna R Chilakala8620a102009-09-01 13:49:35 +00005633 if (hw->mac.ops.setup_link)
5634 hw->mac.ops.setup_link(hw, autoneg, negotiation, true);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005635 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
5636 adapter->flags &= ~IXGBE_FLAG_IN_SFP_LINK_TASK;
5637}
5638
5639/**
5640 * ixgbe_sfp_config_module_task - worker thread to configure a new SFP+ module
5641 * @work: pointer to work_struct containing our data
5642 **/
5643static void ixgbe_sfp_config_module_task(struct work_struct *work)
5644{
5645 struct ixgbe_adapter *adapter = container_of(work,
Joe Perchese8e9f692010-09-07 21:34:53 +00005646 struct ixgbe_adapter,
5647 sfp_config_module_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005648 struct ixgbe_hw *hw = &adapter->hw;
5649 u32 err;
5650
5651 adapter->flags |= IXGBE_FLAG_IN_SFP_MOD_TASK;
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005652
5653 /* Time for electrical oscillations to settle down */
5654 msleep(100);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005655 err = hw->phy.ops.identify_sfp(hw);
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005656
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005657 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Emil Tantilov849c4542010-06-03 16:53:41 +00005658 e_dev_err("failed to initialize because an unsupported SFP+ "
5659 "module type was detected.\n");
5660 e_dev_err("Reload the driver after installing a supported "
5661 "module.\n");
Don Skidmore63d6e1d2009-07-02 12:50:12 +00005662 unregister_netdev(adapter->netdev);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005663 return;
5664 }
5665 hw->mac.ops.setup_sfp(hw);
5666
Tony Breeds8d1c3c02009-04-09 22:29:10 +00005667 if (!(adapter->flags & IXGBE_FLAG_IN_SFP_LINK_TASK))
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005668 /* This will also work for DA Twinax connections */
5669 schedule_work(&adapter->multispeed_fiber_task);
5670 adapter->flags &= ~IXGBE_FLAG_IN_SFP_MOD_TASK;
5671}
5672
5673/**
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005674 * ixgbe_fdir_reinit_task - worker thread to reinit FDIR filter table
5675 * @work: pointer to work_struct containing our data
5676 **/
5677static void ixgbe_fdir_reinit_task(struct work_struct *work)
5678{
5679 struct ixgbe_adapter *adapter = container_of(work,
Joe Perchese8e9f692010-09-07 21:34:53 +00005680 struct ixgbe_adapter,
5681 fdir_reinit_task);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005682 struct ixgbe_hw *hw = &adapter->hw;
5683 int i;
5684
5685 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5686 for (i = 0; i < adapter->num_tx_queues; i++)
5687 set_bit(__IXGBE_FDIR_INIT_DONE,
Joe Perchese8e9f692010-09-07 21:34:53 +00005688 &(adapter->tx_ring[i]->reinit_state));
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005689 } else {
Emil Tantilov396e7992010-07-01 20:05:12 +00005690 e_err(probe, "failed to finish FDIR re-initialization, "
Emil Tantilov849c4542010-06-03 16:53:41 +00005691 "ignored adding FDIR ATR filters\n");
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005692 }
5693 /* Done FDIR Re-initialization, enable transmits */
5694 netif_tx_start_all_queues(adapter->netdev);
5695}
5696
John Fastabend10eec952010-02-03 14:23:32 +00005697static DEFINE_MUTEX(ixgbe_watchdog_lock);
5698
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00005699/**
Alexander Duyck69888672008-09-11 20:05:39 -07005700 * ixgbe_watchdog_task - worker thread to bring link up
5701 * @work: pointer to work_struct containing our data
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005702 **/
5703static void ixgbe_watchdog_task(struct work_struct *work)
5704{
5705 struct ixgbe_adapter *adapter = container_of(work,
Joe Perchese8e9f692010-09-07 21:34:53 +00005706 struct ixgbe_adapter,
5707 watchdog_task);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005708 struct net_device *netdev = adapter->netdev;
5709 struct ixgbe_hw *hw = &adapter->hw;
John Fastabend10eec952010-02-03 14:23:32 +00005710 u32 link_speed;
5711 bool link_up;
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005712 int i;
5713 struct ixgbe_ring *tx_ring;
5714 int some_tx_pending = 0;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005715
John Fastabend10eec952010-02-03 14:23:32 +00005716 mutex_lock(&ixgbe_watchdog_lock);
5717
5718 link_up = adapter->link_up;
5719 link_speed = adapter->link_speed;
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005720
5721 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE) {
5722 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005723 if (link_up) {
5724#ifdef CONFIG_DCB
5725 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5726 for (i = 0; i < MAX_TRAFFIC_CLASS; i++)
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005727 hw->mac.ops.fc_enable(hw, i);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005728 } else {
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005729 hw->mac.ops.fc_enable(hw, 0);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005730 }
5731#else
Mallikarjuna R Chilakala620fa032009-06-04 11:11:13 +00005732 hw->mac.ops.fc_enable(hw, 0);
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005733#endif
5734 }
5735
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005736 if (link_up ||
5737 time_after(jiffies, (adapter->link_check_timeout +
Joe Perchese8e9f692010-09-07 21:34:53 +00005738 IXGBE_TRY_LINK_TIMEOUT))) {
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005739 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
Peter P Waskiewicz Jr264857b2009-05-17 12:35:16 +00005740 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005741 }
5742 adapter->link_up = link_up;
5743 adapter->link_speed = link_speed;
5744 }
Auke Kok9a799d72007-09-15 14:07:45 -07005745
5746 if (link_up) {
5747 if (!netif_carrier_ok(netdev)) {
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005748 bool flow_rx, flow_tx;
5749
5750 if (hw->mac.type == ixgbe_mac_82599EB) {
5751 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
5752 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
Peter P Waskiewicz Jr078788b2009-07-16 15:50:32 +00005753 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
5754 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005755 } else {
5756 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5757 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
Peter P Waskiewicz Jr078788b2009-07-16 15:50:32 +00005758 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
5759 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005760 }
5761
Emil Tantilov396e7992010-07-01 20:05:12 +00005762 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
Jeff Kirshera46e5342008-11-27 00:22:21 -08005763 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
Emil Tantilov849c4542010-06-03 16:53:41 +00005764 "10 Gbps" :
5765 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
5766 "1 Gbps" : "unknown speed")),
PJ Waskiewicze8e26352009-02-27 15:45:05 +00005767 ((flow_rx && flow_tx) ? "RX/TX" :
Emil Tantilov849c4542010-06-03 16:53:41 +00005768 (flow_rx ? "RX" :
5769 (flow_tx ? "TX" : "None"))));
Auke Kok9a799d72007-09-15 14:07:45 -07005770
5771 netif_carrier_on(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005772 } else {
5773 /* Force detection of hung controller */
5774 adapter->detect_tx_hung = true;
5775 }
5776 } else {
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07005777 adapter->link_up = false;
5778 adapter->link_speed = 0;
Auke Kok9a799d72007-09-15 14:07:45 -07005779 if (netif_carrier_ok(netdev)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00005780 e_info(drv, "NIC Link is Down\n");
Auke Kok9a799d72007-09-15 14:07:45 -07005781 netif_carrier_off(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07005782 }
5783 }
5784
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005785 if (!netif_carrier_ok(netdev)) {
5786 for (i = 0; i < adapter->num_tx_queues; i++) {
PJ Waskiewicz4a0b9ca2010-02-03 14:19:12 +00005787 tx_ring = adapter->tx_ring[i];
Nelson, Shannonbc59fcd2009-04-27 22:43:12 +00005788 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
5789 some_tx_pending = 1;
5790 break;
5791 }
5792 }
5793
5794 if (some_tx_pending) {
5795 /* We've lost link, so the controller stops DMA,
5796 * but we've got queued Tx work that's never going
5797 * to get done, so reset controller to flush Tx.
5798 * (Do the reset outside of interrupt context).
5799 */
5800 schedule_work(&adapter->reset_task);
5801 }
5802 }
5803
Auke Kok9a799d72007-09-15 14:07:45 -07005804 ixgbe_update_stats(adapter);
John Fastabend10eec952010-02-03 14:23:32 +00005805 mutex_unlock(&ixgbe_watchdog_lock);
Auke Kok9a799d72007-09-15 14:07:45 -07005806}
5807
Auke Kok9a799d72007-09-15 14:07:45 -07005808static int ixgbe_tso(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00005809 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
Hao Zheng5e09a102010-11-11 13:47:59 +00005810 u32 tx_flags, u8 *hdr_len, __be16 protocol)
Auke Kok9a799d72007-09-15 14:07:45 -07005811{
5812 struct ixgbe_adv_tx_context_desc *context_desc;
5813 unsigned int i;
5814 int err;
5815 struct ixgbe_tx_buffer *tx_buffer_info;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005816 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
5817 u32 mss_l4len_idx, l4len;
Auke Kok9a799d72007-09-15 14:07:45 -07005818
5819 if (skb_is_gso(skb)) {
5820 if (skb_header_cloned(skb)) {
5821 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5822 if (err)
5823 return err;
5824 }
5825 l4len = tcp_hdrlen(skb);
5826 *hdr_len += l4len;
5827
Hao Zheng5e09a102010-11-11 13:47:59 +00005828 if (protocol == htons(ETH_P_IP)) {
Auke Kok9a799d72007-09-15 14:07:45 -07005829 struct iphdr *iph = ip_hdr(skb);
5830 iph->tot_len = 0;
5831 iph->check = 0;
5832 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
Joe Perchese8e9f692010-09-07 21:34:53 +00005833 iph->daddr, 0,
5834 IPPROTO_TCP,
5835 0);
Sridhar Samudrala8e1e8a42010-01-23 02:02:21 -08005836 } else if (skb_is_gso_v6(skb)) {
Auke Kok9a799d72007-09-15 14:07:45 -07005837 ipv6_hdr(skb)->payload_len = 0;
5838 tcp_hdr(skb)->check =
5839 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
Joe Perchese8e9f692010-09-07 21:34:53 +00005840 &ipv6_hdr(skb)->daddr,
5841 0, IPPROTO_TCP, 0);
Auke Kok9a799d72007-09-15 14:07:45 -07005842 }
5843
5844 i = tx_ring->next_to_use;
5845
5846 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck31f05a22010-08-19 13:40:31 +00005847 context_desc = IXGBE_TX_CTXTDESC_ADV(tx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -07005848
5849 /* VLAN MACLEN IPLEN */
5850 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5851 vlan_macip_lens |=
5852 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
5853 vlan_macip_lens |= ((skb_network_offset(skb)) <<
Joe Perchese8e9f692010-09-07 21:34:53 +00005854 IXGBE_ADVTXD_MACLEN_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005855 *hdr_len += skb_network_offset(skb);
5856 vlan_macip_lens |=
5857 (skb_transport_header(skb) - skb_network_header(skb));
5858 *hdr_len +=
5859 (skb_transport_header(skb) - skb_network_header(skb));
5860 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5861 context_desc->seqnum_seed = 0;
5862
5863 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005864 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
Joe Perchese8e9f692010-09-07 21:34:53 +00005865 IXGBE_ADVTXD_DTYP_CTXT);
Auke Kok9a799d72007-09-15 14:07:45 -07005866
Hao Zheng5e09a102010-11-11 13:47:59 +00005867 if (protocol == htons(ETH_P_IP))
Auke Kok9a799d72007-09-15 14:07:45 -07005868 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
5869 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5870 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
5871
5872 /* MSS L4LEN IDX */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005873 mss_l4len_idx =
Auke Kok9a799d72007-09-15 14:07:45 -07005874 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
5875 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07005876 /* use index 1 for TSO */
5877 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005878 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5879
5880 tx_buffer_info->time_stamp = jiffies;
5881 tx_buffer_info->next_to_watch = i;
5882
5883 i++;
5884 if (i == tx_ring->count)
5885 i = 0;
5886 tx_ring->next_to_use = i;
5887
5888 return true;
5889 }
5890 return false;
5891}
5892
Hao Zheng5e09a102010-11-11 13:47:59 +00005893static u32 ixgbe_psum(struct ixgbe_adapter *adapter, struct sk_buff *skb,
5894 __be16 protocol)
Joe Perches7ca647b2010-09-07 21:35:40 +00005895{
5896 u32 rtn = 0;
Joe Perches7ca647b2010-09-07 21:35:40 +00005897
5898 switch (protocol) {
5899 case cpu_to_be16(ETH_P_IP):
5900 rtn |= IXGBE_ADVTXD_TUCMD_IPV4;
5901 switch (ip_hdr(skb)->protocol) {
5902 case IPPROTO_TCP:
5903 rtn |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5904 break;
5905 case IPPROTO_SCTP:
5906 rtn |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
5907 break;
5908 }
5909 break;
5910 case cpu_to_be16(ETH_P_IPV6):
5911 /* XXX what about other V6 headers?? */
5912 switch (ipv6_hdr(skb)->nexthdr) {
5913 case IPPROTO_TCP:
5914 rtn |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
5915 break;
5916 case IPPROTO_SCTP:
5917 rtn |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
5918 break;
5919 }
5920 break;
5921 default:
5922 if (unlikely(net_ratelimit()))
5923 e_warn(probe, "partial checksum but proto=%x!\n",
Hao Zheng5e09a102010-11-11 13:47:59 +00005924 protocol);
Joe Perches7ca647b2010-09-07 21:35:40 +00005925 break;
5926 }
5927
5928 return rtn;
5929}
5930
Auke Kok9a799d72007-09-15 14:07:45 -07005931static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00005932 struct ixgbe_ring *tx_ring,
Hao Zheng5e09a102010-11-11 13:47:59 +00005933 struct sk_buff *skb, u32 tx_flags,
5934 __be16 protocol)
Auke Kok9a799d72007-09-15 14:07:45 -07005935{
5936 struct ixgbe_adv_tx_context_desc *context_desc;
5937 unsigned int i;
5938 struct ixgbe_tx_buffer *tx_buffer_info;
5939 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
5940
5941 if (skb->ip_summed == CHECKSUM_PARTIAL ||
5942 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
5943 i = tx_ring->next_to_use;
5944 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck31f05a22010-08-19 13:40:31 +00005945 context_desc = IXGBE_TX_CTXTDESC_ADV(tx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -07005946
5947 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
5948 vlan_macip_lens |=
5949 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
5950 vlan_macip_lens |= (skb_network_offset(skb) <<
Joe Perchese8e9f692010-09-07 21:34:53 +00005951 IXGBE_ADVTXD_MACLEN_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07005952 if (skb->ip_summed == CHECKSUM_PARTIAL)
5953 vlan_macip_lens |= (skb_transport_header(skb) -
Joe Perchese8e9f692010-09-07 21:34:53 +00005954 skb_network_header(skb));
Auke Kok9a799d72007-09-15 14:07:45 -07005955
5956 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5957 context_desc->seqnum_seed = 0;
5958
5959 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
Joe Perchese8e9f692010-09-07 21:34:53 +00005960 IXGBE_ADVTXD_DTYP_CTXT);
Auke Kok9a799d72007-09-15 14:07:45 -07005961
Joe Perches7ca647b2010-09-07 21:35:40 +00005962 if (skb->ip_summed == CHECKSUM_PARTIAL)
Hao Zheng5e09a102010-11-11 13:47:59 +00005963 type_tucmd_mlhl |= ixgbe_psum(adapter, skb, protocol);
Auke Kok9a799d72007-09-15 14:07:45 -07005964
5965 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07005966 /* use index zero for tx checksum offload */
Auke Kok9a799d72007-09-15 14:07:45 -07005967 context_desc->mss_l4len_idx = 0;
5968
5969 tx_buffer_info->time_stamp = jiffies;
5970 tx_buffer_info->next_to_watch = i;
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005971
Auke Kok9a799d72007-09-15 14:07:45 -07005972 i++;
5973 if (i == tx_ring->count)
5974 i = 0;
5975 tx_ring->next_to_use = i;
5976
5977 return true;
5978 }
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07005979
Auke Kok9a799d72007-09-15 14:07:45 -07005980 return false;
5981}
5982
5983static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
Joe Perchese8e9f692010-09-07 21:34:53 +00005984 struct ixgbe_ring *tx_ring,
5985 struct sk_buff *skb, u32 tx_flags,
Alexander Duyck8ad494b2010-11-16 19:26:47 -08005986 unsigned int first, const u8 hdr_len)
Auke Kok9a799d72007-09-15 14:07:45 -07005987{
Alexander Duycke5a43542009-12-02 16:46:56 +00005988 struct pci_dev *pdev = adapter->pdev;
Auke Kok9a799d72007-09-15 14:07:45 -07005989 struct ixgbe_tx_buffer *tx_buffer_info;
Yi Zoueacd73f2009-05-13 13:11:06 +00005990 unsigned int len;
5991 unsigned int total = skb->len;
Auke Kok9a799d72007-09-15 14:07:45 -07005992 unsigned int offset = 0, size, count = 0, i;
5993 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
5994 unsigned int f;
Alexander Duyck8ad494b2010-11-16 19:26:47 -08005995 unsigned int bytecount = skb->len;
5996 u16 gso_segs = 1;
Auke Kok9a799d72007-09-15 14:07:45 -07005997
5998 i = tx_ring->next_to_use;
5999
Yi Zoueacd73f2009-05-13 13:11:06 +00006000 if (tx_flags & IXGBE_TX_FLAGS_FCOE)
6001 /* excluding fcoe_crc_eof for FCoE */
6002 total -= sizeof(struct fcoe_crc_eof);
6003
6004 len = min(skb_headlen(skb), total);
Auke Kok9a799d72007-09-15 14:07:45 -07006005 while (len) {
6006 tx_buffer_info = &tx_ring->tx_buffer_info[i];
6007 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
6008
6009 tx_buffer_info->length = size;
Alexander Duycke5a43542009-12-02 16:46:56 +00006010 tx_buffer_info->mapped_as_page = false;
Nick Nunley1b507732010-04-27 13:10:27 +00006011 tx_buffer_info->dma = dma_map_single(&pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +00006012 skb->data + offset,
Nick Nunley1b507732010-04-27 13:10:27 +00006013 size, DMA_TO_DEVICE);
6014 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
Alexander Duycke5a43542009-12-02 16:46:56 +00006015 goto dma_error;
Auke Kok9a799d72007-09-15 14:07:45 -07006016 tx_buffer_info->time_stamp = jiffies;
6017 tx_buffer_info->next_to_watch = i;
6018
6019 len -= size;
Yi Zoueacd73f2009-05-13 13:11:06 +00006020 total -= size;
Auke Kok9a799d72007-09-15 14:07:45 -07006021 offset += size;
6022 count++;
Alexander Duyck44df32c2009-03-31 21:34:23 +00006023
6024 if (len) {
6025 i++;
6026 if (i == tx_ring->count)
6027 i = 0;
6028 }
Auke Kok9a799d72007-09-15 14:07:45 -07006029 }
6030
6031 for (f = 0; f < nr_frags; f++) {
6032 struct skb_frag_struct *frag;
6033
6034 frag = &skb_shinfo(skb)->frags[f];
Yi Zoueacd73f2009-05-13 13:11:06 +00006035 len = min((unsigned int)frag->size, total);
Alexander Duycke5a43542009-12-02 16:46:56 +00006036 offset = frag->page_offset;
Auke Kok9a799d72007-09-15 14:07:45 -07006037
6038 while (len) {
Alexander Duyck44df32c2009-03-31 21:34:23 +00006039 i++;
6040 if (i == tx_ring->count)
6041 i = 0;
6042
Auke Kok9a799d72007-09-15 14:07:45 -07006043 tx_buffer_info = &tx_ring->tx_buffer_info[i];
6044 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
6045
6046 tx_buffer_info->length = size;
Nick Nunley1b507732010-04-27 13:10:27 +00006047 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
Alexander Duycke5a43542009-12-02 16:46:56 +00006048 frag->page,
6049 offset, size,
Nick Nunley1b507732010-04-27 13:10:27 +00006050 DMA_TO_DEVICE);
Alexander Duycke5a43542009-12-02 16:46:56 +00006051 tx_buffer_info->mapped_as_page = true;
Nick Nunley1b507732010-04-27 13:10:27 +00006052 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
Alexander Duycke5a43542009-12-02 16:46:56 +00006053 goto dma_error;
Auke Kok9a799d72007-09-15 14:07:45 -07006054 tx_buffer_info->time_stamp = jiffies;
6055 tx_buffer_info->next_to_watch = i;
6056
6057 len -= size;
Yi Zoueacd73f2009-05-13 13:11:06 +00006058 total -= size;
Auke Kok9a799d72007-09-15 14:07:45 -07006059 offset += size;
6060 count++;
Auke Kok9a799d72007-09-15 14:07:45 -07006061 }
Yi Zoueacd73f2009-05-13 13:11:06 +00006062 if (total == 0)
6063 break;
Auke Kok9a799d72007-09-15 14:07:45 -07006064 }
Alexander Duyck44df32c2009-03-31 21:34:23 +00006065
Alexander Duyck8ad494b2010-11-16 19:26:47 -08006066 if (tx_flags & IXGBE_TX_FLAGS_TSO)
6067 gso_segs = skb_shinfo(skb)->gso_segs;
6068#ifdef IXGBE_FCOE
6069 /* adjust for FCoE Sequence Offload */
6070 else if (tx_flags & IXGBE_TX_FLAGS_FSO)
6071 gso_segs = DIV_ROUND_UP(skb->len - hdr_len,
6072 skb_shinfo(skb)->gso_size);
6073#endif /* IXGBE_FCOE */
6074 bytecount += (gso_segs - 1) * hdr_len;
6075
6076 /* multiply data chunks by size of headers */
6077 tx_ring->tx_buffer_info[i].bytecount = bytecount;
6078 tx_ring->tx_buffer_info[i].gso_segs = gso_segs;
Auke Kok9a799d72007-09-15 14:07:45 -07006079 tx_ring->tx_buffer_info[i].skb = skb;
6080 tx_ring->tx_buffer_info[first].next_to_watch = i;
6081
6082 return count;
Alexander Duycke5a43542009-12-02 16:46:56 +00006083
6084dma_error:
Emil Tantilov849c4542010-06-03 16:53:41 +00006085 e_dev_err("TX DMA map failed\n");
Alexander Duycke5a43542009-12-02 16:46:56 +00006086
6087 /* clear timestamp and dma mappings for failed tx_buffer_info map */
6088 tx_buffer_info->dma = 0;
6089 tx_buffer_info->time_stamp = 0;
6090 tx_buffer_info->next_to_watch = 0;
Roel Kluinc1fa3472010-01-19 14:21:45 +00006091 if (count)
6092 count--;
Alexander Duycke5a43542009-12-02 16:46:56 +00006093
6094 /* clear timestamp and dma mappings for remaining portion of packet */
Roel Kluinc1fa3472010-01-19 14:21:45 +00006095 while (count--) {
Joe Perchese8e9f692010-09-07 21:34:53 +00006096 if (i == 0)
Alexander Duycke5a43542009-12-02 16:46:56 +00006097 i += tx_ring->count;
Roel Kluinc1fa3472010-01-19 14:21:45 +00006098 i--;
Alexander Duycke5a43542009-12-02 16:46:56 +00006099 tx_buffer_info = &tx_ring->tx_buffer_info[i];
6100 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
6101 }
6102
Anton Blancharde44d38e2010-02-03 13:12:51 +00006103 return 0;
Auke Kok9a799d72007-09-15 14:07:45 -07006104}
6105
Alexander Duyck84ea2592010-11-16 19:26:49 -08006106static void ixgbe_tx_queue(struct ixgbe_ring *tx_ring,
Joe Perchese8e9f692010-09-07 21:34:53 +00006107 int tx_flags, int count, u32 paylen, u8 hdr_len)
Auke Kok9a799d72007-09-15 14:07:45 -07006108{
6109 union ixgbe_adv_tx_desc *tx_desc = NULL;
6110 struct ixgbe_tx_buffer *tx_buffer_info;
6111 u32 olinfo_status = 0, cmd_type_len = 0;
6112 unsigned int i;
6113 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
6114
6115 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
6116
6117 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
6118
6119 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
6120 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
6121
6122 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
6123 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
6124
6125 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
Joe Perchese8e9f692010-09-07 21:34:53 +00006126 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07006127
PJ Waskiewicz4eeae6f2008-08-26 04:27:30 -07006128 /* use index 1 context for tso */
6129 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
Auke Kok9a799d72007-09-15 14:07:45 -07006130 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
6131 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
Joe Perchese8e9f692010-09-07 21:34:53 +00006132 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07006133
6134 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
6135 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
Joe Perchese8e9f692010-09-07 21:34:53 +00006136 IXGBE_ADVTXD_POPTS_SHIFT;
Auke Kok9a799d72007-09-15 14:07:45 -07006137
Yi Zoueacd73f2009-05-13 13:11:06 +00006138 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6139 olinfo_status |= IXGBE_ADVTXD_CC;
6140 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
6141 if (tx_flags & IXGBE_TX_FLAGS_FSO)
6142 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
6143 }
6144
Auke Kok9a799d72007-09-15 14:07:45 -07006145 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
6146
6147 i = tx_ring->next_to_use;
6148 while (count--) {
6149 tx_buffer_info = &tx_ring->tx_buffer_info[i];
Alexander Duyck31f05a22010-08-19 13:40:31 +00006150 tx_desc = IXGBE_TX_DESC_ADV(tx_ring, i);
Auke Kok9a799d72007-09-15 14:07:45 -07006151 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
6152 tx_desc->read.cmd_type_len =
Joe Perchese8e9f692010-09-07 21:34:53 +00006153 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
Auke Kok9a799d72007-09-15 14:07:45 -07006154 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
Auke Kok9a799d72007-09-15 14:07:45 -07006155 i++;
6156 if (i == tx_ring->count)
6157 i = 0;
6158 }
6159
6160 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
6161
6162 /*
6163 * Force memory writes to complete before letting h/w
6164 * know there are new descriptors to fetch. (Only
6165 * applicable for weak-ordered memory model archs,
6166 * such as IA-64).
6167 */
6168 wmb();
6169
6170 tx_ring->next_to_use = i;
Alexander Duyck84ea2592010-11-16 19:26:49 -08006171 writel(i, tx_ring->tail);
Auke Kok9a799d72007-09-15 14:07:45 -07006172}
6173
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006174static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb,
Hao Zheng5e09a102010-11-11 13:47:59 +00006175 int queue, u32 tx_flags, __be16 protocol)
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006176{
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006177 struct ixgbe_atr_input atr_input;
6178 struct tcphdr *th;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006179 struct iphdr *iph = ip_hdr(skb);
6180 struct ethhdr *eth = (struct ethhdr *)skb->data;
6181 u16 vlan_id, src_port, dst_port, flex_bytes;
6182 u32 src_ipv4_addr, dst_ipv4_addr;
6183 u8 l4type = 0;
6184
Guillaume Gaudonvilled3ead242010-06-29 18:29:00 +00006185 /* Right now, we support IPv4 only */
Hao Zheng5e09a102010-11-11 13:47:59 +00006186 if (protocol != htons(ETH_P_IP))
Guillaume Gaudonvilled3ead242010-06-29 18:29:00 +00006187 return;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006188 /* check if we're UDP or TCP */
6189 if (iph->protocol == IPPROTO_TCP) {
6190 th = tcp_hdr(skb);
6191 src_port = th->source;
6192 dst_port = th->dest;
6193 l4type |= IXGBE_ATR_L4TYPE_TCP;
6194 /* l4type IPv4 type is 0, no need to assign */
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006195 } else {
6196 /* Unsupported L4 header, just bail here */
6197 return;
6198 }
6199
6200 memset(&atr_input, 0, sizeof(struct ixgbe_atr_input));
6201
6202 vlan_id = (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK) >>
Joe Perchese8e9f692010-09-07 21:34:53 +00006203 IXGBE_TX_FLAGS_VLAN_SHIFT;
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006204 src_ipv4_addr = iph->saddr;
6205 dst_ipv4_addr = iph->daddr;
6206 flex_bytes = eth->h_proto;
6207
6208 ixgbe_atr_set_vlan_id_82599(&atr_input, vlan_id);
6209 ixgbe_atr_set_src_port_82599(&atr_input, dst_port);
6210 ixgbe_atr_set_dst_port_82599(&atr_input, src_port);
6211 ixgbe_atr_set_flex_byte_82599(&atr_input, flex_bytes);
6212 ixgbe_atr_set_l4type_82599(&atr_input, l4type);
6213 /* src and dst are inverted, think how the receiver sees them */
6214 ixgbe_atr_set_src_ipv4_82599(&atr_input, dst_ipv4_addr);
6215 ixgbe_atr_set_dst_ipv4_82599(&atr_input, src_ipv4_addr);
6216
6217 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6218 ixgbe_fdir_add_signature_filter_82599(&adapter->hw, &atr_input, queue);
6219}
6220
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006221static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
Joe Perchese8e9f692010-09-07 21:34:53 +00006222 struct ixgbe_ring *tx_ring, int size)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006223{
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -08006224 netif_stop_subqueue(netdev, tx_ring->queue_index);
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006225 /* Herbert's original patch had:
6226 * smp_mb__after_netif_stop_queue();
6227 * but since that doesn't exist yet, just open code it. */
6228 smp_mb();
6229
6230 /* We need to check again in a case another CPU has just
6231 * made room available. */
6232 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
6233 return -EBUSY;
6234
6235 /* A reprieve! - use start_queue because it doesn't call schedule */
Jesse Brandeburgaf721662008-09-11 19:54:23 -07006236 netif_start_subqueue(netdev, tx_ring->queue_index);
Jesse Brandeburg7ca3bc52009-12-03 11:33:29 +00006237 ++tx_ring->restart_queue;
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006238 return 0;
6239}
6240
6241static int ixgbe_maybe_stop_tx(struct net_device *netdev,
Joe Perchese8e9f692010-09-07 21:34:53 +00006242 struct ixgbe_ring *tx_ring, int size)
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006243{
6244 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
6245 return 0;
6246 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
6247}
6248
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07006249static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb)
6250{
6251 struct ixgbe_adapter *adapter = netdev_priv(dev);
Yi Zou5f715822009-12-03 11:32:44 +00006252 int txq = smp_processor_id();
John Fastabend56075a92010-07-26 20:41:31 +00006253#ifdef IXGBE_FCOE
Hao Zheng5e09a102010-11-11 13:47:59 +00006254 __be16 protocol;
6255
6256 protocol = vlan_get_protocol(skb);
6257
6258 if ((protocol == htons(ETH_P_FCOE)) ||
6259 (protocol == htons(ETH_P_FIP))) {
John Fastabend56075a92010-07-26 20:41:31 +00006260 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
6261 txq &= (adapter->ring_feature[RING_F_FCOE].indices - 1);
6262 txq += adapter->ring_feature[RING_F_FCOE].mask;
6263 return txq;
John Fastabend4bc091d2010-08-08 15:46:15 +00006264#ifdef CONFIG_IXGBE_DCB
John Fastabend56075a92010-07-26 20:41:31 +00006265 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6266 txq = adapter->fcoe.up;
6267 return txq;
John Fastabend4bc091d2010-08-08 15:46:15 +00006268#endif
John Fastabend56075a92010-07-26 20:41:31 +00006269 }
6270 }
6271#endif
6272
Krishna Kumarfdd3d632010-02-03 13:13:10 +00006273 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
6274 while (unlikely(txq >= dev->real_num_tx_queues))
6275 txq -= dev->real_num_tx_queues;
Yi Zou5f715822009-12-03 11:32:44 +00006276 return txq;
Krishna Kumarfdd3d632010-02-03 13:13:10 +00006277 }
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006278
John Fastabend2ea186a2010-02-27 03:28:24 -08006279 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6280 if (skb->priority == TC_PRIO_CONTROL)
6281 txq = adapter->ring_feature[RING_F_DCB].indices-1;
6282 else
6283 txq = (skb->vlan_tci & IXGBE_TX_FLAGS_VLAN_PRIO_MASK)
6284 >> 13;
6285 return txq;
6286 }
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07006287
6288 return skb_tx_hash(dev, skb);
6289}
6290
Alexander Duyck84418e32010-08-19 13:40:54 +00006291netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, struct net_device *netdev,
6292 struct ixgbe_adapter *adapter,
6293 struct ixgbe_ring *tx_ring)
Auke Kok9a799d72007-09-15 14:07:45 -07006294{
Eric Dumazet60d51132009-12-08 07:22:03 +00006295 struct netdev_queue *txq;
Auke Kok9a799d72007-09-15 14:07:45 -07006296 unsigned int first;
6297 unsigned int tx_flags = 0;
Ayyappan Veeraiyan30eba972008-03-03 15:03:52 -08006298 u8 hdr_len = 0;
Yi Zou5f715822009-12-03 11:32:44 +00006299 int tso;
Auke Kok9a799d72007-09-15 14:07:45 -07006300 int count = 0;
6301 unsigned int f;
Hao Zheng5e09a102010-11-11 13:47:59 +00006302 __be16 protocol;
6303
6304 protocol = vlan_get_protocol(skb);
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006305
Jesse Grosseab6d182010-10-20 13:56:03 +00006306 if (vlan_tx_tag_present(skb)) {
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006307 tx_flags |= vlan_tx_tag_get(skb);
Alexander Duyck2f90b862008-11-20 20:52:10 -08006308 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6309 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
Yi Zou5f715822009-12-03 11:32:44 +00006310 tx_flags |= ((skb->queue_mapping & 0x7) << 13);
Alexander Duyck2f90b862008-11-20 20:52:10 -08006311 }
6312 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
6313 tx_flags |= IXGBE_TX_FLAGS_VLAN;
John Fastabend33c66bd2010-05-18 16:00:11 +00006314 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED &&
6315 skb->priority != TC_PRIO_CONTROL) {
John Fastabend2ea186a2010-02-27 03:28:24 -08006316 tx_flags |= ((skb->queue_mapping & 0x7) << 13);
6317 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
6318 tx_flags |= IXGBE_TX_FLAGS_VLAN;
Auke Kok9a799d72007-09-15 14:07:45 -07006319 }
Yi Zoueacd73f2009-05-13 13:11:06 +00006320
Yi Zou09ad1cc2009-09-03 14:56:10 +00006321#ifdef IXGBE_FCOE
John Fastabend56075a92010-07-26 20:41:31 +00006322 /* for FCoE with DCB, we force the priority to what
6323 * was specified by the switch */
6324 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED &&
Hao Zheng5e09a102010-11-11 13:47:59 +00006325 (protocol == htons(ETH_P_FCOE) ||
6326 protocol == htons(ETH_P_FIP))) {
John Fastabend4bc091d2010-08-08 15:46:15 +00006327#ifdef CONFIG_IXGBE_DCB
6328 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
6329 tx_flags &= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK
6330 << IXGBE_TX_FLAGS_VLAN_SHIFT);
6331 tx_flags |= ((adapter->fcoe.up << 13)
6332 << IXGBE_TX_FLAGS_VLAN_SHIFT);
6333 }
6334#endif
Robert Loveca77cd52010-03-24 12:45:00 +00006335 /* flag for FCoE offloads */
Hao Zheng5e09a102010-11-11 13:47:59 +00006336 if (protocol == htons(ETH_P_FCOE))
Robert Loveca77cd52010-03-24 12:45:00 +00006337 tx_flags |= IXGBE_TX_FLAGS_FCOE;
Yi Zou09ad1cc2009-09-03 14:56:10 +00006338 }
Robert Loveca77cd52010-03-24 12:45:00 +00006339#endif
6340
Yi Zoueacd73f2009-05-13 13:11:06 +00006341 /* four things can cause us to need a context descriptor */
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006342 if (skb_is_gso(skb) ||
6343 (skb->ip_summed == CHECKSUM_PARTIAL) ||
Yi Zoueacd73f2009-05-13 13:11:06 +00006344 (tx_flags & IXGBE_TX_FLAGS_VLAN) ||
6345 (tx_flags & IXGBE_TX_FLAGS_FCOE))
Auke Kok9a799d72007-09-15 14:07:45 -07006346 count++;
6347
Jesse Brandeburg9f8cdf42008-09-11 20:03:35 -07006348 count += TXD_USE_COUNT(skb_headlen(skb));
6349 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
Auke Kok9a799d72007-09-15 14:07:45 -07006350 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
6351
Ayyappan Veeraiyane092be62008-02-01 15:58:49 -08006352 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
Auke Kok9a799d72007-09-15 14:07:45 -07006353 adapter->tx_busy++;
Auke Kok9a799d72007-09-15 14:07:45 -07006354 return NETDEV_TX_BUSY;
6355 }
Auke Kok9a799d72007-09-15 14:07:45 -07006356
Auke Kok9a799d72007-09-15 14:07:45 -07006357 first = tx_ring->next_to_use;
Yi Zoueacd73f2009-05-13 13:11:06 +00006358 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6359#ifdef IXGBE_FCOE
6360 /* setup tx offload for FCoE */
6361 tso = ixgbe_fso(adapter, tx_ring, skb, tx_flags, &hdr_len);
6362 if (tso < 0) {
6363 dev_kfree_skb_any(skb);
6364 return NETDEV_TX_OK;
6365 }
6366 if (tso)
6367 tx_flags |= IXGBE_TX_FLAGS_FSO;
6368#endif /* IXGBE_FCOE */
6369 } else {
Hao Zheng5e09a102010-11-11 13:47:59 +00006370 if (protocol == htons(ETH_P_IP))
Yi Zoueacd73f2009-05-13 13:11:06 +00006371 tx_flags |= IXGBE_TX_FLAGS_IPV4;
Hao Zheng5e09a102010-11-11 13:47:59 +00006372 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len,
6373 protocol);
Yi Zoueacd73f2009-05-13 13:11:06 +00006374 if (tso < 0) {
6375 dev_kfree_skb_any(skb);
6376 return NETDEV_TX_OK;
6377 }
6378
6379 if (tso)
6380 tx_flags |= IXGBE_TX_FLAGS_TSO;
Hao Zheng5e09a102010-11-11 13:47:59 +00006381 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags,
6382 protocol) &&
Yi Zoueacd73f2009-05-13 13:11:06 +00006383 (skb->ip_summed == CHECKSUM_PARTIAL))
6384 tx_flags |= IXGBE_TX_FLAGS_CSUM;
Auke Kok9a799d72007-09-15 14:07:45 -07006385 }
6386
Alexander Duyck8ad494b2010-11-16 19:26:47 -08006387 count = ixgbe_tx_map(adapter, tx_ring, skb, tx_flags, first, hdr_len);
Alexander Duyck44df32c2009-03-31 21:34:23 +00006388 if (count) {
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006389 /* add the ATR filter if ATR is on */
6390 if (tx_ring->atr_sample_rate) {
6391 ++tx_ring->atr_count;
6392 if ((tx_ring->atr_count >= tx_ring->atr_sample_rate) &&
Joe Perchese8e9f692010-09-07 21:34:53 +00006393 test_bit(__IXGBE_FDIR_INIT_DONE,
6394 &tx_ring->reinit_state)) {
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006395 ixgbe_atr(adapter, skb, tx_ring->queue_index,
Hao Zheng5e09a102010-11-11 13:47:59 +00006396 tx_flags, protocol);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00006397 tx_ring->atr_count = 0;
6398 }
6399 }
Eric Dumazet60d51132009-12-08 07:22:03 +00006400 txq = netdev_get_tx_queue(netdev, tx_ring->queue_index);
6401 txq->tx_bytes += skb->len;
6402 txq->tx_packets++;
Alexander Duyck84ea2592010-11-16 19:26:49 -08006403 ixgbe_tx_queue(tx_ring, tx_flags, count, skb->len, hdr_len);
Alexander Duyck44df32c2009-03-31 21:34:23 +00006404 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
Auke Kok9a799d72007-09-15 14:07:45 -07006405
Alexander Duyck44df32c2009-03-31 21:34:23 +00006406 } else {
6407 dev_kfree_skb_any(skb);
6408 tx_ring->tx_buffer_info[first].time_stamp = 0;
6409 tx_ring->next_to_use = first;
6410 }
Auke Kok9a799d72007-09-15 14:07:45 -07006411
6412 return NETDEV_TX_OK;
6413}
6414
Alexander Duyck84418e32010-08-19 13:40:54 +00006415static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
6416{
6417 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6418 struct ixgbe_ring *tx_ring;
6419
6420 tx_ring = adapter->tx_ring[skb->queue_mapping];
6421 return ixgbe_xmit_frame_ring(skb, netdev, adapter, tx_ring);
6422}
6423
Auke Kok9a799d72007-09-15 14:07:45 -07006424/**
Auke Kok9a799d72007-09-15 14:07:45 -07006425 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6426 * @netdev: network interface device structure
6427 * @p: pointer to an address structure
6428 *
6429 * Returns 0 on success, negative on failure
6430 **/
6431static int ixgbe_set_mac(struct net_device *netdev, void *p)
6432{
6433 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006434 struct ixgbe_hw *hw = &adapter->hw;
Auke Kok9a799d72007-09-15 14:07:45 -07006435 struct sockaddr *addr = p;
6436
6437 if (!is_valid_ether_addr(addr->sa_data))
6438 return -EADDRNOTAVAIL;
6439
6440 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07006441 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
Auke Kok9a799d72007-09-15 14:07:45 -07006442
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006443 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
6444 IXGBE_RAH_AV);
Auke Kok9a799d72007-09-15 14:07:45 -07006445
6446 return 0;
6447}
6448
Ben Hutchings6b73e102009-04-29 08:08:58 +00006449static int
6450ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
6451{
6452 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6453 struct ixgbe_hw *hw = &adapter->hw;
6454 u16 value;
6455 int rc;
6456
6457 if (prtad != hw->phy.mdio.prtad)
6458 return -EINVAL;
6459 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
6460 if (!rc)
6461 rc = value;
6462 return rc;
6463}
6464
6465static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
6466 u16 addr, u16 value)
6467{
6468 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6469 struct ixgbe_hw *hw = &adapter->hw;
6470
6471 if (prtad != hw->phy.mdio.prtad)
6472 return -EINVAL;
6473 return hw->phy.ops.write_reg(hw, addr, devad, value);
6474}
6475
6476static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
6477{
6478 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6479
6480 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
6481}
6482
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006483/**
6484 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
Jiri Pirko31278e72009-06-17 01:12:19 +00006485 * netdev->dev_addrs
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006486 * @netdev: network interface device structure
6487 *
6488 * Returns non-zero on failure
6489 **/
6490static int ixgbe_add_sanmac_netdev(struct net_device *dev)
6491{
6492 int err = 0;
6493 struct ixgbe_adapter *adapter = netdev_priv(dev);
6494 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6495
6496 if (is_valid_ether_addr(mac->san_addr)) {
6497 rtnl_lock();
6498 err = dev_addr_add(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6499 rtnl_unlock();
6500 }
6501 return err;
6502}
6503
6504/**
6505 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
Jiri Pirko31278e72009-06-17 01:12:19 +00006506 * netdev->dev_addrs
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00006507 * @netdev: network interface device structure
6508 *
6509 * Returns non-zero on failure
6510 **/
6511static int ixgbe_del_sanmac_netdev(struct net_device *dev)
6512{
6513 int err = 0;
6514 struct ixgbe_adapter *adapter = netdev_priv(dev);
6515 struct ixgbe_mac_info *mac = &adapter->hw.mac;
6516
6517 if (is_valid_ether_addr(mac->san_addr)) {
6518 rtnl_lock();
6519 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
6520 rtnl_unlock();
6521 }
6522 return err;
6523}
6524
Auke Kok9a799d72007-09-15 14:07:45 -07006525#ifdef CONFIG_NET_POLL_CONTROLLER
6526/*
6527 * Polling 'interrupt' - used by things like netconsole to send skbs
6528 * without having to re-enable interrupts. It's not called while
6529 * the interrupt routine is executing.
6530 */
6531static void ixgbe_netpoll(struct net_device *netdev)
6532{
6533 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr8f9a7162009-07-30 12:25:09 +00006534 int i;
Auke Kok9a799d72007-09-15 14:07:45 -07006535
Alexander Duyck1a647bd2010-01-13 01:49:13 +00006536 /* if interface is down do nothing */
6537 if (test_bit(__IXGBE_DOWN, &adapter->state))
6538 return;
6539
Auke Kok9a799d72007-09-15 14:07:45 -07006540 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
Peter P Waskiewicz Jr8f9a7162009-07-30 12:25:09 +00006541 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
6542 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
6543 for (i = 0; i < num_q_vectors; i++) {
6544 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
6545 ixgbe_msix_clean_many(0, q_vector);
6546 }
6547 } else {
6548 ixgbe_intr(adapter->pdev->irq, netdev);
6549 }
Auke Kok9a799d72007-09-15 14:07:45 -07006550 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
Auke Kok9a799d72007-09-15 14:07:45 -07006551}
6552#endif
6553
Eric Dumazetde1036b2010-10-20 23:00:04 +00006554static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
6555 struct rtnl_link_stats64 *stats)
6556{
6557 struct ixgbe_adapter *adapter = netdev_priv(netdev);
6558 int i;
6559
6560 /* accurate rx/tx bytes/packets stats */
6561 dev_txq_stats_fold(netdev, stats);
Eric Dumazet1a515022010-11-16 19:26:42 -08006562 rcu_read_lock();
Eric Dumazetde1036b2010-10-20 23:00:04 +00006563 for (i = 0; i < adapter->num_rx_queues; i++) {
Eric Dumazet1a515022010-11-16 19:26:42 -08006564 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
Eric Dumazetde1036b2010-10-20 23:00:04 +00006565 u64 bytes, packets;
6566 unsigned int start;
6567
Eric Dumazet1a515022010-11-16 19:26:42 -08006568 if (ring) {
6569 do {
6570 start = u64_stats_fetch_begin_bh(&ring->syncp);
6571 packets = ring->stats.packets;
6572 bytes = ring->stats.bytes;
6573 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
6574 stats->rx_packets += packets;
6575 stats->rx_bytes += bytes;
6576 }
Eric Dumazetde1036b2010-10-20 23:00:04 +00006577 }
Eric Dumazet1a515022010-11-16 19:26:42 -08006578 rcu_read_unlock();
Eric Dumazetde1036b2010-10-20 23:00:04 +00006579 /* following stats updated by ixgbe_watchdog_task() */
6580 stats->multicast = netdev->stats.multicast;
6581 stats->rx_errors = netdev->stats.rx_errors;
6582 stats->rx_length_errors = netdev->stats.rx_length_errors;
6583 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
6584 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
6585 return stats;
6586}
6587
6588
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006589static const struct net_device_ops ixgbe_netdev_ops = {
Joe Perchese8e9f692010-09-07 21:34:53 +00006590 .ndo_open = ixgbe_open,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006591 .ndo_stop = ixgbe_close,
Stephen Hemminger00829822008-11-20 20:14:53 -08006592 .ndo_start_xmit = ixgbe_xmit_frame,
Stephen Hemminger09a3b1f2009-03-21 13:40:01 -07006593 .ndo_select_queue = ixgbe_select_queue,
Chris Leeche90d4002009-03-10 16:00:24 +00006594 .ndo_set_rx_mode = ixgbe_set_rx_mode,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006595 .ndo_set_multicast_list = ixgbe_set_rx_mode,
6596 .ndo_validate_addr = eth_validate_addr,
6597 .ndo_set_mac_address = ixgbe_set_mac,
6598 .ndo_change_mtu = ixgbe_change_mtu,
6599 .ndo_tx_timeout = ixgbe_tx_timeout,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006600 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
6601 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
Ben Hutchings6b73e102009-04-29 08:08:58 +00006602 .ndo_do_ioctl = ixgbe_ioctl,
Greg Rose7f016482010-05-04 22:12:06 +00006603 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
6604 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
6605 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
6606 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
Eric Dumazetde1036b2010-10-20 23:00:04 +00006607 .ndo_get_stats64 = ixgbe_get_stats64,
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006608#ifdef CONFIG_NET_POLL_CONTROLLER
6609 .ndo_poll_controller = ixgbe_netpoll,
6610#endif
Yi Zou332d4a72009-05-13 13:11:53 +00006611#ifdef IXGBE_FCOE
6612 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
6613 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
Yi Zou8450ff82009-08-31 12:32:14 +00006614 .ndo_fcoe_enable = ixgbe_fcoe_enable,
6615 .ndo_fcoe_disable = ixgbe_fcoe_disable,
Yi Zou61a1fa12009-10-28 18:24:56 +00006616 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
Yi Zou332d4a72009-05-13 13:11:53 +00006617#endif /* IXGBE_FCOE */
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006618};
6619
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006620static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
6621 const struct ixgbe_info *ii)
6622{
6623#ifdef CONFIG_PCI_IOV
6624 struct ixgbe_hw *hw = &adapter->hw;
6625 int err;
6626
6627 if (hw->mac.type != ixgbe_mac_82599EB || !max_vfs)
6628 return;
6629
6630 /* The 82599 supports up to 64 VFs per physical function
6631 * but this implementation limits allocation to 63 so that
6632 * basic networking resources are still available to the
6633 * physical function
6634 */
6635 adapter->num_vfs = (max_vfs > 63) ? 63 : max_vfs;
6636 adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED;
6637 err = pci_enable_sriov(adapter->pdev, adapter->num_vfs);
6638 if (err) {
Emil Tantilov396e7992010-07-01 20:05:12 +00006639 e_err(probe, "Failed to enable PCI sriov: %d\n", err);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006640 goto err_novfs;
6641 }
6642 /* If call to enable VFs succeeded then allocate memory
6643 * for per VF control structures.
6644 */
6645 adapter->vfinfo =
6646 kcalloc(adapter->num_vfs,
6647 sizeof(struct vf_data_storage), GFP_KERNEL);
6648 if (adapter->vfinfo) {
6649 /* Now that we're sure SR-IOV is enabled
6650 * and memory allocated set up the mailbox parameters
6651 */
6652 ixgbe_init_mbx_params_pf(hw);
6653 memcpy(&hw->mbx.ops, ii->mbx_ops,
6654 sizeof(hw->mbx.ops));
6655
6656 /* Disable RSC when in SR-IOV mode */
6657 adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE |
6658 IXGBE_FLAG2_RSC_ENABLED);
6659 return;
6660 }
6661
6662 /* Oh oh */
Emil Tantilov396e7992010-07-01 20:05:12 +00006663 e_err(probe, "Unable to allocate memory for VF Data Storage - "
6664 "SRIOV disabled\n");
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006665 pci_disable_sriov(adapter->pdev);
6666
6667err_novfs:
6668 adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
6669 adapter->num_vfs = 0;
6670#endif /* CONFIG_PCI_IOV */
6671}
6672
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006673/**
Auke Kok9a799d72007-09-15 14:07:45 -07006674 * ixgbe_probe - Device Initialization Routine
6675 * @pdev: PCI device information struct
6676 * @ent: entry in ixgbe_pci_tbl
6677 *
6678 * Returns 0 on success, negative on failure
6679 *
6680 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6681 * The OS initialization, configuring of the adapter private structure,
6682 * and a hardware reset occur.
6683 **/
6684static int __devinit ixgbe_probe(struct pci_dev *pdev,
Joe Perchese8e9f692010-09-07 21:34:53 +00006685 const struct pci_device_id *ent)
Auke Kok9a799d72007-09-15 14:07:45 -07006686{
6687 struct net_device *netdev;
6688 struct ixgbe_adapter *adapter = NULL;
6689 struct ixgbe_hw *hw;
6690 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
Auke Kok9a799d72007-09-15 14:07:45 -07006691 static int cards_found;
6692 int i, err, pci_using_dac;
John Fastabendc85a2612010-02-25 23:15:21 +00006693 unsigned int indices = num_possible_cpus();
Yi Zoueacd73f2009-05-13 13:11:06 +00006694#ifdef IXGBE_FCOE
6695 u16 device_caps;
6696#endif
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006697 u32 part_num, eec;
Auke Kok9a799d72007-09-15 14:07:45 -07006698
Andy Gospodarekbded64a2010-07-21 06:40:31 +00006699 /* Catch broken hardware that put the wrong VF device ID in
6700 * the PCIe SR-IOV capability.
6701 */
6702 if (pdev->is_virtfn) {
6703 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
6704 pci_name(pdev), pdev->vendor, pdev->device);
6705 return -EINVAL;
6706 }
6707
gouji-new9ce77662009-05-06 10:44:45 +00006708 err = pci_enable_device_mem(pdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006709 if (err)
6710 return err;
6711
Nick Nunley1b507732010-04-27 13:10:27 +00006712 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
6713 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
Auke Kok9a799d72007-09-15 14:07:45 -07006714 pci_using_dac = 1;
6715 } else {
Nick Nunley1b507732010-04-27 13:10:27 +00006716 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
Auke Kok9a799d72007-09-15 14:07:45 -07006717 if (err) {
Nick Nunley1b507732010-04-27 13:10:27 +00006718 err = dma_set_coherent_mask(&pdev->dev,
6719 DMA_BIT_MASK(32));
Auke Kok9a799d72007-09-15 14:07:45 -07006720 if (err) {
Dan Carpenterb8bc0422010-07-27 00:05:56 +00006721 dev_err(&pdev->dev,
6722 "No usable DMA configuration, aborting\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006723 goto err_dma;
6724 }
6725 }
6726 pci_using_dac = 0;
6727 }
6728
gouji-new9ce77662009-05-06 10:44:45 +00006729 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
Joe Perchese8e9f692010-09-07 21:34:53 +00006730 IORESOURCE_MEM), ixgbe_driver_name);
Auke Kok9a799d72007-09-15 14:07:45 -07006731 if (err) {
Dan Carpenterb8bc0422010-07-27 00:05:56 +00006732 dev_err(&pdev->dev,
6733 "pci_request_selected_regions failed 0x%x\n", err);
Auke Kok9a799d72007-09-15 14:07:45 -07006734 goto err_pci_reg;
6735 }
6736
Frans Pop19d5afd2009-10-02 10:04:12 -07006737 pci_enable_pcie_error_reporting(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08006738
Auke Kok9a799d72007-09-15 14:07:45 -07006739 pci_set_master(pdev);
Wendy Xiongfb3b27b2008-04-23 11:09:24 -07006740 pci_save_state(pdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006741
John Fastabendc85a2612010-02-25 23:15:21 +00006742 if (ii->mac == ixgbe_mac_82598EB)
6743 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
6744 else
6745 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
6746
6747 indices = max_t(unsigned int, indices, IXGBE_MAX_DCB_INDICES);
6748#ifdef IXGBE_FCOE
6749 indices += min_t(unsigned int, num_possible_cpus(),
6750 IXGBE_MAX_FCOE_INDICES);
6751#endif
John Fastabendc85a2612010-02-25 23:15:21 +00006752 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
Auke Kok9a799d72007-09-15 14:07:45 -07006753 if (!netdev) {
6754 err = -ENOMEM;
6755 goto err_alloc_etherdev;
6756 }
6757
Auke Kok9a799d72007-09-15 14:07:45 -07006758 SET_NETDEV_DEV(netdev, &pdev->dev);
6759
6760 pci_set_drvdata(pdev, netdev);
6761 adapter = netdev_priv(netdev);
6762
6763 adapter->netdev = netdev;
6764 adapter->pdev = pdev;
6765 hw = &adapter->hw;
6766 hw->back = adapter;
6767 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
6768
Jeff Kirsher05857982008-09-11 19:57:00 -07006769 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
Joe Perchese8e9f692010-09-07 21:34:53 +00006770 pci_resource_len(pdev, 0));
Auke Kok9a799d72007-09-15 14:07:45 -07006771 if (!hw->hw_addr) {
6772 err = -EIO;
6773 goto err_ioremap;
6774 }
6775
6776 for (i = 1; i <= 5; i++) {
6777 if (pci_resource_len(pdev, i) == 0)
6778 continue;
6779 }
6780
Stephen Hemminger0edc3522008-11-19 22:24:29 -08006781 netdev->netdev_ops = &ixgbe_netdev_ops;
Auke Kok9a799d72007-09-15 14:07:45 -07006782 ixgbe_set_ethtool_ops(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07006783 netdev->watchdog_timeo = 5 * HZ;
Auke Kok9a799d72007-09-15 14:07:45 -07006784 strcpy(netdev->name, pci_name(pdev));
6785
Auke Kok9a799d72007-09-15 14:07:45 -07006786 adapter->bd_number = cards_found;
6787
Auke Kok9a799d72007-09-15 14:07:45 -07006788 /* Setup hw api */
6789 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006790 hw->mac.type = ii->mac;
Auke Kok9a799d72007-09-15 14:07:45 -07006791
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006792 /* EEPROM */
6793 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
6794 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
6795 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
6796 if (!(eec & (1 << 8)))
6797 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
6798
6799 /* PHY */
6800 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
Donald Skidmorec4900be2008-11-20 21:11:42 -08006801 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
Ben Hutchings6b73e102009-04-29 08:08:58 +00006802 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
6803 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
6804 hw->phy.mdio.mmds = 0;
6805 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
6806 hw->phy.mdio.dev = netdev;
6807 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
6808 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
Donald Skidmorec4900be2008-11-20 21:11:42 -08006809
6810 /* set up this timer and work struct before calling get_invariants
6811 * which might start the timer
6812 */
6813 init_timer(&adapter->sfp_timer);
Joe Perchesc061b182010-08-23 18:20:03 +00006814 adapter->sfp_timer.function = ixgbe_sfp_timer;
Donald Skidmorec4900be2008-11-20 21:11:42 -08006815 adapter->sfp_timer.data = (unsigned long) adapter;
6816
6817 INIT_WORK(&adapter->sfp_task, ixgbe_sfp_task);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006818
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006819 /* multispeed fiber has its own tasklet, called from GPI SDP1 context */
6820 INIT_WORK(&adapter->multispeed_fiber_task, ixgbe_multispeed_fiber_task);
6821
6822 /* a new SFP+ module arrival, called from GPI SDP2 context */
6823 INIT_WORK(&adapter->sfp_config_module_task,
Joe Perchese8e9f692010-09-07 21:34:53 +00006824 ixgbe_sfp_config_module_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006825
Don Skidmore8ca783a2009-05-26 20:40:47 -07006826 ii->get_invariants(hw);
Auke Kok9a799d72007-09-15 14:07:45 -07006827
6828 /* setup the private structure */
6829 err = ixgbe_sw_init(adapter);
6830 if (err)
6831 goto err_sw_init;
6832
Don Skidmoree86bff02010-02-11 04:14:08 +00006833 /* Make it possible the adapter to be woken up via WOL */
6834 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6835 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
6836
Don Skidmorebf069c92009-05-07 10:39:54 +00006837 /*
6838 * If there is a fan on this device and it has failed log the
6839 * failure.
6840 */
6841 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
6842 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
6843 if (esdp & IXGBE_ESDP_SDP1)
Emil Tantilov396e7992010-07-01 20:05:12 +00006844 e_crit(probe, "Fan has stopped, replace the adapter\n");
Don Skidmorebf069c92009-05-07 10:39:54 +00006845 }
6846
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006847 /* reset_hw fills in the perm_addr as well */
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07006848 hw->phy.reset_if_overtemp = true;
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006849 err = hw->mac.ops.reset_hw(hw);
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07006850 hw->phy.reset_if_overtemp = false;
Don Skidmore8ca783a2009-05-26 20:40:47 -07006851 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
6852 hw->mac.type == ixgbe_mac_82598EB) {
6853 /*
6854 * Start a kernel thread to watch for a module to arrive.
6855 * Only do this for 82598, since 82599 will generate
6856 * interrupts on module arrival.
6857 */
6858 set_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
6859 mod_timer(&adapter->sfp_timer,
6860 round_jiffies(jiffies + (2 * HZ)));
6861 err = 0;
6862 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006863 e_dev_err("failed to initialize because an unsupported SFP+ "
6864 "module type was detected.\n");
6865 e_dev_err("Reload the driver after installing a supported "
6866 "module.\n");
PJ Waskiewicz04f165e2009-04-09 22:27:57 +00006867 goto err_sw_init;
6868 } else if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006869 e_dev_err("HW Init failed: %d\n", err);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006870 goto err_sw_init;
6871 }
6872
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006873 ixgbe_probe_vf(adapter, ii);
6874
Emil Tantilov396e7992010-07-01 20:05:12 +00006875 netdev->features = NETIF_F_SG |
Joe Perchese8e9f692010-09-07 21:34:53 +00006876 NETIF_F_IP_CSUM |
6877 NETIF_F_HW_VLAN_TX |
6878 NETIF_F_HW_VLAN_RX |
6879 NETIF_F_HW_VLAN_FILTER;
Auke Kok9a799d72007-09-15 14:07:45 -07006880
Jesse Brandeburge9990a92008-08-26 04:27:24 -07006881 netdev->features |= NETIF_F_IPV6_CSUM;
Auke Kok9a799d72007-09-15 14:07:45 -07006882 netdev->features |= NETIF_F_TSO;
Auke Kok9a799d72007-09-15 14:07:45 -07006883 netdev->features |= NETIF_F_TSO6;
Herbert Xu78b6f4c2009-01-18 21:49:45 -08006884 netdev->features |= NETIF_F_GRO;
Jeff Kirsherad31c402008-06-05 04:05:30 -07006885
Jesse Brandeburg45a5ead2009-04-27 22:36:35 +00006886 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
6887 netdev->features |= NETIF_F_SCTP_CSUM;
6888
Jeff Kirsherad31c402008-06-05 04:05:30 -07006889 netdev->vlan_features |= NETIF_F_TSO;
6890 netdev->vlan_features |= NETIF_F_TSO6;
Jesse Brandeburg22f32b7a52008-08-26 04:27:18 -07006891 netdev->vlan_features |= NETIF_F_IP_CSUM;
Alexander Duyckcd1da502009-08-25 04:47:50 +00006892 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
Jeff Kirsherad31c402008-06-05 04:05:30 -07006893 netdev->vlan_features |= NETIF_F_SG;
6894
Greg Rose1cdd1ec2010-01-09 02:26:46 +00006895 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
6896 adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
6897 IXGBE_FLAG_DCB_ENABLED);
Alexander Duyck2f90b862008-11-20 20:52:10 -08006898 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
6899 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
6900
Jeff Kirsher7a6b6f52008-11-25 01:02:08 -08006901#ifdef CONFIG_IXGBE_DCB
Alexander Duyck2f90b862008-11-20 20:52:10 -08006902 netdev->dcbnl_ops = &dcbnl_ops;
6903#endif
6904
Yi Zoueacd73f2009-05-13 13:11:06 +00006905#ifdef IXGBE_FCOE
Yi Zou0d551582009-07-22 14:07:12 +00006906 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
Yi Zoueacd73f2009-05-13 13:11:06 +00006907 if (hw->mac.ops.get_device_caps) {
6908 hw->mac.ops.get_device_caps(hw, &device_caps);
Yi Zou0d551582009-07-22 14:07:12 +00006909 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
6910 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
Yi Zoueacd73f2009-05-13 13:11:06 +00006911 }
6912 }
Yi Zou5e09d7f2010-07-19 13:59:52 +00006913 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
6914 netdev->vlan_features |= NETIF_F_FCOE_CRC;
6915 netdev->vlan_features |= NETIF_F_FSO;
6916 netdev->vlan_features |= NETIF_F_FCOE_MTU;
6917 }
Yi Zoueacd73f2009-05-13 13:11:06 +00006918#endif /* IXGBE_FCOE */
Yi Zou7b872a52010-09-22 17:57:58 +00006919 if (pci_using_dac) {
Auke Kok9a799d72007-09-15 14:07:45 -07006920 netdev->features |= NETIF_F_HIGHDMA;
Yi Zou7b872a52010-09-22 17:57:58 +00006921 netdev->vlan_features |= NETIF_F_HIGHDMA;
6922 }
Auke Kok9a799d72007-09-15 14:07:45 -07006923
Peter P Waskiewicz Jr0c19d6a2009-07-30 12:25:28 +00006924 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
Alexander Duyckf8212f92009-04-27 22:42:37 +00006925 netdev->features |= NETIF_F_LRO;
6926
Auke Kok9a799d72007-09-15 14:07:45 -07006927 /* make sure the EEPROM is good */
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006928 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006929 e_dev_err("The EEPROM Checksum Is Not Valid\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006930 err = -EIO;
6931 goto err_eeprom;
6932 }
6933
6934 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
6935 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
6936
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006937 if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006938 e_dev_err("invalid MAC address\n");
Auke Kok9a799d72007-09-15 14:07:45 -07006939 err = -EIO;
6940 goto err_eeprom;
6941 }
6942
Peter Waskiewicz61fac742010-04-27 00:38:15 +00006943 /* power down the optics */
6944 if (hw->phy.multispeed_fiber)
6945 hw->mac.ops.disable_tx_laser(hw);
6946
Auke Kok9a799d72007-09-15 14:07:45 -07006947 init_timer(&adapter->watchdog_timer);
Joe Perchesc061b182010-08-23 18:20:03 +00006948 adapter->watchdog_timer.function = ixgbe_watchdog;
Auke Kok9a799d72007-09-15 14:07:45 -07006949 adapter->watchdog_timer.data = (unsigned long)adapter;
6950
6951 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
Jesse Brandeburgcf8280e2008-09-11 19:55:32 -07006952 INIT_WORK(&adapter->watchdog_task, ixgbe_watchdog_task);
Auke Kok9a799d72007-09-15 14:07:45 -07006953
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08006954 err = ixgbe_init_interrupt_scheme(adapter);
6955 if (err)
6956 goto err_sw_init;
Auke Kok9a799d72007-09-15 14:07:45 -07006957
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006958 switch (pdev->device) {
6959 case IXGBE_DEV_ID_82599_KX4:
Waskiewicz Jr, Peter P495dce12009-04-23 11:15:18 +00006960 adapter->wol = (IXGBE_WUFC_MAG | IXGBE_WUFC_EX |
Joe Perchese8e9f692010-09-07 21:34:53 +00006961 IXGBE_WUFC_MC | IXGBE_WUFC_BC);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006962 break;
6963 default:
6964 adapter->wol = 0;
6965 break;
6966 }
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006967 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6968
PJ Waskiewicz04f165e2009-04-09 22:27:57 +00006969 /* pick up the PCI bus settings for reporting later */
6970 hw->mac.ops.get_bus_info(hw);
6971
Auke Kok9a799d72007-09-15 14:07:45 -07006972 /* print bus type/speed/width info */
Emil Tantilov849c4542010-06-03 16:53:41 +00006973 e_dev_info("(PCI Express:%s:%s) %pM\n",
Joe Perchese8e9f692010-09-07 21:34:53 +00006974 (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0Gb/s" :
6975 hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5Gb/s" :
6976 "Unknown"),
6977 (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
6978 hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
6979 hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
6980 "Unknown"),
6981 netdev->dev_addr);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07006982 ixgbe_read_pba_num_generic(hw, &part_num);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006983 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
Emil Tantilov849c4542010-06-03 16:53:41 +00006984 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, "
6985 "PBA No: %06x-%03x\n",
6986 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
6987 (part_num >> 8), (part_num & 0xff));
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006988 else
Emil Tantilov849c4542010-06-03 16:53:41 +00006989 e_dev_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
6990 hw->mac.type, hw->phy.type,
6991 (part_num >> 8), (part_num & 0xff));
Auke Kok9a799d72007-09-15 14:07:45 -07006992
PJ Waskiewicze8e26352009-02-27 15:45:05 +00006993 if (hw->bus.width <= ixgbe_bus_width_pcie_x4) {
Emil Tantilov849c4542010-06-03 16:53:41 +00006994 e_dev_warn("PCI-Express bandwidth available for this card is "
6995 "not sufficient for optimal performance.\n");
6996 e_dev_warn("For optimal performance a x8 PCI-Express slot "
6997 "is required.\n");
Auke Kok0c254d82008-02-11 09:25:56 -08006998 }
6999
Peter P Waskiewicz Jr34b03682009-02-05 23:54:42 -08007000 /* save off EEPROM version number */
7001 hw->eeprom.ops.read(hw, 0x29, &adapter->eeprom_version);
7002
Auke Kok9a799d72007-09-15 14:07:45 -07007003 /* reset the hardware with the new settings */
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00007004 err = hw->mac.ops.start_hw(hw);
Jesse Brandeburgc44ade92008-09-11 19:59:59 -07007005
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00007006 if (err == IXGBE_ERR_EEPROM_VERSION) {
7007 /* We are running on a pre-production device, log a warning */
Emil Tantilov849c4542010-06-03 16:53:41 +00007008 e_dev_warn("This device is a pre-production adapter/LOM. "
7009 "Please be aware there may be issues associated "
7010 "with your hardware. If you are experiencing "
7011 "problems please contact your Intel or hardware "
7012 "representative who provided you with this "
7013 "hardware.\n");
Peter P Waskiewicz Jr794caeb2009-06-04 16:02:24 +00007014 }
Auke Kok9a799d72007-09-15 14:07:45 -07007015 strcpy(netdev->name, "eth%d");
7016 err = register_netdev(netdev);
7017 if (err)
7018 goto err_register;
7019
Jesse Brandeburg54386462009-04-17 20:44:27 +00007020 /* carrier off reporting is important to ethtool even BEFORE open */
7021 netif_carrier_off(netdev);
7022
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00007023 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
7024 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7025 INIT_WORK(&adapter->fdir_reinit_task, ixgbe_fdir_reinit_task);
7026
Mallikarjuna R Chilakala119fc602010-05-20 23:07:06 -07007027 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
Joe Perchese8e9f692010-09-07 21:34:53 +00007028 INIT_WORK(&adapter->check_overtemp_task,
7029 ixgbe_check_overtemp_task);
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007030#ifdef CONFIG_IXGBE_DCA
Denis V. Lunev652f0932008-03-27 14:39:17 +03007031 if (dca_add_requester(&pdev->dev) == 0) {
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007032 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007033 ixgbe_setup_dca(adapter);
7034 }
7035#endif
Greg Rose1cdd1ec2010-01-09 02:26:46 +00007036 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
Emil Tantilov396e7992010-07-01 20:05:12 +00007037 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
Greg Rose1cdd1ec2010-01-09 02:26:46 +00007038 for (i = 0; i < adapter->num_vfs; i++)
7039 ixgbe_vf_configuration(pdev, (i | 0x10000000));
7040 }
7041
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00007042 /* add san mac addr to netdev */
7043 ixgbe_add_sanmac_netdev(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07007044
Emil Tantilov849c4542010-06-03 16:53:41 +00007045 e_dev_info("Intel(R) 10 Gigabit Network Connection\n");
Auke Kok9a799d72007-09-15 14:07:45 -07007046 cards_found++;
7047 return 0;
7048
7049err_register:
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08007050 ixgbe_release_hw_control(adapter);
Alexander Duyck7a921c92009-05-06 10:43:28 +00007051 ixgbe_clear_interrupt_scheme(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07007052err_sw_init:
7053err_eeprom:
Greg Rose1cdd1ec2010-01-09 02:26:46 +00007054 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7055 ixgbe_disable_sriov(adapter);
Donald Skidmorec4900be2008-11-20 21:11:42 -08007056 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
7057 del_timer_sync(&adapter->sfp_timer);
7058 cancel_work_sync(&adapter->sfp_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00007059 cancel_work_sync(&adapter->multispeed_fiber_task);
7060 cancel_work_sync(&adapter->sfp_config_module_task);
Auke Kok9a799d72007-09-15 14:07:45 -07007061 iounmap(hw->hw_addr);
7062err_ioremap:
7063 free_netdev(netdev);
7064err_alloc_etherdev:
Joe Perchese8e9f692010-09-07 21:34:53 +00007065 pci_release_selected_regions(pdev,
7066 pci_select_bars(pdev, IORESOURCE_MEM));
Auke Kok9a799d72007-09-15 14:07:45 -07007067err_pci_reg:
7068err_dma:
7069 pci_disable_device(pdev);
7070 return err;
7071}
7072
7073/**
7074 * ixgbe_remove - Device Removal Routine
7075 * @pdev: PCI device information struct
7076 *
7077 * ixgbe_remove is called by the PCI subsystem to alert the driver
7078 * that it should release a PCI device. The could be caused by a
7079 * Hot-Plug event, or because the driver is going to be removed from
7080 * memory.
7081 **/
7082static void __devexit ixgbe_remove(struct pci_dev *pdev)
7083{
7084 struct net_device *netdev = pci_get_drvdata(pdev);
7085 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7086
7087 set_bit(__IXGBE_DOWN, &adapter->state);
Donald Skidmorec4900be2008-11-20 21:11:42 -08007088 /* clear the module not found bit to make sure the worker won't
7089 * reschedule
7090 */
7091 clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
Auke Kok9a799d72007-09-15 14:07:45 -07007092 del_timer_sync(&adapter->watchdog_timer);
7093
Donald Skidmorec4900be2008-11-20 21:11:42 -08007094 del_timer_sync(&adapter->sfp_timer);
7095 cancel_work_sync(&adapter->watchdog_task);
7096 cancel_work_sync(&adapter->sfp_task);
PJ Waskiewicze8e26352009-02-27 15:45:05 +00007097 cancel_work_sync(&adapter->multispeed_fiber_task);
7098 cancel_work_sync(&adapter->sfp_config_module_task);
Peter P Waskiewicz Jrc4cf55e2009-06-04 16:01:43 +00007099 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
7100 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7101 cancel_work_sync(&adapter->fdir_reinit_task);
Auke Kok9a799d72007-09-15 14:07:45 -07007102 flush_scheduled_work();
7103
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007104#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007105 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
7106 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
7107 dca_remove_requester(&pdev->dev);
7108 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
7109 }
7110
7111#endif
Yi Zou332d4a72009-05-13 13:11:53 +00007112#ifdef IXGBE_FCOE
7113 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
7114 ixgbe_cleanup_fcoe(adapter);
7115
7116#endif /* IXGBE_FCOE */
PJ Waskiewicz0365e6e2009-05-17 12:32:25 +00007117
7118 /* remove the added san mac */
7119 ixgbe_del_sanmac_netdev(netdev);
7120
Donald Skidmorec4900be2008-11-20 21:11:42 -08007121 if (netdev->reg_state == NETREG_REGISTERED)
7122 unregister_netdev(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07007123
Greg Rose1cdd1ec2010-01-09 02:26:46 +00007124 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7125 ixgbe_disable_sriov(adapter);
7126
Alexander Duyck7a921c92009-05-06 10:43:28 +00007127 ixgbe_clear_interrupt_scheme(adapter);
Ayyappan Veeraiyan5eba3692008-02-01 15:59:04 -08007128
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08007129 ixgbe_release_hw_control(adapter);
Auke Kok9a799d72007-09-15 14:07:45 -07007130
7131 iounmap(adapter->hw.hw_addr);
gouji-new9ce77662009-05-06 10:44:45 +00007132 pci_release_selected_regions(pdev, pci_select_bars(pdev,
Joe Perchese8e9f692010-09-07 21:34:53 +00007133 IORESOURCE_MEM));
Auke Kok9a799d72007-09-15 14:07:45 -07007134
Emil Tantilov849c4542010-06-03 16:53:41 +00007135 e_dev_info("complete\n");
Ayyappan Veeraiyan021230d2008-03-03 15:03:45 -08007136
Auke Kok9a799d72007-09-15 14:07:45 -07007137 free_netdev(netdev);
7138
Frans Pop19d5afd2009-10-02 10:04:12 -07007139 pci_disable_pcie_error_reporting(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007140
Auke Kok9a799d72007-09-15 14:07:45 -07007141 pci_disable_device(pdev);
7142}
7143
7144/**
7145 * ixgbe_io_error_detected - called when PCI error is detected
7146 * @pdev: Pointer to PCI device
7147 * @state: The current pci connection state
7148 *
7149 * This function is called after a PCI bus error affecting
7150 * this device has been detected.
7151 */
7152static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
Joe Perchese8e9f692010-09-07 21:34:53 +00007153 pci_channel_state_t state)
Auke Kok9a799d72007-09-15 14:07:45 -07007154{
7155 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08007156 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07007157
7158 netif_device_detach(netdev);
7159
Breno Leitao3044b8d2009-05-06 10:44:26 +00007160 if (state == pci_channel_io_perm_failure)
7161 return PCI_ERS_RESULT_DISCONNECT;
7162
Auke Kok9a799d72007-09-15 14:07:45 -07007163 if (netif_running(netdev))
7164 ixgbe_down(adapter);
7165 pci_disable_device(pdev);
7166
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07007167 /* Request a slot reset. */
Auke Kok9a799d72007-09-15 14:07:45 -07007168 return PCI_ERS_RESULT_NEED_RESET;
7169}
7170
7171/**
7172 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7173 * @pdev: Pointer to PCI device
7174 *
7175 * Restart the card from scratch, as if from a cold-boot.
7176 */
7177static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
7178{
7179 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08007180 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007181 pci_ers_result_t result;
7182 int err;
Auke Kok9a799d72007-09-15 14:07:45 -07007183
gouji-new9ce77662009-05-06 10:44:45 +00007184 if (pci_enable_device_mem(pdev)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00007185 e_err(probe, "Cannot re-enable PCI device after reset.\n");
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007186 result = PCI_ERS_RESULT_DISCONNECT;
7187 } else {
7188 pci_set_master(pdev);
7189 pci_restore_state(pdev);
Breno Leitaoc0e1f682009-11-10 08:37:47 +00007190 pci_save_state(pdev);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007191
Don Skidmoredd4d8ca2009-04-29 00:22:31 -07007192 pci_wake_from_d3(pdev, false);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007193
7194 ixgbe_reset(adapter);
PJ Waskiewicz88512532009-03-13 22:15:10 +00007195 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007196 result = PCI_ERS_RESULT_RECOVERED;
Auke Kok9a799d72007-09-15 14:07:45 -07007197 }
Auke Kok9a799d72007-09-15 14:07:45 -07007198
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007199 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7200 if (err) {
Emil Tantilov849c4542010-06-03 16:53:41 +00007201 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7202 "failed 0x%0x\n", err);
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007203 /* non-fatal, continue */
7204 }
Auke Kok9a799d72007-09-15 14:07:45 -07007205
Peter P Waskiewicz Jr6fabd712008-12-10 01:13:08 -08007206 return result;
Auke Kok9a799d72007-09-15 14:07:45 -07007207}
7208
7209/**
7210 * ixgbe_io_resume - called when traffic can start flowing again.
7211 * @pdev: Pointer to PCI device
7212 *
7213 * This callback is called when the error recovery driver tells us that
7214 * its OK to resume normal operation.
7215 */
7216static void ixgbe_io_resume(struct pci_dev *pdev)
7217{
7218 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen454d7c92008-11-12 23:37:49 -08007219 struct ixgbe_adapter *adapter = netdev_priv(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07007220
7221 if (netif_running(netdev)) {
7222 if (ixgbe_up(adapter)) {
Emil Tantilov396e7992010-07-01 20:05:12 +00007223 e_info(probe, "ixgbe_up failed after reset\n");
Auke Kok9a799d72007-09-15 14:07:45 -07007224 return;
7225 }
7226 }
7227
7228 netif_device_attach(netdev);
Auke Kok9a799d72007-09-15 14:07:45 -07007229}
7230
7231static struct pci_error_handlers ixgbe_err_handler = {
7232 .error_detected = ixgbe_io_error_detected,
7233 .slot_reset = ixgbe_io_slot_reset,
7234 .resume = ixgbe_io_resume,
7235};
7236
7237static struct pci_driver ixgbe_driver = {
7238 .name = ixgbe_driver_name,
7239 .id_table = ixgbe_pci_tbl,
7240 .probe = ixgbe_probe,
7241 .remove = __devexit_p(ixgbe_remove),
7242#ifdef CONFIG_PM
7243 .suspend = ixgbe_suspend,
7244 .resume = ixgbe_resume,
7245#endif
7246 .shutdown = ixgbe_shutdown,
7247 .err_handler = &ixgbe_err_handler
7248};
7249
7250/**
7251 * ixgbe_init_module - Driver Registration Routine
7252 *
7253 * ixgbe_init_module is the first routine called when the driver is
7254 * loaded. All it does is register with the PCI subsystem.
7255 **/
7256static int __init ixgbe_init_module(void)
7257{
7258 int ret;
Joe Perchesc7689572010-09-07 21:35:17 +00007259 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
Emil Tantilov849c4542010-06-03 16:53:41 +00007260 pr_info("%s\n", ixgbe_copyright);
Auke Kok9a799d72007-09-15 14:07:45 -07007261
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007262#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007263 dca_register_notify(&dca_notifier);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007264#endif
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007265
Auke Kok9a799d72007-09-15 14:07:45 -07007266 ret = pci_register_driver(&ixgbe_driver);
7267 return ret;
7268}
Peter P Waskiewiczb4617242008-09-11 20:04:46 -07007269
Auke Kok9a799d72007-09-15 14:07:45 -07007270module_init(ixgbe_init_module);
7271
7272/**
7273 * ixgbe_exit_module - Driver Exit Cleanup Routine
7274 *
7275 * ixgbe_exit_module is called just before the driver is removed
7276 * from memory.
7277 **/
7278static void __exit ixgbe_exit_module(void)
7279{
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007280#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007281 dca_unregister_notify(&dca_notifier);
7282#endif
Auke Kok9a799d72007-09-15 14:07:45 -07007283 pci_unregister_driver(&ixgbe_driver);
Eric Dumazet1a515022010-11-16 19:26:42 -08007284 rcu_barrier(); /* Wait for completion of call_rcu()'s */
Auke Kok9a799d72007-09-15 14:07:45 -07007285}
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007286
Jeff Garzik5dd2d332008-10-16 05:09:31 -04007287#ifdef CONFIG_IXGBE_DCA
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007288static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
Joe Perchese8e9f692010-09-07 21:34:53 +00007289 void *p)
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007290{
7291 int ret_val;
7292
7293 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
Joe Perchese8e9f692010-09-07 21:34:53 +00007294 __ixgbe_notify_dca);
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007295
7296 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
7297}
Jeb Cramerbd0362d2008-03-03 15:04:02 -08007298
Alexander Duyckb4533682009-03-31 21:32:42 +00007299#endif /* CONFIG_IXGBE_DCA */
Emil Tantilov849c4542010-06-03 16:53:41 +00007300
Alexander Duyckb4533682009-03-31 21:32:42 +00007301/**
Emil Tantilov849c4542010-06-03 16:53:41 +00007302 * ixgbe_get_hw_dev return device
Alexander Duyckb4533682009-03-31 21:32:42 +00007303 * used by hardware layer to print debugging information
7304 **/
Emil Tantilov849c4542010-06-03 16:53:41 +00007305struct net_device *ixgbe_get_hw_dev(struct ixgbe_hw *hw)
Alexander Duyckb4533682009-03-31 21:32:42 +00007306{
7307 struct ixgbe_adapter *adapter = hw->back;
Emil Tantilov849c4542010-06-03 16:53:41 +00007308 return adapter->netdev;
Alexander Duyckb4533682009-03-31 21:32:42 +00007309}
7310
Auke Kok9a799d72007-09-15 14:07:45 -07007311module_exit(ixgbe_exit_module);
7312
7313/* ixgbe_main.c */