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review.evervolv.com / android_kernel_oneplus_msm8996 / 85e6b8c5d8be1e901b5402bfe42ce408912ab83e / . / arch / arm / mach-shmobile / pfc-sh7372.c
blob: 9c265dae138a31c245c63fbaf2f87e3f5f147dbb [file] [log] [blame]
Kuninori Morimotob789b3f2010-02-17 09:39:10 +0000[diff] [blame]1/*
2 * sh7372 processor support - PFC hardware block
3 *
4 * Copyright (C) 2010 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * Based on
7 * sh7367 processor support - PFC hardware block
8 * Copyright (C) 2010 Magnus Damm
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/gpio.h>
26#include <mach/sh7372.h>
27
28#define _1(fn, pfx, sfx) fn(pfx, sfx)
29
30#define _10(fn, pfx, sfx) \
31 _1(fn, pfx##0, sfx), _1(fn, pfx##1, sfx), \
32 _1(fn, pfx##2, sfx), _1(fn, pfx##3, sfx), \
33 _1(fn, pfx##4, sfx), _1(fn, pfx##5, sfx), \
34 _1(fn, pfx##6, sfx), _1(fn, pfx##7, sfx), \
35 _1(fn, pfx##8, sfx), _1(fn, pfx##9, sfx)
36
37#define _80(fn, pfx, sfx) \
38 _10(fn, pfx##1, sfx), _10(fn, pfx##2, sfx), \
39 _10(fn, pfx##3, sfx), _10(fn, pfx##4, sfx), \
40 _10(fn, pfx##5, sfx), _10(fn, pfx##6, sfx), \
41 _10(fn, pfx##7, sfx), _10(fn, pfx##8, sfx)
42
43#define _190(fn, pfx, sfx) \
44 _10(fn, pfx, sfx), _80(fn, pfx, sfx), _10(fn, pfx##9, sfx), \
45 _10(fn, pfx##10, sfx), _80(fn, pfx##1, sfx), _1(fn, pfx##190, sfx)
46
47#define _PORT(pfx, sfx) pfx##_##sfx
48#define PORT_ALL(str) _190(_PORT, PORT, str)
49
50enum {
51 PINMUX_RESERVED = 0,
52
53 /* PORT0_DATA -> PORT190_DATA */
54 PINMUX_DATA_BEGIN,
55 PORT_ALL(DATA),
56 PINMUX_DATA_END,
57
58 /* PORT0_IN -> PORT190_IN */
59 PINMUX_INPUT_BEGIN,
60 PORT_ALL(IN),
61 PINMUX_INPUT_END,
62
63 /* PORT0_IN_PU -> PORT190_IN_PU */
64 PINMUX_INPUT_PULLUP_BEGIN,
65 PORT_ALL(IN_PU),
66 PINMUX_INPUT_PULLUP_END,
67
68 /* PORT0_IN_PD -> PORT190_IN_PD */
69 PINMUX_INPUT_PULLDOWN_BEGIN,
70 PORT_ALL(IN_PD),
71 PINMUX_INPUT_PULLDOWN_END,
72
73 /* PORT0_OUT -> PORT190_OUT */
74 PINMUX_OUTPUT_BEGIN,
75 PORT_ALL(OUT),
76 PINMUX_OUTPUT_END,
77
78 PINMUX_FUNCTION_BEGIN,
79 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT190_FN_IN */
80 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT190_FN_OUT */
81 PORT_ALL(FN0), /* PORT0_FN0 -> PORT190_FN0 */
82 PORT_ALL(FN1), /* PORT0_FN1 -> PORT190_FN1 */
83 PORT_ALL(FN2), /* PORT0_FN2 -> PORT190_FN2 */
84 PORT_ALL(FN3), /* PORT0_FN3 -> PORT190_FN3 */
85 PORT_ALL(FN4), /* PORT0_FN4 -> PORT190_FN4 */
86 PORT_ALL(FN5), /* PORT0_FN5 -> PORT190_FN5 */
87 PORT_ALL(FN6), /* PORT0_FN6 -> PORT190_FN6 */
88 PORT_ALL(FN7), /* PORT0_FN7 -> PORT190_FN7 */
89
90 MSEL1CR_31_0, MSEL1CR_31_1,
91 MSEL1CR_30_0, MSEL1CR_30_1,
92 MSEL1CR_29_0, MSEL1CR_29_1,
93 MSEL1CR_28_0, MSEL1CR_28_1,
94 MSEL1CR_27_0, MSEL1CR_27_1,
95 MSEL1CR_26_0, MSEL1CR_26_1,
96 MSEL1CR_16_0, MSEL1CR_16_1,
97 MSEL1CR_15_0, MSEL1CR_15_1,
98 MSEL1CR_14_0, MSEL1CR_14_1,
99 MSEL1CR_13_0, MSEL1CR_13_1,
100 MSEL1CR_12_0, MSEL1CR_12_1,
101 MSEL1CR_9_0, MSEL1CR_9_1,
102 MSEL1CR_8_0, MSEL1CR_8_1,
103 MSEL1CR_7_0, MSEL1CR_7_1,
104 MSEL1CR_6_0, MSEL1CR_6_1,
105 MSEL1CR_4_0, MSEL1CR_4_1,
106 MSEL1CR_3_0, MSEL1CR_3_1,
107 MSEL1CR_2_0, MSEL1CR_2_1,
108 MSEL1CR_0_0, MSEL1CR_0_1,
109
110 MSEL3CR_27_0, MSEL3CR_27_1,
111 MSEL3CR_26_0, MSEL3CR_26_1,
112 MSEL3CR_21_0, MSEL3CR_21_1,
113 MSEL3CR_20_0, MSEL3CR_20_1,
114 MSEL3CR_15_0, MSEL3CR_15_1,
115 MSEL3CR_9_0, MSEL3CR_9_1,
116 MSEL3CR_6_0, MSEL3CR_6_1,
117
118 MSEL4CR_19_0, MSEL4CR_19_1,
119 MSEL4CR_18_0, MSEL4CR_18_1,
120 MSEL4CR_17_0, MSEL4CR_17_1,
121 MSEL4CR_16_0, MSEL4CR_16_1,
122 MSEL4CR_15_0, MSEL4CR_15_1,
123 MSEL4CR_14_0, MSEL4CR_14_1,
124 MSEL4CR_10_0, MSEL4CR_10_1,
125 MSEL4CR_6_0, MSEL4CR_6_1,
126 MSEL4CR_4_0, MSEL4CR_4_1,
127 MSEL4CR_1_0, MSEL4CR_1_1,
128 PINMUX_FUNCTION_END,
129
130 PINMUX_MARK_BEGIN,
131
132 /* IRQ */
133 IRQ0_6_MARK, IRQ0_162_MARK, IRQ1_MARK, IRQ2_4_MARK,
134 IRQ2_5_MARK, IRQ3_8_MARK, IRQ3_16_MARK, IRQ4_17_MARK,
135 IRQ4_163_MARK, IRQ5_MARK, IRQ6_39_MARK, IRQ6_164_MARK,
136 IRQ7_40_MARK, IRQ7_167_MARK, IRQ8_41_MARK, IRQ8_168_MARK,
137 IRQ9_42_MARK, IRQ9_169_MARK, IRQ10_MARK, IRQ11_MARK,
138 IRQ12_80_MARK, IRQ12_137_MARK, IRQ13_81_MARK, IRQ13_145_MARK,
139 IRQ14_82_MARK, IRQ14_146_MARK, IRQ15_83_MARK, IRQ15_147_MARK,
140 IRQ16_84_MARK, IRQ16_170_MARK, IRQ17_MARK, IRQ18_MARK,
141 IRQ19_MARK, IRQ20_MARK, IRQ21_MARK, IRQ22_MARK,
142 IRQ23_MARK, IRQ24_MARK, IRQ25_MARK, IRQ26_121_MARK,
143 IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
144 IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
145 IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
146
147 /* MSIOF0 */
148 MSIOF0_TSYNC_MARK, MSIOF0_TSCK_MARK, MSIOF0_RXD_MARK,
149 MSIOF0_RSCK_MARK, MSIOF0_RSYNC_MARK, MSIOF0_MCK0_MARK,
150 MSIOF0_MCK1_MARK, MSIOF0_SS1_MARK, MSIOF0_SS2_MARK,
151 MSIOF0_TXD_MARK,
152
153 /* MSIOF1 */
154 MSIOF1_TSCK_39_MARK, MSIOF1_TSYNC_40_MARK,
155 MSIOF1_TSCK_88_MARK, MSIOF1_TSYNC_89_MARK,
156 MSIOF1_TXD_41_MARK, MSIOF1_RXD_42_MARK,
157 MSIOF1_TXD_90_MARK, MSIOF1_RXD_91_MARK,
158 MSIOF1_SS1_43_MARK, MSIOF1_SS2_44_MARK,
159 MSIOF1_SS1_92_MARK, MSIOF1_SS2_93_MARK,
160 MSIOF1_RSCK_MARK, MSIOF1_RSYNC_MARK,
161 MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
162
163 /* MSIOF2 */
164 MSIOF2_RSCK_MARK, MSIOF2_RSYNC_MARK, MSIOF2_MCK0_MARK,
165 MSIOF2_MCK1_MARK, MSIOF2_SS1_MARK, MSIOF2_SS2_MARK,
166 MSIOF2_TSYNC_MARK, MSIOF2_TSCK_MARK, MSIOF2_RXD_MARK,
167 MSIOF2_TXD_MARK,
168
Kuninori Morimoto53b29b42010-09-02 07:20:40 +0000[diff] [blame]169 /* BBIF1 */
Kuninori Morimotob789b3f2010-02-17 09:39:10 +0000[diff] [blame]170 BBIF1_RXD_MARK, BBIF1_TSYNC_MARK, BBIF1_TSCK_MARK,
171 BBIF1_TXD_MARK, BBIF1_RSCK_MARK, BBIF1_RSYNC_MARK,
172 BBIF1_FLOW_MARK, BB_RX_FLOW_N_MARK,
173
Kuninori Morimoto53b29b42010-09-02 07:20:40 +0000[diff] [blame]174 /* BBIF2 */
Kuninori Morimotob789b3f2010-02-17 09:39:10 +0000[diff] [blame]175 BBIF2_TSCK1_MARK, BBIF2_TSYNC1_MARK,
176 BBIF2_TXD1_MARK, BBIF2_RXD_MARK,
177
178 /* FSI */
179 FSIACK_MARK, FSIBCK_MARK, FSIAILR_MARK, FSIAIBT_MARK,
180 FSIAISLD_MARK, FSIAOMC_MARK, FSIAOLR_MARK, FSIAOBT_MARK,
181 FSIAOSLD_MARK, FSIASPDIF_11_MARK, FSIASPDIF_15_MARK,
182
183 /* FMSI */
184 FMSOCK_MARK, FMSOOLR_MARK, FMSIOLR_MARK, FMSOOBT_MARK,
185 FMSIOBT_MARK, FMSOSLD_MARK, FMSOILR_MARK, FMSIILR_MARK,
186 FMSOIBT_MARK, FMSIIBT_MARK, FMSISLD_MARK, FMSICK_MARK,
187
188 /* SCIFA0 */
189 SCIFA0_TXD_MARK, SCIFA0_RXD_MARK, SCIFA0_SCK_MARK,
190 SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
191
192 /* SCIFA1 */
193 SCIFA1_TXD_MARK, SCIFA1_RXD_MARK, SCIFA1_SCK_MARK,
194 SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
195
196 /* SCIFA2 */
197 SCIFA2_CTS1_MARK, SCIFA2_RTS1_MARK, SCIFA2_TXD1_MARK,
198 SCIFA2_RXD1_MARK, SCIFA2_SCK1_MARK,
199
200 /* SCIFA3 */
201 SCIFA3_CTS_43_MARK, SCIFA3_CTS_140_MARK, SCIFA3_RTS_44_MARK,
202 SCIFA3_RTS_141_MARK, SCIFA3_SCK_MARK, SCIFA3_TXD_MARK,
203 SCIFA3_RXD_MARK,
204
205 /* SCIFA4 */
206 SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
207
208 /* SCIFA5 */
209 SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
210
211 /* SCIFB */
212 SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
213 SCIFB_TXD_MARK, SCIFB_RXD_MARK,
214
215 /* CEU */
216 VIO_HD_MARK, VIO_CKO1_MARK, VIO_CKO2_MARK, VIO_VD_MARK,
217 VIO_CLK_MARK, VIO_FIELD_MARK, VIO_CKO_MARK,
218 VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
219 VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
220 VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
221 VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
222
223 /* USB0 */
224 IDIN_0_MARK, EXTLP_0_MARK, OVCN2_0_MARK, PWEN_0_MARK,
225 OVCN_0_MARK, VBUS0_0_MARK,
226
227 /* USB1 */
228 IDIN_1_18_MARK, IDIN_1_113_MARK,
229 PWEN_1_115_MARK, PWEN_1_138_MARK,
230 OVCN_1_114_MARK, OVCN_1_162_MARK,
231 EXTLP_1_MARK, OVCN2_1_MARK,
232 VBUS0_1_MARK,
233
234 /* GPIO */
235 GPI0_MARK, GPI1_MARK, GPO0_MARK, GPO1_MARK,
236
237 /* BSC */
238 BS_MARK, WE1_MARK,
239 CKO_MARK, WAIT_MARK, RDWR_MARK,
240
241 A0_MARK, A1_MARK, A2_MARK, A3_MARK,
242 A6_MARK, A7_MARK, A8_MARK, A9_MARK,
243 A10_MARK, A11_MARK, A12_MARK, A13_MARK,
244 A14_MARK, A15_MARK, A16_MARK, A17_MARK,
245 A18_MARK, A19_MARK, A20_MARK, A21_MARK,
246 A22_MARK, A23_MARK, A24_MARK, A25_MARK,
247 A26_MARK,
248
249 CS0_MARK, CS2_MARK, CS4_MARK,
250 CS5A_MARK, CS5B_MARK, CS6A_MARK,
251
252 /* BSC/FLCTL */
253 RD_FSC_MARK, WE0_FWE_MARK, A4_FOE_MARK, A5_FCDE_MARK,
254 D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
255 D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
256 D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
257 D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
258
259 /* MMCIF(1) */
260 MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
261 MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
262 MMCCMD0_MARK, MMCCLK0_MARK,
263
264 /* MMCIF(2) */
265 MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
266 MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
267 MMCCLK1_MARK, MMCCMD1_MARK,
268
269 /* SPU2 */
270 VINT_I_MARK,
271
272 /* FLCTL */
273 FCE1_MARK, FCE0_MARK, FRB_MARK,
274
275 /* HSI */
276 GP_RX_FLAG_MARK, GP_RX_DATA_MARK, GP_TX_READY_MARK,
277 GP_RX_WAKE_MARK, MP_TX_FLAG_MARK, MP_TX_DATA_MARK,
278 MP_RX_READY_MARK, MP_TX_WAKE_MARK,
279
280 /* MFI */
281 MFIv6_MARK,
282 MFIv4_MARK,
283
284 MEMC_CS0_MARK, MEMC_BUSCLK_MEMC_A0_MARK,
285 MEMC_CS1_MEMC_A1_MARK, MEMC_ADV_MEMC_DREQ0_MARK,
286 MEMC_WAIT_MEMC_DREQ1_MARK, MEMC_NOE_MARK,
287 MEMC_NWE_MARK, MEMC_INT_MARK,
288
289 MEMC_AD0_MARK, MEMC_AD1_MARK, MEMC_AD2_MARK,
290 MEMC_AD3_MARK, MEMC_AD4_MARK, MEMC_AD5_MARK,
291 MEMC_AD6_MARK, MEMC_AD7_MARK, MEMC_AD8_MARK,
292 MEMC_AD9_MARK, MEMC_AD10_MARK, MEMC_AD11_MARK,
293 MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
294 MEMC_AD15_MARK,
295
296 /* SIM */
297 SIM_RST_MARK, SIM_CLK_MARK, SIM_D_MARK,
298
299 /* TPU */
300 TPU0TO0_MARK, TPU0TO1_MARK,
301 TPU0TO2_93_MARK, TPU0TO2_99_MARK,
302 TPU0TO3_MARK,
303
304 /* I2C2 */
305 I2C_SCL2_MARK, I2C_SDA2_MARK,
306
307 /* I2C3(1) */
308 I2C_SCL3_MARK, I2C_SDA3_MARK,
309
310 /* I2C3(2) */
311 I2C_SCL3S_MARK, I2C_SDA3S_MARK,
312
313 /* I2C4(2) */
314 I2C_SCL4_MARK, I2C_SDA4_MARK,
315
316 /* I2C4(2) */
317 I2C_SCL4S_MARK, I2C_SDA4S_MARK,
318
319 /* KEYSC */
320 KEYOUT0_MARK, KEYIN0_121_MARK, KEYIN0_136_MARK,
321 KEYOUT1_MARK, KEYIN1_122_MARK, KEYIN1_135_MARK,
322 KEYOUT2_MARK, KEYIN2_123_MARK, KEYIN2_134_MARK,
323 KEYOUT3_MARK, KEYIN3_124_MARK, KEYIN3_133_MARK,
324 KEYOUT4_MARK, KEYIN4_MARK,
325 KEYOUT5_MARK, KEYIN5_MARK,
326 KEYOUT6_MARK, KEYIN6_MARK,
327 KEYOUT7_MARK, KEYIN7_MARK,
328
329 /* LCDC */
330 LCDC0_SELECT_MARK,
331 LCDC1_SELECT_MARK,
332 LCDHSYN_MARK, LCDCS_MARK, LCDVSYN_MARK, LCDDCK_MARK,
333 LCDWR_MARK, LCDRD_MARK, LCDDISP_MARK, LCDRS_MARK,
334 LCDLCLK_MARK, LCDDON_MARK,
335
336 LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
337 LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
338 LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
339 LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
340 LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
341 LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
342
343 /* IRDA */
344 IRDA_OUT_MARK, IRDA_IN_MARK, IRDA_FIRSEL_MARK,
345 IROUT_139_MARK, IROUT_140_MARK,
346
347 /* TSIF1 */
348 TS0_1SELECT_MARK,
349 TS0_2SELECT_MARK,
350 TS1_1SELECT_MARK,
351 TS1_2SELECT_MARK,
352
353 TS_SPSYNC1_MARK, TS_SDAT1_MARK,
354 TS_SDEN1_MARK, TS_SCK1_MARK,
355
356 /* TSIF2 */
357 TS_SPSYNC2_MARK, TS_SDAT2_MARK,
358 TS_SDEN2_MARK, TS_SCK2_MARK,
359
360 /* HDMI */
361 HDMI_HPD_MARK, HDMI_CEC_MARK,
362
363 /* SDHI0 */
364 SDHICLK0_MARK, SDHICD0_MARK,
365 SDHICMD0_MARK, SDHIWP0_MARK,
366 SDHID0_0_MARK, SDHID0_1_MARK,
367 SDHID0_2_MARK, SDHID0_3_MARK,
368
369 /* SDHI1 */
370 SDHICLK1_MARK, SDHICMD1_MARK, SDHID1_0_MARK,
371 SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
372
373 /* SDHI2 */
374 SDHICLK2_MARK, SDHICMD2_MARK, SDHID2_0_MARK,
375 SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
376
377 /* SDENC */
378 SDENC_CPG_MARK,
379 SDENC_DV_CLKI_MARK,
380
381 PINMUX_MARK_END,
382};
383
384/* PORT_DATA_I_PD(nr) */
385#define _I___D(nr) \
386 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
387 PORT##nr##_IN, PORT##nr##_IN_PD)
388
389/* PORT_DATA_I_PU(nr) */
390#define _I__U_(nr) \
391 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
392 PORT##nr##_IN, PORT##nr##_IN_PU)
393
394/* PORT_DATA_I_PU_PD(nr) */
395#define _I__UD(nr) \
396 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
397 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
398
399/* PORT_DATA_O(nr) */
400#define __O___(nr) \
401 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
402
403/* PORT_DATA_IO(nr) */
404#define _IO___(nr) \
405 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
406 PORT##nr##_IN)
407
408/* PORT_DATA_IO_PD(nr) */
409#define _IO__D(nr) \
410 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
411 PORT##nr##_IN, PORT##nr##_IN_PD)
412
413/* PORT_DATA_IO_PU(nr) */
414#define _IO_U_(nr) \
415 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
416 PORT##nr##_IN, PORT##nr##_IN_PU)
417
418/* PORT_DATA_IO_PU_PD(nr) */
419#define _IO_UD(nr) \
420 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
421 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
422
423
424static pinmux_enum_t pinmux_data[] = {
425
426 /* specify valid pin states for each pin in GPIO mode */
427
428 _IO__D(0), _IO__D(1), __O___(2), _I___D(3), _I___D(4),
429 _I___D(5), _IO_UD(6), _I___D(7), _IO__D(8), __O___(9),
430
431 __O___(10), __O___(11), _IO_UD(12), _IO__D(13), _IO__D(14),
432 __O___(15), _IO__D(16), _IO__D(17), _I___D(18), _IO___(19),
433
434 _IO___(20), _IO___(21), _IO___(22), _IO___(23), _IO___(24),
435 _IO___(25), _IO___(26), _IO___(27), _IO___(28), _IO___(29),
436
437 _IO___(30), _IO___(31), _IO___(32), _IO___(33), _IO___(34),
438 _IO___(35), _IO___(36), _IO___(37), _IO___(38), _IO___(39),
439
440 _IO___(40), _IO___(41), _IO___(42), _IO___(43), _IO___(44),
441 _IO___(45), _IO_U_(46), _IO_U_(47), _IO_U_(48), _IO_U_(49),
442
443 _IO_U_(50), _IO_U_(51), _IO_U_(52), _IO_U_(53), _IO_U_(54),
444 _IO_U_(55), _IO_U_(56), _IO_U_(57), _IO_U_(58), _IO_U_(59),
445
446 _IO_U_(60), _IO_U_(61), _IO___(62), __O___(63), __O___(64),
447 _IO_U_(65), __O___(66), _IO_U_(67), __O___(68), _IO___(69), /*66?*/
448
449 _IO___(70), _IO___(71), __O___(72), _I__U_(73), _I__UD(74),
450 _IO_UD(75), _IO_UD(76), _IO_UD(77), _IO_UD(78), _IO_UD(79),
451
452 _IO_UD(80), _IO_UD(81), _IO_UD(82), _IO_UD(83), _IO_UD(84),
453 _IO_UD(85), _IO_UD(86), _IO_UD(87), _IO_UD(88), _IO_UD(89),
454
455 _IO_UD(90), _IO_UD(91), _IO_UD(92), _IO_UD(93), _IO_UD(94),
456 _IO_UD(95), _IO_U_(96), _IO_UD(97), _IO_UD(98), __O___(99), /*99?*/
457
458 _IO__D(100), _IO__D(101), _IO__D(102), _IO__D(103), _IO__D(104),
459 _IO__D(105), _IO_U_(106), _IO_U_(107), _IO_U_(108), _IO_U_(109),
460
461 _IO_U_(110), _IO_U_(111), _IO__D(112), _IO__D(113), _IO_U_(114),
462 _IO_U_(115), _IO_U_(116), _IO_U_(117), _IO_U_(118), _IO_U_(119),
463
464 _IO_U_(120), _IO__D(121), _IO__D(122), _IO__D(123), _IO__D(124),
465 _IO__D(125), _IO__D(126), _IO__D(127), _IO__D(128), _IO_UD(129),
466
467 _IO_UD(130), _IO_UD(131), _IO_UD(132), _IO_UD(133), _IO_UD(134),
468 _IO_UD(135), _IO__D(136), _IO__D(137), _IO__D(138), _IO__D(139),
469
470 _IO__D(140), _IO__D(141), _IO__D(142), _IO_UD(143), _IO__D(144),
471 _IO__D(145), _IO__D(146), _IO__D(147), _IO__D(148), _IO__D(149),
472
473 _IO__D(150), _IO__D(151), _IO_UD(152), _I___D(153), _IO_UD(154),
474 _I___D(155), _IO__D(156), _IO__D(157), _I___D(158), _IO__D(159),
475
476 __O___(160), _IO__D(161), _IO__D(162), _IO__D(163), _I___D(164),
477 _IO__D(165), _I___D(166), _I___D(167), _I___D(168), _I___D(169),
478
479 _I___D(170), __O___(171), _IO_UD(172), _IO_UD(173), _IO_UD(174),
480 _IO_UD(175), _IO_UD(176), _IO_UD(177), _IO_UD(178), __O___(179),
481
482 _IO_UD(180), _IO_UD(181), _IO_UD(182), _IO_UD(183), _IO_UD(184),
483 __O___(185), _IO_UD(186), _IO_UD(187), _IO_UD(188), _IO_UD(189),
484
485 _IO_UD(190),
486
487 /* IRQ */
488 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
489 PINMUX_DATA(IRQ0_162_MARK, PORT162_FN0, MSEL1CR_0_1),
490 PINMUX_DATA(IRQ1_MARK, PORT12_FN0),
491 PINMUX_DATA(IRQ2_4_MARK, PORT4_FN0, MSEL1CR_2_0),
492 PINMUX_DATA(IRQ2_5_MARK, PORT5_FN0, MSEL1CR_2_1),
493 PINMUX_DATA(IRQ3_8_MARK, PORT8_FN0, MSEL1CR_3_0),
494 PINMUX_DATA(IRQ3_16_MARK, PORT16_FN0, MSEL1CR_3_1),
495 PINMUX_DATA(IRQ4_17_MARK, PORT17_FN0, MSEL1CR_4_0),
496 PINMUX_DATA(IRQ4_163_MARK, PORT163_FN0, MSEL1CR_4_1),
497 PINMUX_DATA(IRQ5_MARK, PORT18_FN0),
498 PINMUX_DATA(IRQ6_39_MARK, PORT39_FN0, MSEL1CR_6_0),
499 PINMUX_DATA(IRQ6_164_MARK, PORT164_FN0, MSEL1CR_6_1),
500 PINMUX_DATA(IRQ7_40_MARK, PORT40_FN0, MSEL1CR_7_1),
501 PINMUX_DATA(IRQ7_167_MARK, PORT167_FN0, MSEL1CR_7_0),
502 PINMUX_DATA(IRQ8_41_MARK, PORT41_FN0, MSEL1CR_8_1),
503 PINMUX_DATA(IRQ8_168_MARK, PORT168_FN0, MSEL1CR_8_0),
504 PINMUX_DATA(IRQ9_42_MARK, PORT42_FN0, MSEL1CR_9_0),
505 PINMUX_DATA(IRQ9_169_MARK, PORT169_FN0, MSEL1CR_9_1),
506 PINMUX_DATA(IRQ10_MARK, PORT65_FN0, MSEL1CR_9_1),
507 PINMUX_DATA(IRQ11_MARK, PORT67_FN0),
508 PINMUX_DATA(IRQ12_80_MARK, PORT80_FN0, MSEL1CR_12_0),
509 PINMUX_DATA(IRQ12_137_MARK, PORT137_FN0, MSEL1CR_12_1),
510 PINMUX_DATA(IRQ13_81_MARK, PORT81_FN0, MSEL1CR_13_0),
511 PINMUX_DATA(IRQ13_145_MARK, PORT145_FN0, MSEL1CR_13_1),
512 PINMUX_DATA(IRQ14_82_MARK, PORT82_FN0, MSEL1CR_14_0),
513 PINMUX_DATA(IRQ14_146_MARK, PORT146_FN0, MSEL1CR_14_1),
514 PINMUX_DATA(IRQ15_83_MARK, PORT83_FN0, MSEL1CR_15_0),
515 PINMUX_DATA(IRQ15_147_MARK, PORT147_FN0, MSEL1CR_15_1),
516 PINMUX_DATA(IRQ16_84_MARK, PORT84_FN0, MSEL1CR_16_0),
517 PINMUX_DATA(IRQ16_170_MARK, PORT170_FN0, MSEL1CR_16_1),
518 PINMUX_DATA(IRQ17_MARK, PORT85_FN0),
519 PINMUX_DATA(IRQ18_MARK, PORT86_FN0),
520 PINMUX_DATA(IRQ19_MARK, PORT87_FN0),
521 PINMUX_DATA(IRQ20_MARK, PORT92_FN0),
522 PINMUX_DATA(IRQ21_MARK, PORT93_FN0),
523 PINMUX_DATA(IRQ22_MARK, PORT94_FN0),
524 PINMUX_DATA(IRQ23_MARK, PORT95_FN0),
525 PINMUX_DATA(IRQ24_MARK, PORT112_FN0),
526 PINMUX_DATA(IRQ25_MARK, PORT119_FN0),
527 PINMUX_DATA(IRQ26_121_MARK, PORT121_FN0, MSEL1CR_26_1),
528 PINMUX_DATA(IRQ26_172_MARK, PORT172_FN0, MSEL1CR_26_0),
529 PINMUX_DATA(IRQ27_122_MARK, PORT122_FN0, MSEL1CR_27_1),
530 PINMUX_DATA(IRQ27_180_MARK, PORT180_FN0, MSEL1CR_27_0),
531 PINMUX_DATA(IRQ28_123_MARK, PORT123_FN0, MSEL1CR_28_1),
532 PINMUX_DATA(IRQ28_181_MARK, PORT181_FN0, MSEL1CR_28_0),
533 PINMUX_DATA(IRQ29_129_MARK, PORT129_FN0, MSEL1CR_29_1),
534 PINMUX_DATA(IRQ29_182_MARK, PORT182_FN0, MSEL1CR_29_0),
535 PINMUX_DATA(IRQ30_130_MARK, PORT130_FN0, MSEL1CR_30_1),
536 PINMUX_DATA(IRQ30_183_MARK, PORT183_FN0, MSEL1CR_30_0),
537 PINMUX_DATA(IRQ31_138_MARK, PORT138_FN0, MSEL1CR_31_1),
538 PINMUX_DATA(IRQ31_184_MARK, PORT184_FN0, MSEL1CR_31_0),
539
540 /* Function 1 */
541 PINMUX_DATA(BBIF2_TSCK1_MARK, PORT0_FN1),
542 PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT1_FN1),
543 PINMUX_DATA(BBIF2_TXD1_MARK, PORT2_FN1),
544 PINMUX_DATA(BBIF2_RXD_MARK, PORT3_FN1),
545 PINMUX_DATA(FSIACK_MARK, PORT4_FN1),
546 PINMUX_DATA(FSIAILR_MARK, PORT5_FN1),
547 PINMUX_DATA(FSIAIBT_MARK, PORT6_FN1),
548 PINMUX_DATA(FSIAISLD_MARK, PORT7_FN1),
549 PINMUX_DATA(FSIAOMC_MARK, PORT8_FN1),
550 PINMUX_DATA(FSIAOLR_MARK, PORT9_FN1),
551 PINMUX_DATA(FSIAOBT_MARK, PORT10_FN1),
552 PINMUX_DATA(FSIAOSLD_MARK, PORT11_FN1),
553 PINMUX_DATA(FMSOCK_MARK, PORT12_FN1),
554 PINMUX_DATA(FMSOOLR_MARK, PORT13_FN1),
555 PINMUX_DATA(FMSOOBT_MARK, PORT14_FN1),
556 PINMUX_DATA(FMSOSLD_MARK, PORT15_FN1),
557 PINMUX_DATA(FMSOILR_MARK, PORT16_FN1),
558 PINMUX_DATA(FMSOIBT_MARK, PORT17_FN1),
559 PINMUX_DATA(FMSISLD_MARK, PORT18_FN1),
560 PINMUX_DATA(A0_MARK, PORT19_FN1),
561 PINMUX_DATA(A1_MARK, PORT20_FN1),
562 PINMUX_DATA(A2_MARK, PORT21_FN1),
563 PINMUX_DATA(A3_MARK, PORT22_FN1),
564 PINMUX_DATA(A4_FOE_MARK, PORT23_FN1),
565 PINMUX_DATA(A5_FCDE_MARK, PORT24_FN1),
566 PINMUX_DATA(A6_MARK, PORT25_FN1),
567 PINMUX_DATA(A7_MARK, PORT26_FN1),
568 PINMUX_DATA(A8_MARK, PORT27_FN1),
569 PINMUX_DATA(A9_MARK, PORT28_FN1),
570 PINMUX_DATA(A10_MARK, PORT29_FN1),
571 PINMUX_DATA(A11_MARK, PORT30_FN1),
572 PINMUX_DATA(A12_MARK, PORT31_FN1),
573 PINMUX_DATA(A13_MARK, PORT32_FN1),
574 PINMUX_DATA(A14_MARK, PORT33_FN1),
575 PINMUX_DATA(A15_MARK, PORT34_FN1),
576 PINMUX_DATA(A16_MARK, PORT35_FN1),
577 PINMUX_DATA(A17_MARK, PORT36_FN1),
578 PINMUX_DATA(A18_MARK, PORT37_FN1),
579 PINMUX_DATA(A19_MARK, PORT38_FN1),
580 PINMUX_DATA(A20_MARK, PORT39_FN1),
581 PINMUX_DATA(A21_MARK, PORT40_FN1),
582 PINMUX_DATA(A22_MARK, PORT41_FN1),
583 PINMUX_DATA(A23_MARK, PORT42_FN1),
584 PINMUX_DATA(A24_MARK, PORT43_FN1),
585 PINMUX_DATA(A25_MARK, PORT44_FN1),
586 PINMUX_DATA(A26_MARK, PORT45_FN1),
587 PINMUX_DATA(D0_NAF0_MARK, PORT46_FN1),
588 PINMUX_DATA(D1_NAF1_MARK, PORT47_FN1),
589 PINMUX_DATA(D2_NAF2_MARK, PORT48_FN1),
590 PINMUX_DATA(D3_NAF3_MARK, PORT49_FN1),
591 PINMUX_DATA(D4_NAF4_MARK, PORT50_FN1),
592 PINMUX_DATA(D5_NAF5_MARK, PORT51_FN1),
593 PINMUX_DATA(D6_NAF6_MARK, PORT52_FN1),
594 PINMUX_DATA(D7_NAF7_MARK, PORT53_FN1),
595 PINMUX_DATA(D8_NAF8_MARK, PORT54_FN1),
596 PINMUX_DATA(D9_NAF9_MARK, PORT55_FN1),
597 PINMUX_DATA(D10_NAF10_MARK, PORT56_FN1),
598 PINMUX_DATA(D11_NAF11_MARK, PORT57_FN1),
599 PINMUX_DATA(D12_NAF12_MARK, PORT58_FN1),
600 PINMUX_DATA(D13_NAF13_MARK, PORT59_FN1),
601 PINMUX_DATA(D14_NAF14_MARK, PORT60_FN1),
602 PINMUX_DATA(D15_NAF15_MARK, PORT61_FN1),
603 PINMUX_DATA(CS0_MARK, PORT62_FN1),
604 PINMUX_DATA(CS2_MARK, PORT63_FN1),
605 PINMUX_DATA(CS4_MARK, PORT64_FN1),
606 PINMUX_DATA(CS5A_MARK, PORT65_FN1),
607 PINMUX_DATA(CS5B_MARK, PORT66_FN1),
608 PINMUX_DATA(CS6A_MARK, PORT67_FN1),
609 PINMUX_DATA(FCE0_MARK, PORT68_FN1),
610 PINMUX_DATA(RD_FSC_MARK, PORT69_FN1),
611 PINMUX_DATA(WE0_FWE_MARK, PORT70_FN1),
612 PINMUX_DATA(WE1_MARK, PORT71_FN1),
613 PINMUX_DATA(CKO_MARK, PORT72_FN1),
614 PINMUX_DATA(FRB_MARK, PORT73_FN1),
615 PINMUX_DATA(WAIT_MARK, PORT74_FN1),
616 PINMUX_DATA(RDWR_MARK, PORT75_FN1),
617 PINMUX_DATA(MEMC_AD0_MARK, PORT76_FN1),
618 PINMUX_DATA(MEMC_AD1_MARK, PORT77_FN1),
619 PINMUX_DATA(MEMC_AD2_MARK, PORT78_FN1),
620 PINMUX_DATA(MEMC_AD3_MARK, PORT79_FN1),
621 PINMUX_DATA(MEMC_AD4_MARK, PORT80_FN1),
622 PINMUX_DATA(MEMC_AD5_MARK, PORT81_FN1),
623 PINMUX_DATA(MEMC_AD6_MARK, PORT82_FN1),
624 PINMUX_DATA(MEMC_AD7_MARK, PORT83_FN1),
625 PINMUX_DATA(MEMC_AD8_MARK, PORT84_FN1),
626 PINMUX_DATA(MEMC_AD9_MARK, PORT85_FN1),
627 PINMUX_DATA(MEMC_AD10_MARK, PORT86_FN1),
628 PINMUX_DATA(MEMC_AD11_MARK, PORT87_FN1),
629 PINMUX_DATA(MEMC_AD12_MARK, PORT88_FN1),
630 PINMUX_DATA(MEMC_AD13_MARK, PORT89_FN1),
631 PINMUX_DATA(MEMC_AD14_MARK, PORT90_FN1),
632 PINMUX_DATA(MEMC_AD15_MARK, PORT91_FN1),
633 PINMUX_DATA(MEMC_CS0_MARK, PORT92_FN1),
634 PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK, PORT93_FN1),
635 PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK, PORT94_FN1),
636 PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK, PORT95_FN1),
637 PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK, PORT96_FN1),
638 PINMUX_DATA(MEMC_NOE_MARK, PORT97_FN1),
639 PINMUX_DATA(MEMC_NWE_MARK, PORT98_FN1),
640 PINMUX_DATA(MEMC_INT_MARK, PORT99_FN1),
641 PINMUX_DATA(VIO_VD_MARK, PORT100_FN1),
642 PINMUX_DATA(VIO_HD_MARK, PORT101_FN1),
643 PINMUX_DATA(VIO_D0_MARK, PORT102_FN1),
644 PINMUX_DATA(VIO_D1_MARK, PORT103_FN1),
645 PINMUX_DATA(VIO_D2_MARK, PORT104_FN1),
646 PINMUX_DATA(VIO_D3_MARK, PORT105_FN1),
647 PINMUX_DATA(VIO_D4_MARK, PORT106_FN1),
648 PINMUX_DATA(VIO_D5_MARK, PORT107_FN1),
649 PINMUX_DATA(VIO_D6_MARK, PORT108_FN1),
650 PINMUX_DATA(VIO_D7_MARK, PORT109_FN1),
651 PINMUX_DATA(VIO_D8_MARK, PORT110_FN1),
652 PINMUX_DATA(VIO_D9_MARK, PORT111_FN1),
653 PINMUX_DATA(VIO_D10_MARK, PORT112_FN1),
654 PINMUX_DATA(VIO_D11_MARK, PORT113_FN1),
655 PINMUX_DATA(VIO_D12_MARK, PORT114_FN1),
656 PINMUX_DATA(VIO_D13_MARK, PORT115_FN1),
657 PINMUX_DATA(VIO_D14_MARK, PORT116_FN1),
658 PINMUX_DATA(VIO_D15_MARK, PORT117_FN1),
659 PINMUX_DATA(VIO_CLK_MARK, PORT118_FN1),
660 PINMUX_DATA(VIO_FIELD_MARK, PORT119_FN1),
661 PINMUX_DATA(VIO_CKO_MARK, PORT120_FN1),
662 PINMUX_DATA(LCDD0_MARK, PORT121_FN1),
663 PINMUX_DATA(LCDD1_MARK, PORT122_FN1),
664 PINMUX_DATA(LCDD2_MARK, PORT123_FN1),
665 PINMUX_DATA(LCDD3_MARK, PORT124_FN1),
666 PINMUX_DATA(LCDD4_MARK, PORT125_FN1),
667 PINMUX_DATA(LCDD5_MARK, PORT126_FN1),
668 PINMUX_DATA(LCDD6_MARK, PORT127_FN1),
669 PINMUX_DATA(LCDD7_MARK, PORT128_FN1),
670 PINMUX_DATA(LCDD8_MARK, PORT129_FN1),
671 PINMUX_DATA(LCDD9_MARK, PORT130_FN1),
672 PINMUX_DATA(LCDD10_MARK, PORT131_FN1),
673 PINMUX_DATA(LCDD11_MARK, PORT132_FN1),
674 PINMUX_DATA(LCDD12_MARK, PORT133_FN1),
675 PINMUX_DATA(LCDD13_MARK, PORT134_FN1),
676 PINMUX_DATA(LCDD14_MARK, PORT135_FN1),
677 PINMUX_DATA(LCDD15_MARK, PORT136_FN1),
678 PINMUX_DATA(LCDD16_MARK, PORT137_FN1),
679 PINMUX_DATA(LCDD17_MARK, PORT138_FN1),
680 PINMUX_DATA(LCDD18_MARK, PORT139_FN1),
681 PINMUX_DATA(LCDD19_MARK, PORT140_FN1),
682 PINMUX_DATA(LCDD20_MARK, PORT141_FN1),
683 PINMUX_DATA(LCDD21_MARK, PORT142_FN1),
684 PINMUX_DATA(LCDD22_MARK, PORT143_FN1),
685 PINMUX_DATA(LCDD23_MARK, PORT144_FN1),
686 PINMUX_DATA(LCDHSYN_MARK, PORT145_FN1),
687 PINMUX_DATA(LCDVSYN_MARK, PORT146_FN1),
688 PINMUX_DATA(LCDDCK_MARK, PORT147_FN1),
689 PINMUX_DATA(LCDRD_MARK, PORT148_FN1),
690 PINMUX_DATA(LCDDISP_MARK, PORT149_FN1),
691 PINMUX_DATA(LCDLCLK_MARK, PORT150_FN1),
692 PINMUX_DATA(LCDDON_MARK, PORT151_FN1),
693 PINMUX_DATA(SCIFA0_TXD_MARK, PORT152_FN1),
694 PINMUX_DATA(SCIFA0_RXD_MARK, PORT153_FN1),
695 PINMUX_DATA(SCIFA1_TXD_MARK, PORT154_FN1),
696 PINMUX_DATA(SCIFA1_RXD_MARK, PORT155_FN1),
697 PINMUX_DATA(TS_SPSYNC1_MARK, PORT156_FN1),
698 PINMUX_DATA(TS_SDAT1_MARK, PORT157_FN1),
699 PINMUX_DATA(TS_SDEN1_MARK, PORT158_FN1),
700 PINMUX_DATA(TS_SCK1_MARK, PORT159_FN1),
701 PINMUX_DATA(TPU0TO0_MARK, PORT160_FN1),
702 PINMUX_DATA(TPU0TO1_MARK, PORT161_FN1),
703 PINMUX_DATA(SCIFB_SCK_MARK, PORT162_FN1),
704 PINMUX_DATA(SCIFB_RTS_MARK, PORT163_FN1),
705 PINMUX_DATA(SCIFB_CTS_MARK, PORT164_FN1),
706 PINMUX_DATA(SCIFB_TXD_MARK, PORT165_FN1),
707 PINMUX_DATA(SCIFB_RXD_MARK, PORT166_FN1),
708 PINMUX_DATA(VBUS0_0_MARK, PORT167_FN1),
709 PINMUX_DATA(VBUS0_1_MARK, PORT168_FN1),
710 PINMUX_DATA(HDMI_HPD_MARK, PORT169_FN1),
711 PINMUX_DATA(HDMI_CEC_MARK, PORT170_FN1),
712 PINMUX_DATA(SDHICLK0_MARK, PORT171_FN1),
713 PINMUX_DATA(SDHICD0_MARK, PORT172_FN1),
714 PINMUX_DATA(SDHID0_0_MARK, PORT173_FN1),
715 PINMUX_DATA(SDHID0_1_MARK, PORT174_FN1),
716 PINMUX_DATA(SDHID0_2_MARK, PORT175_FN1),
717 PINMUX_DATA(SDHID0_3_MARK, PORT176_FN1),
718 PINMUX_DATA(SDHICMD0_MARK, PORT177_FN1),
719 PINMUX_DATA(SDHIWP0_MARK, PORT178_FN1),
720 PINMUX_DATA(SDHICLK1_MARK, PORT179_FN1),
721 PINMUX_DATA(SDHID1_0_MARK, PORT180_FN1),
722 PINMUX_DATA(SDHID1_1_MARK, PORT181_FN1),
723 PINMUX_DATA(SDHID1_2_MARK, PORT182_FN1),
724 PINMUX_DATA(SDHID1_3_MARK, PORT183_FN1),
725 PINMUX_DATA(SDHICMD1_MARK, PORT184_FN1),
726 PINMUX_DATA(SDHICLK2_MARK, PORT185_FN1),
727 PINMUX_DATA(SDHID2_0_MARK, PORT186_FN1),
728 PINMUX_DATA(SDHID2_1_MARK, PORT187_FN1),
729 PINMUX_DATA(SDHID2_2_MARK, PORT188_FN1),
730 PINMUX_DATA(SDHID2_3_MARK, PORT189_FN1),
731 PINMUX_DATA(SDHICMD2_MARK, PORT190_FN1),
732
733 /* Function 2 */
734 PINMUX_DATA(FSIBCK_MARK, PORT4_FN2),
735 PINMUX_DATA(SCIFA4_RXD_MARK, PORT5_FN2),
736 PINMUX_DATA(SCIFA4_TXD_MARK, PORT6_FN2),
737 PINMUX_DATA(SCIFA5_RXD_MARK, PORT8_FN2),
738 PINMUX_DATA(FSIASPDIF_11_MARK, PORT11_FN2),
739 PINMUX_DATA(SCIFA5_TXD_MARK, PORT12_FN2),
740 PINMUX_DATA(FMSIOLR_MARK, PORT13_FN2),
741 PINMUX_DATA(FMSIOBT_MARK, PORT14_FN2),
742 PINMUX_DATA(FSIASPDIF_15_MARK, PORT15_FN2),
743 PINMUX_DATA(FMSIILR_MARK, PORT16_FN2),
744 PINMUX_DATA(FMSIIBT_MARK, PORT17_FN2),
745 PINMUX_DATA(BS_MARK, PORT19_FN2),
746 PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT36_FN2),
747 PINMUX_DATA(MSIOF0_TSCK_MARK, PORT37_FN2),
748 PINMUX_DATA(MSIOF0_RXD_MARK, PORT38_FN2),
749 PINMUX_DATA(MSIOF0_RSCK_MARK, PORT39_FN2),
750 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT40_FN2),
751 PINMUX_DATA(MSIOF0_MCK0_MARK, PORT41_FN2),
752 PINMUX_DATA(MSIOF0_MCK1_MARK, PORT42_FN2),
753 PINMUX_DATA(MSIOF0_SS1_MARK, PORT43_FN2),
754 PINMUX_DATA(MSIOF0_SS2_MARK, PORT44_FN2),
755 PINMUX_DATA(MSIOF0_TXD_MARK, PORT45_FN2),
756 PINMUX_DATA(FMSICK_MARK, PORT65_FN2),
757 PINMUX_DATA(FCE1_MARK, PORT66_FN2),
758 PINMUX_DATA(BBIF1_RXD_MARK, PORT76_FN2),
759 PINMUX_DATA(BBIF1_TSYNC_MARK, PORT77_FN2),
760 PINMUX_DATA(BBIF1_TSCK_MARK, PORT78_FN2),
761 PINMUX_DATA(BBIF1_TXD_MARK, PORT79_FN2),
762 PINMUX_DATA(BBIF1_RSCK_MARK, PORT80_FN2),
763 PINMUX_DATA(BBIF1_RSYNC_MARK, PORT81_FN2),
764 PINMUX_DATA(BBIF1_FLOW_MARK, PORT82_FN2),
765 PINMUX_DATA(BB_RX_FLOW_N_MARK, PORT83_FN2),
766 PINMUX_DATA(MSIOF1_RSCK_MARK, PORT84_FN2),
767 PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT85_FN2),
768 PINMUX_DATA(MSIOF1_MCK0_MARK, PORT86_FN2),
769 PINMUX_DATA(MSIOF1_MCK1_MARK, PORT87_FN2),
770 PINMUX_DATA(MSIOF1_TSCK_88_MARK, PORT88_FN2, MSEL4CR_10_1),
771 PINMUX_DATA(MSIOF1_TSYNC_89_MARK, PORT89_FN2, MSEL4CR_10_1),
772 PINMUX_DATA(MSIOF1_TXD_90_MARK, PORT90_FN2, MSEL4CR_10_1),
773 PINMUX_DATA(MSIOF1_RXD_91_MARK, PORT91_FN2, MSEL4CR_10_1),
774 PINMUX_DATA(MSIOF1_SS1_92_MARK, PORT92_FN2, MSEL4CR_10_1),
775 PINMUX_DATA(MSIOF1_SS2_93_MARK, PORT93_FN2, MSEL4CR_10_1),
776 PINMUX_DATA(SCIFA2_CTS1_MARK, PORT94_FN2),
777 PINMUX_DATA(SCIFA2_RTS1_MARK, PORT95_FN2),
778 PINMUX_DATA(SCIFA2_TXD1_MARK, PORT96_FN2),
779 PINMUX_DATA(SCIFA2_RXD1_MARK, PORT97_FN2),
780 PINMUX_DATA(SCIFA2_SCK1_MARK, PORT98_FN2),
781 PINMUX_DATA(I2C_SCL2_MARK, PORT110_FN2),
782 PINMUX_DATA(I2C_SDA2_MARK, PORT111_FN2),
783 PINMUX_DATA(I2C_SCL3_MARK, PORT114_FN2, MSEL4CR_16_1),
784 PINMUX_DATA(I2C_SDA3_MARK, PORT115_FN2, MSEL4CR_16_1),
785 PINMUX_DATA(I2C_SCL4_MARK, PORT116_FN2, MSEL4CR_17_1),
786 PINMUX_DATA(I2C_SDA4_MARK, PORT117_FN2, MSEL4CR_17_1),
787 PINMUX_DATA(MSIOF2_RSCK_MARK, PORT134_FN2),
788 PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT135_FN2),
789 PINMUX_DATA(MSIOF2_MCK0_MARK, PORT136_FN2),
790 PINMUX_DATA(MSIOF2_MCK1_MARK, PORT137_FN2),
791 PINMUX_DATA(MSIOF2_SS1_MARK, PORT138_FN2),
792 PINMUX_DATA(MSIOF2_SS2_MARK, PORT139_FN2),
793 PINMUX_DATA(SCIFA3_CTS_140_MARK, PORT140_FN2, MSEL3CR_9_1),
794 PINMUX_DATA(SCIFA3_RTS_141_MARK, PORT141_FN2),
795 PINMUX_DATA(SCIFA3_SCK_MARK, PORT142_FN2),
796 PINMUX_DATA(SCIFA3_TXD_MARK, PORT143_FN2),
797 PINMUX_DATA(SCIFA3_RXD_MARK, PORT144_FN2),
798 PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT148_FN2),
799 PINMUX_DATA(MSIOF2_TSCK_MARK, PORT149_FN2),
800 PINMUX_DATA(MSIOF2_RXD_MARK, PORT150_FN2),
801 PINMUX_DATA(MSIOF2_TXD_MARK, PORT151_FN2),
802 PINMUX_DATA(SCIFA0_SCK_MARK, PORT156_FN2),
803 PINMUX_DATA(SCIFA0_RTS_MARK, PORT157_FN2),
804 PINMUX_DATA(SCIFA0_CTS_MARK, PORT158_FN2),
805 PINMUX_DATA(SCIFA1_SCK_MARK, PORT159_FN2),
806 PINMUX_DATA(SCIFA1_RTS_MARK, PORT160_FN2),
807 PINMUX_DATA(SCIFA1_CTS_MARK, PORT161_FN2),
808
809 /* Function 3 */
810 PINMUX_DATA(VIO_CKO1_MARK, PORT16_FN3),
811 PINMUX_DATA(VIO_CKO2_MARK, PORT17_FN3),
812 PINMUX_DATA(IDIN_1_18_MARK, PORT18_FN3, MSEL4CR_14_1),
813 PINMUX_DATA(MSIOF1_TSCK_39_MARK, PORT39_FN3, MSEL4CR_10_0),
814 PINMUX_DATA(MSIOF1_TSYNC_40_MARK, PORT40_FN3, MSEL4CR_10_0),
815 PINMUX_DATA(MSIOF1_TXD_41_MARK, PORT41_FN3, MSEL4CR_10_0),
816 PINMUX_DATA(MSIOF1_RXD_42_MARK, PORT42_FN3, MSEL4CR_10_0),
817 PINMUX_DATA(MSIOF1_SS1_43_MARK, PORT43_FN3, MSEL4CR_10_0),
818 PINMUX_DATA(MSIOF1_SS2_44_MARK, PORT44_FN3, MSEL4CR_10_0),
819 PINMUX_DATA(MMCD1_0_MARK, PORT54_FN3, MSEL4CR_15_1),
820 PINMUX_DATA(MMCD1_1_MARK, PORT55_FN3, MSEL4CR_15_1),
821 PINMUX_DATA(MMCD1_2_MARK, PORT56_FN3, MSEL4CR_15_1),
822 PINMUX_DATA(MMCD1_3_MARK, PORT57_FN3, MSEL4CR_15_1),
823 PINMUX_DATA(MMCD1_4_MARK, PORT58_FN3, MSEL4CR_15_1),
824 PINMUX_DATA(MMCD1_5_MARK, PORT59_FN3, MSEL4CR_15_1),
825 PINMUX_DATA(MMCD1_6_MARK, PORT60_FN3, MSEL4CR_15_1),
826 PINMUX_DATA(MMCD1_7_MARK, PORT61_FN3, MSEL4CR_15_1),
827 PINMUX_DATA(VINT_I_MARK, PORT65_FN3),
828 PINMUX_DATA(MMCCLK1_MARK, PORT66_FN3, MSEL4CR_15_1),
829 PINMUX_DATA(MMCCMD1_MARK, PORT67_FN3, MSEL4CR_15_1),
830 PINMUX_DATA(TPU0TO2_93_MARK, PORT93_FN3),
831 PINMUX_DATA(TPU0TO2_99_MARK, PORT99_FN3),
832 PINMUX_DATA(TPU0TO3_MARK, PORT112_FN3),
833 PINMUX_DATA(IDIN_0_MARK, PORT113_FN3),
834 PINMUX_DATA(EXTLP_0_MARK, PORT114_FN3),
835 PINMUX_DATA(OVCN2_0_MARK, PORT115_FN3),
836 PINMUX_DATA(PWEN_0_MARK, PORT116_FN3),
837 PINMUX_DATA(OVCN_0_MARK, PORT117_FN3),
838 PINMUX_DATA(KEYOUT7_MARK, PORT121_FN3),
839 PINMUX_DATA(KEYOUT6_MARK, PORT122_FN3),
840 PINMUX_DATA(KEYOUT5_MARK, PORT123_FN3),
841 PINMUX_DATA(KEYOUT4_MARK, PORT124_FN3),
842 PINMUX_DATA(KEYOUT3_MARK, PORT125_FN3),
843 PINMUX_DATA(KEYOUT2_MARK, PORT126_FN3),
844 PINMUX_DATA(KEYOUT1_MARK, PORT127_FN3),
845 PINMUX_DATA(KEYOUT0_MARK, PORT128_FN3),
846 PINMUX_DATA(KEYIN7_MARK, PORT129_FN3),
847 PINMUX_DATA(KEYIN6_MARK, PORT130_FN3),
848 PINMUX_DATA(KEYIN5_MARK, PORT131_FN3),
849 PINMUX_DATA(KEYIN4_MARK, PORT132_FN3),
850 PINMUX_DATA(KEYIN3_133_MARK, PORT133_FN3, MSEL4CR_18_0),
851 PINMUX_DATA(KEYIN2_134_MARK, PORT134_FN3, MSEL4CR_18_0),
852 PINMUX_DATA(KEYIN1_135_MARK, PORT135_FN3, MSEL4CR_18_0),
853 PINMUX_DATA(KEYIN0_136_MARK, PORT136_FN3, MSEL4CR_18_0),
854 PINMUX_DATA(TS_SPSYNC2_MARK, PORT137_FN3),
855 PINMUX_DATA(IROUT_139_MARK, PORT139_FN3),
856 PINMUX_DATA(IRDA_OUT_MARK, PORT140_FN3),
857 PINMUX_DATA(IRDA_IN_MARK, PORT141_FN3),
858 PINMUX_DATA(IRDA_FIRSEL_MARK, PORT142_FN3),
859 PINMUX_DATA(TS_SDAT2_MARK, PORT145_FN3),
860 PINMUX_DATA(TS_SDEN2_MARK, PORT146_FN3),
861 PINMUX_DATA(TS_SCK2_MARK, PORT147_FN3),
862
863 /* Function 4 */
864 PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
865 PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
866 PINMUX_DATA(GP_RX_FLAG_MARK, PORT76_FN4),
867 PINMUX_DATA(GP_RX_DATA_MARK, PORT77_FN4),
868 PINMUX_DATA(GP_TX_READY_MARK, PORT78_FN4),
869 PINMUX_DATA(GP_RX_WAKE_MARK, PORT79_FN4),
870 PINMUX_DATA(MP_TX_FLAG_MARK, PORT80_FN4),
871 PINMUX_DATA(MP_TX_DATA_MARK, PORT81_FN4),
872 PINMUX_DATA(MP_RX_READY_MARK, PORT82_FN4),
873 PINMUX_DATA(MP_TX_WAKE_MARK, PORT83_FN4),
874 PINMUX_DATA(MMCD0_0_MARK, PORT84_FN4, MSEL4CR_15_0),
875 PINMUX_DATA(MMCD0_1_MARK, PORT85_FN4, MSEL4CR_15_0),
876 PINMUX_DATA(MMCD0_2_MARK, PORT86_FN4, MSEL4CR_15_0),
877 PINMUX_DATA(MMCD0_3_MARK, PORT87_FN4, MSEL4CR_15_0),
878 PINMUX_DATA(MMCD0_4_MARK, PORT88_FN4, MSEL4CR_15_0),
879 PINMUX_DATA(MMCD0_5_MARK, PORT89_FN4, MSEL4CR_15_0),
880 PINMUX_DATA(MMCD0_6_MARK, PORT90_FN4, MSEL4CR_15_0),
881 PINMUX_DATA(MMCD0_7_MARK, PORT91_FN4, MSEL4CR_15_0),
882 PINMUX_DATA(MMCCMD0_MARK, PORT92_FN4, MSEL4CR_15_0),
883 PINMUX_DATA(SIM_RST_MARK, PORT94_FN4),
884 PINMUX_DATA(SIM_CLK_MARK, PORT95_FN4),
885 PINMUX_DATA(SIM_D_MARK, PORT98_FN4),
886 PINMUX_DATA(MMCCLK0_MARK, PORT99_FN4, MSEL4CR_15_0),
887 PINMUX_DATA(IDIN_1_113_MARK, PORT113_FN4, MSEL4CR_14_0),
888 PINMUX_DATA(OVCN_1_114_MARK, PORT114_FN4, MSEL4CR_14_0),
889 PINMUX_DATA(PWEN_1_115_MARK, PORT115_FN4),
890 PINMUX_DATA(EXTLP_1_MARK, PORT116_FN4),
891 PINMUX_DATA(OVCN2_1_MARK, PORT117_FN4),
892 PINMUX_DATA(KEYIN0_121_MARK, PORT121_FN4, MSEL4CR_18_1),
893 PINMUX_DATA(KEYIN1_122_MARK, PORT122_FN4, MSEL4CR_18_1),
894 PINMUX_DATA(KEYIN2_123_MARK, PORT123_FN4, MSEL4CR_18_1),
895 PINMUX_DATA(KEYIN3_124_MARK, PORT124_FN4, MSEL4CR_18_1),
896 PINMUX_DATA(PWEN_1_138_MARK, PORT138_FN4),
897 PINMUX_DATA(IROUT_140_MARK, PORT140_FN4),
898 PINMUX_DATA(LCDCS_MARK, PORT145_FN4),
899 PINMUX_DATA(LCDWR_MARK, PORT147_FN4),
900 PINMUX_DATA(LCDRS_MARK, PORT149_FN4),
901 PINMUX_DATA(OVCN_1_162_MARK, PORT162_FN4, MSEL4CR_14_1),
902
903 /* Function 5 */
904 PINMUX_DATA(GPI0_MARK, PORT41_FN5),
905 PINMUX_DATA(GPI1_MARK, PORT42_FN5),
906 PINMUX_DATA(GPO0_MARK, PORT43_FN5),
907 PINMUX_DATA(GPO1_MARK, PORT44_FN5),
908 PINMUX_DATA(I2C_SCL3S_MARK, PORT137_FN5, MSEL4CR_16_0),
909 PINMUX_DATA(I2C_SDA3S_MARK, PORT145_FN5, MSEL4CR_16_0),
910 PINMUX_DATA(I2C_SCL4S_MARK, PORT146_FN5, MSEL4CR_17_0),
911 PINMUX_DATA(I2C_SDA4S_MARK, PORT147_FN5, MSEL4CR_17_0),
912
913 /* Function select */
914 PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0),
915 PINMUX_DATA(LCDC1_SELECT_MARK, MSEL3CR_6_1),
916
917 PINMUX_DATA(TS0_1SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_0),
918 PINMUX_DATA(TS0_2SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_1),
919 PINMUX_DATA(TS1_1SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_0),
920 PINMUX_DATA(TS1_2SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_1),
921
922 PINMUX_DATA(SDENC_CPG_MARK, MSEL4CR_19_0),
923 PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
924
925 PINMUX_DATA(MFIv6_MARK, MSEL4CR_6_0),
926 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
927};
928
929#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
930#define GPIO_PORT_ALL() _190(_GPIO_PORT, , unused)
931#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
932
933static struct pinmux_gpio pinmux_gpios[] = {
934
935 /* PORT */
936 GPIO_PORT_ALL(),
937
938 /* IRQ */
939 GPIO_FN(IRQ0_6), GPIO_FN(IRQ0_162), GPIO_FN(IRQ1),
940 GPIO_FN(IRQ2_4), GPIO_FN(IRQ2_5), GPIO_FN(IRQ3_8),
941 GPIO_FN(IRQ3_16), GPIO_FN(IRQ4_17), GPIO_FN(IRQ4_163),
942 GPIO_FN(IRQ5), GPIO_FN(IRQ6_39), GPIO_FN(IRQ6_164),
943 GPIO_FN(IRQ7_40), GPIO_FN(IRQ7_167), GPIO_FN(IRQ8_41),
944 GPIO_FN(IRQ8_168), GPIO_FN(IRQ9_42), GPIO_FN(IRQ9_169),
945 GPIO_FN(IRQ10), GPIO_FN(IRQ11), GPIO_FN(IRQ12_80),
946 GPIO_FN(IRQ12_137), GPIO_FN(IRQ13_81), GPIO_FN(IRQ13_145),
947 GPIO_FN(IRQ14_82), GPIO_FN(IRQ14_146), GPIO_FN(IRQ15_83),
948 GPIO_FN(IRQ15_147), GPIO_FN(IRQ16_84), GPIO_FN(IRQ16_170),
949 GPIO_FN(IRQ17), GPIO_FN(IRQ18), GPIO_FN(IRQ19),
950 GPIO_FN(IRQ20), GPIO_FN(IRQ21), GPIO_FN(IRQ22),
951 GPIO_FN(IRQ23), GPIO_FN(IRQ24), GPIO_FN(IRQ25),
952 GPIO_FN(IRQ26_121), GPIO_FN(IRQ26_172), GPIO_FN(IRQ27_122),
953 GPIO_FN(IRQ27_180), GPIO_FN(IRQ28_123), GPIO_FN(IRQ28_181),
954 GPIO_FN(IRQ29_129), GPIO_FN(IRQ29_182), GPIO_FN(IRQ30_130),
955 GPIO_FN(IRQ30_183), GPIO_FN(IRQ31_138), GPIO_FN(IRQ31_184),
956
957 /* MSIOF0 */
958 GPIO_FN(MSIOF0_TSYNC), GPIO_FN(MSIOF0_TSCK), GPIO_FN(MSIOF0_RXD),
959 GPIO_FN(MSIOF0_RSCK), GPIO_FN(MSIOF0_RSYNC), GPIO_FN(MSIOF0_MCK0),
960 GPIO_FN(MSIOF0_MCK1), GPIO_FN(MSIOF0_SS1), GPIO_FN(MSIOF0_SS2),
961 GPIO_FN(MSIOF0_TXD),
962
963 /* MSIOF1 */
964 GPIO_FN(MSIOF1_TSCK_39), GPIO_FN(MSIOF1_TSCK_88),
965 GPIO_FN(MSIOF1_TSYNC_40), GPIO_FN(MSIOF1_TSYNC_89),
966 GPIO_FN(MSIOF1_TXD_41), GPIO_FN(MSIOF1_TXD_90),
967 GPIO_FN(MSIOF1_RXD_42), GPIO_FN(MSIOF1_RXD_91),
968 GPIO_FN(MSIOF1_SS1_43), GPIO_FN(MSIOF1_SS1_92),
969 GPIO_FN(MSIOF1_SS2_44), GPIO_FN(MSIOF1_SS2_93),
970 GPIO_FN(MSIOF1_RSCK), GPIO_FN(MSIOF1_RSYNC),
971 GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
972
973 /* MSIOF2 */
974 GPIO_FN(MSIOF2_RSCK), GPIO_FN(MSIOF2_RSYNC), GPIO_FN(MSIOF2_MCK0),
975 GPIO_FN(MSIOF2_MCK1), GPIO_FN(MSIOF2_SS1), GPIO_FN(MSIOF2_SS2),
976 GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_TSCK), GPIO_FN(MSIOF2_RXD),
977 GPIO_FN(MSIOF2_TXD),
978
Kuninori Morimoto53b29b42010-09-02 07:20:40 +0000[diff] [blame]979 /* BBIF1 */
Kuninori Morimotob789b3f2010-02-17 09:39:10 +0000[diff] [blame]980 GPIO_FN(BBIF1_RXD), GPIO_FN(BBIF1_TSYNC), GPIO_FN(BBIF1_TSCK),
981 GPIO_FN(BBIF1_TXD), GPIO_FN(BBIF1_RSCK), GPIO_FN(BBIF1_RSYNC),
982 GPIO_FN(BBIF1_FLOW), GPIO_FN(BB_RX_FLOW_N),
983
Kuninori Morimoto53b29b42010-09-02 07:20:40 +0000[diff] [blame]984 /* BBIF2 */
Kuninori Morimotob789b3f2010-02-17 09:39:10 +0000[diff] [blame]985 GPIO_FN(BBIF2_TSCK1), GPIO_FN(BBIF2_TSYNC1),
986 GPIO_FN(BBIF2_TXD1), GPIO_FN(BBIF2_RXD),
987
988 /* FSI */
989 GPIO_FN(FSIACK), GPIO_FN(FSIBCK), GPIO_FN(FSIAILR),
990 GPIO_FN(FSIAIBT), GPIO_FN(FSIAISLD), GPIO_FN(FSIAOMC),
991 GPIO_FN(FSIAOLR), GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD),
992 GPIO_FN(FSIASPDIF_11), GPIO_FN(FSIASPDIF_15),
993
994 /* FMSI */
995 GPIO_FN(FMSOCK), GPIO_FN(FMSOOLR), GPIO_FN(FMSIOLR),
996 GPIO_FN(FMSOOBT), GPIO_FN(FMSIOBT), GPIO_FN(FMSOSLD),
997 GPIO_FN(FMSOILR), GPIO_FN(FMSIILR), GPIO_FN(FMSOIBT),
998 GPIO_FN(FMSIIBT), GPIO_FN(FMSISLD), GPIO_FN(FMSICK),
999
1000 /* SCIFA0 */
1001 GPIO_FN(SCIFA0_TXD), GPIO_FN(SCIFA0_RXD), GPIO_FN(SCIFA0_SCK),
1002 GPIO_FN(SCIFA0_RTS), GPIO_FN(SCIFA0_CTS),
1003
1004 /* SCIFA1 */
1005 GPIO_FN(SCIFA1_TXD), GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_SCK),
1006 GPIO_FN(SCIFA1_RTS), GPIO_FN(SCIFA1_CTS),
1007
1008 /* SCIFA2 */
1009 GPIO_FN(SCIFA2_CTS1), GPIO_FN(SCIFA2_RTS1), GPIO_FN(SCIFA2_TXD1),
1010 GPIO_FN(SCIFA2_RXD1), GPIO_FN(SCIFA2_SCK1),
1011
1012 /* SCIFA3 */
1013 GPIO_FN(SCIFA3_CTS_43), GPIO_FN(SCIFA3_CTS_140),
1014 GPIO_FN(SCIFA3_RTS_44), GPIO_FN(SCIFA3_RTS_141),
1015 GPIO_FN(SCIFA3_SCK), GPIO_FN(SCIFA3_TXD),
1016 GPIO_FN(SCIFA3_RXD),
1017
1018 /* SCIFA4 */
1019 GPIO_FN(SCIFA4_RXD), GPIO_FN(SCIFA4_TXD),
1020
1021 /* SCIFA5 */
1022 GPIO_FN(SCIFA5_RXD), GPIO_FN(SCIFA5_TXD),
1023
1024 /* SCIFB */
1025 GPIO_FN(SCIFB_SCK), GPIO_FN(SCIFB_RTS), GPIO_FN(SCIFB_CTS),
1026 GPIO_FN(SCIFB_TXD), GPIO_FN(SCIFB_RXD),
1027
1028 /* CEU */
1029 GPIO_FN(VIO_HD), GPIO_FN(VIO_CKO1), GPIO_FN(VIO_CKO2),
1030 GPIO_FN(VIO_VD), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD),
1031 GPIO_FN(VIO_CKO), GPIO_FN(VIO_D0), GPIO_FN(VIO_D1),
1032 GPIO_FN(VIO_D2), GPIO_FN(VIO_D3), GPIO_FN(VIO_D4),
1033 GPIO_FN(VIO_D5), GPIO_FN(VIO_D6), GPIO_FN(VIO_D7),
1034 GPIO_FN(VIO_D8), GPIO_FN(VIO_D9), GPIO_FN(VIO_D10),
1035 GPIO_FN(VIO_D11), GPIO_FN(VIO_D12), GPIO_FN(VIO_D13),
1036 GPIO_FN(VIO_D14), GPIO_FN(VIO_D15),
1037
1038 /* USB0 */
1039 GPIO_FN(IDIN_0), GPIO_FN(EXTLP_0), GPIO_FN(OVCN2_0),
1040 GPIO_FN(PWEN_0), GPIO_FN(OVCN_0), GPIO_FN(VBUS0_0),
1041
1042 /* USB1 */
1043 GPIO_FN(IDIN_1_18), GPIO_FN(IDIN_1_113),
1044 GPIO_FN(OVCN_1_114), GPIO_FN(OVCN_1_162),
1045 GPIO_FN(PWEN_1_115), GPIO_FN(PWEN_1_138),
1046 GPIO_FN(EXTLP_1), GPIO_FN(OVCN2_1),
1047 GPIO_FN(VBUS0_1),
1048
1049 /* GPIO */
1050 GPIO_FN(GPI0), GPIO_FN(GPI1), GPIO_FN(GPO0), GPIO_FN(GPO1),
1051
1052 /* BSC */
1053 GPIO_FN(BS), GPIO_FN(WE1), GPIO_FN(CKO),
1054 GPIO_FN(WAIT), GPIO_FN(RDWR),
1055
1056 GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2),
1057 GPIO_FN(A3), GPIO_FN(A6), GPIO_FN(A7),
1058 GPIO_FN(A8), GPIO_FN(A9), GPIO_FN(A10),
1059 GPIO_FN(A11), GPIO_FN(A12), GPIO_FN(A13),
1060 GPIO_FN(A14), GPIO_FN(A15), GPIO_FN(A16),
1061 GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(A19),
1062 GPIO_FN(A20), GPIO_FN(A21), GPIO_FN(A22),
1063 GPIO_FN(A23), GPIO_FN(A24), GPIO_FN(A25),
1064 GPIO_FN(A26),
1065
1066 GPIO_FN(CS0), GPIO_FN(CS2), GPIO_FN(CS4),
1067 GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(CS6A),
1068
1069 /* BSC/FLCTL */
1070 GPIO_FN(RD_FSC), GPIO_FN(WE0_FWE), GPIO_FN(A4_FOE),
1071 GPIO_FN(A5_FCDE), GPIO_FN(D0_NAF0), GPIO_FN(D1_NAF1),
1072 GPIO_FN(D2_NAF2), GPIO_FN(D3_NAF3), GPIO_FN(D4_NAF4),
1073 GPIO_FN(D5_NAF5), GPIO_FN(D6_NAF6), GPIO_FN(D7_NAF7),
1074 GPIO_FN(D8_NAF8), GPIO_FN(D9_NAF9), GPIO_FN(D10_NAF10),
1075 GPIO_FN(D11_NAF11), GPIO_FN(D12_NAF12), GPIO_FN(D13_NAF13),
1076 GPIO_FN(D14_NAF14), GPIO_FN(D15_NAF15),
1077
1078 /* MMCIF(1) */
1079 GPIO_FN(MMCD0_0), GPIO_FN(MMCD0_1), GPIO_FN(MMCD0_2),
1080 GPIO_FN(MMCD0_3), GPIO_FN(MMCD0_4), GPIO_FN(MMCD0_5),
1081 GPIO_FN(MMCD0_6), GPIO_FN(MMCD0_7), GPIO_FN(MMCCMD0),
1082 GPIO_FN(MMCCLK0),
1083
1084 /* MMCIF(2) */
1085 GPIO_FN(MMCD1_0), GPIO_FN(MMCD1_1), GPIO_FN(MMCD1_2),
1086 GPIO_FN(MMCD1_3), GPIO_FN(MMCD1_4), GPIO_FN(MMCD1_5),
1087 GPIO_FN(MMCD1_6), GPIO_FN(MMCD1_7), GPIO_FN(MMCCLK1),
1088 GPIO_FN(MMCCMD1),
1089
1090 /* SPU2 */
1091 GPIO_FN(VINT_I),
1092
1093 /* FLCTL */
1094 GPIO_FN(FCE1), GPIO_FN(FCE0), GPIO_FN(FRB),
1095
1096 /* HSI */
1097 GPIO_FN(GP_RX_FLAG), GPIO_FN(GP_RX_DATA), GPIO_FN(GP_TX_READY),
1098 GPIO_FN(GP_RX_WAKE), GPIO_FN(MP_TX_FLAG), GPIO_FN(MP_TX_DATA),
1099 GPIO_FN(MP_RX_READY), GPIO_FN(MP_TX_WAKE),
1100
1101 /* MFI */
1102 GPIO_FN(MFIv6),
1103 GPIO_FN(MFIv4),
1104
1105 GPIO_FN(MEMC_BUSCLK_MEMC_A0), GPIO_FN(MEMC_ADV_MEMC_DREQ0),
1106 GPIO_FN(MEMC_WAIT_MEMC_DREQ1), GPIO_FN(MEMC_CS1_MEMC_A1),
1107 GPIO_FN(MEMC_CS0), GPIO_FN(MEMC_NOE),
1108 GPIO_FN(MEMC_NWE), GPIO_FN(MEMC_INT),
1109
1110 GPIO_FN(MEMC_AD0), GPIO_FN(MEMC_AD1), GPIO_FN(MEMC_AD2),
1111 GPIO_FN(MEMC_AD3), GPIO_FN(MEMC_AD4), GPIO_FN(MEMC_AD5),
1112 GPIO_FN(MEMC_AD6), GPIO_FN(MEMC_AD7), GPIO_FN(MEMC_AD8),
1113 GPIO_FN(MEMC_AD9), GPIO_FN(MEMC_AD10), GPIO_FN(MEMC_AD11),
1114 GPIO_FN(MEMC_AD12), GPIO_FN(MEMC_AD13), GPIO_FN(MEMC_AD14),
1115 GPIO_FN(MEMC_AD15),
1116
1117 /* SIM */
1118 GPIO_FN(SIM_RST), GPIO_FN(SIM_CLK), GPIO_FN(SIM_D),
1119
1120 /* TPU */
1121 GPIO_FN(TPU0TO0), GPIO_FN(TPU0TO1), GPIO_FN(TPU0TO2_93),
1122 GPIO_FN(TPU0TO2_99), GPIO_FN(TPU0TO3),
1123
1124 /* I2C2 */
1125 GPIO_FN(I2C_SCL2), GPIO_FN(I2C_SDA2),
1126
1127 /* I2C3(1) */
1128 GPIO_FN(I2C_SCL3), GPIO_FN(I2C_SDA3),
1129
1130 /* I2C3(2) */
1131 GPIO_FN(I2C_SCL3S), GPIO_FN(I2C_SDA3S),
1132
1133 /* I2C4(2) */
1134 GPIO_FN(I2C_SCL4), GPIO_FN(I2C_SDA4),
1135
1136 /* I2C4(2) */
1137 GPIO_FN(I2C_SCL4S), GPIO_FN(I2C_SDA4S),
1138
1139 /* KEYSC */
1140 GPIO_FN(KEYOUT0), GPIO_FN(KEYIN0_121), GPIO_FN(KEYIN0_136),
1141 GPIO_FN(KEYOUT1), GPIO_FN(KEYIN1_122), GPIO_FN(KEYIN1_135),
1142 GPIO_FN(KEYOUT2), GPIO_FN(KEYIN2_123), GPIO_FN(KEYIN2_134),
1143 GPIO_FN(KEYOUT3), GPIO_FN(KEYIN3_124), GPIO_FN(KEYIN3_133),
1144 GPIO_FN(KEYOUT4), GPIO_FN(KEYIN4), GPIO_FN(KEYOUT5),
1145 GPIO_FN(KEYIN5), GPIO_FN(KEYOUT6), GPIO_FN(KEYIN6),
1146 GPIO_FN(KEYOUT7), GPIO_FN(KEYIN7),
1147
1148 /* LCDC */
1149 GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDVSYN),
1150 GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(LCDRD),
1151 GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(LCDLCLK),
1152 GPIO_FN(LCDDON),
1153
1154 GPIO_FN(LCDD0), GPIO_FN(LCDD1), GPIO_FN(LCDD2),
1155 GPIO_FN(LCDD3), GPIO_FN(LCDD4), GPIO_FN(LCDD5),
1156 GPIO_FN(LCDD6), GPIO_FN(LCDD7), GPIO_FN(LCDD8),
1157 GPIO_FN(LCDD9), GPIO_FN(LCDD10), GPIO_FN(LCDD11),
1158 GPIO_FN(LCDD12), GPIO_FN(LCDD13), GPIO_FN(LCDD14),
1159 GPIO_FN(LCDD15), GPIO_FN(LCDD16), GPIO_FN(LCDD17),
1160 GPIO_FN(LCDD18), GPIO_FN(LCDD19), GPIO_FN(LCDD20),
1161 GPIO_FN(LCDD21), GPIO_FN(LCDD22), GPIO_FN(LCDD23),
1162
Guennadi Liakhovetski94f4e512010-06-25 07:26:05 +0000[diff] [blame]1163 GPIO_FN(LCDC0_SELECT),
1164 GPIO_FN(LCDC1_SELECT),
1165
Kuninori Morimotob789b3f2010-02-17 09:39:10 +0000[diff] [blame]1166 /* IRDA */
1167 GPIO_FN(IRDA_OUT), GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL),
1168 GPIO_FN(IROUT_139), GPIO_FN(IROUT_140),
1169
1170 /* TSIF1 */
1171 GPIO_FN(TS0_1SELECT),
1172 GPIO_FN(TS0_2SELECT),
1173 GPIO_FN(TS1_1SELECT),
1174 GPIO_FN(TS1_2SELECT),
1175
1176 GPIO_FN(TS_SPSYNC1), GPIO_FN(TS_SDAT1),
1177 GPIO_FN(TS_SDEN1), GPIO_FN(TS_SCK1),
1178
1179 /* TSIF2 */
1180 GPIO_FN(TS_SPSYNC2), GPIO_FN(TS_SDAT2),
1181 GPIO_FN(TS_SDEN2), GPIO_FN(TS_SCK2),
1182
1183 /* HDMI */
1184 GPIO_FN(HDMI_HPD), GPIO_FN(HDMI_CEC),
1185
1186 /* SDHI0 */
1187 GPIO_FN(SDHICLK0), GPIO_FN(SDHICD0), GPIO_FN(SDHICMD0),
1188 GPIO_FN(SDHIWP0), GPIO_FN(SDHID0_0), GPIO_FN(SDHID0_1),
1189 GPIO_FN(SDHID0_2), GPIO_FN(SDHID0_3),
1190
1191 /* SDHI1 */
1192 GPIO_FN(SDHICLK1), GPIO_FN(SDHICMD1), GPIO_FN(SDHID1_0),
1193 GPIO_FN(SDHID1_1), GPIO_FN(SDHID1_2), GPIO_FN(SDHID1_3),
1194
1195 /* SDHI2 */
1196 GPIO_FN(SDHICLK2), GPIO_FN(SDHICMD2), GPIO_FN(SDHID2_0),
1197 GPIO_FN(SDHID2_1), GPIO_FN(SDHID2_2), GPIO_FN(SDHID2_3),
1198
1199 /* SDENC */
1200 GPIO_FN(SDENC_CPG),
1201 GPIO_FN(SDENC_DV_CLKI),
1202};
1203
1204/* helper for top 4 bits in PORTnCR */
1205#define PCRH(in, in_pd, in_pu, out) \
1206 0, (out), (in), 0, \
1207 0, 0, 0, 0, \
1208 0, 0, (in_pd), 0, \
1209 0, 0, (in_pu), 0
1210
1211#define PORTCR(nr, reg) \
1212 { PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
1213 PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
1214 PORT##nr##_IN_PU, PORT##nr##_OUT), \
1215 PORT##nr##_FN0, PORT##nr##_FN1, PORT##nr##_FN2, \
1216 PORT##nr##_FN3, PORT##nr##_FN4, PORT##nr##_FN5, \
1217 PORT##nr##_FN6, PORT##nr##_FN7 } \
1218 }
1219
1220static struct pinmux_cfg_reg pinmux_config_regs[] = {
1221 PORTCR(0, 0xE6051000), /* PORT0CR */
1222 PORTCR(1, 0xE6051001), /* PORT1CR */
1223 PORTCR(2, 0xE6051002), /* PORT2CR */
1224 PORTCR(3, 0xE6051003), /* PORT3CR */
1225 PORTCR(4, 0xE6051004), /* PORT4CR */
1226 PORTCR(5, 0xE6051005), /* PORT5CR */
1227 PORTCR(6, 0xE6051006), /* PORT6CR */
1228 PORTCR(7, 0xE6051007), /* PORT7CR */
1229 PORTCR(8, 0xE6051008), /* PORT8CR */
1230 PORTCR(9, 0xE6051009), /* PORT9CR */
1231 PORTCR(10, 0xE605100A), /* PORT10CR */
1232 PORTCR(11, 0xE605100B), /* PORT11CR */
1233 PORTCR(12, 0xE605100C), /* PORT12CR */
1234 PORTCR(13, 0xE605100D), /* PORT13CR */
1235 PORTCR(14, 0xE605100E), /* PORT14CR */
1236 PORTCR(15, 0xE605100F), /* PORT15CR */
1237 PORTCR(16, 0xE6051010), /* PORT16CR */
1238 PORTCR(17, 0xE6051011), /* PORT17CR */
1239 PORTCR(18, 0xE6051012), /* PORT18CR */
1240 PORTCR(19, 0xE6051013), /* PORT19CR */
1241 PORTCR(20, 0xE6051014), /* PORT20CR */
1242 PORTCR(21, 0xE6051015), /* PORT21CR */
1243 PORTCR(22, 0xE6051016), /* PORT22CR */
1244 PORTCR(23, 0xE6051017), /* PORT23CR */
1245 PORTCR(24, 0xE6051018), /* PORT24CR */
1246 PORTCR(25, 0xE6051019), /* PORT25CR */
1247 PORTCR(26, 0xE605101A), /* PORT26CR */
1248 PORTCR(27, 0xE605101B), /* PORT27CR */
1249 PORTCR(28, 0xE605101C), /* PORT28CR */
1250 PORTCR(29, 0xE605101D), /* PORT29CR */
1251 PORTCR(30, 0xE605101E), /* PORT30CR */
1252 PORTCR(31, 0xE605101F), /* PORT31CR */
1253 PORTCR(32, 0xE6051020), /* PORT32CR */
1254 PORTCR(33, 0xE6051021), /* PORT33CR */
1255 PORTCR(34, 0xE6051022), /* PORT34CR */
1256 PORTCR(35, 0xE6051023), /* PORT35CR */
1257 PORTCR(36, 0xE6051024), /* PORT36CR */
1258 PORTCR(37, 0xE6051025), /* PORT37CR */
1259 PORTCR(38, 0xE6051026), /* PORT38CR */
1260 PORTCR(39, 0xE6051027), /* PORT39CR */
1261 PORTCR(40, 0xE6051028), /* PORT40CR */
1262 PORTCR(41, 0xE6051029), /* PORT41CR */
1263 PORTCR(42, 0xE605102A), /* PORT42CR */
1264 PORTCR(43, 0xE605102B), /* PORT43CR */
1265 PORTCR(44, 0xE605102C), /* PORT44CR */
1266 PORTCR(45, 0xE605102D), /* PORT45CR */
1267 PORTCR(46, 0xE605202E), /* PORT46CR */
1268 PORTCR(47, 0xE605202F), /* PORT47CR */
1269 PORTCR(48, 0xE6052030), /* PORT48CR */
1270 PORTCR(49, 0xE6052031), /* PORT49CR */
1271 PORTCR(50, 0xE6052032), /* PORT50CR */
1272 PORTCR(51, 0xE6052033), /* PORT51CR */
1273 PORTCR(52, 0xE6052034), /* PORT52CR */
1274 PORTCR(53, 0xE6052035), /* PORT53CR */
1275 PORTCR(54, 0xE6052036), /* PORT54CR */
1276 PORTCR(55, 0xE6052037), /* PORT55CR */
1277 PORTCR(56, 0xE6052038), /* PORT56CR */
1278 PORTCR(57, 0xE6052039), /* PORT57CR */
1279 PORTCR(58, 0xE605203A), /* PORT58CR */
1280 PORTCR(59, 0xE605203B), /* PORT59CR */
1281 PORTCR(60, 0xE605203C), /* PORT60CR */
1282 PORTCR(61, 0xE605203D), /* PORT61CR */
1283 PORTCR(62, 0xE605203E), /* PORT62CR */
1284 PORTCR(63, 0xE605203F), /* PORT63CR */
1285 PORTCR(64, 0xE6052040), /* PORT64CR */
1286 PORTCR(65, 0xE6052041), /* PORT65CR */
1287 PORTCR(66, 0xE6052042), /* PORT66CR */
1288 PORTCR(67, 0xE6052043), /* PORT67CR */
1289 PORTCR(68, 0xE6052044), /* PORT68CR */
1290 PORTCR(69, 0xE6052045), /* PORT69CR */
1291 PORTCR(70, 0xE6052046), /* PORT70CR */
1292 PORTCR(71, 0xE6052047), /* PORT71CR */
1293 PORTCR(72, 0xE6052048), /* PORT72CR */
1294 PORTCR(73, 0xE6052049), /* PORT73CR */
1295 PORTCR(74, 0xE605204A), /* PORT74CR */
1296 PORTCR(75, 0xE605204B), /* PORT75CR */
1297 PORTCR(76, 0xE605004C), /* PORT76CR */
1298 PORTCR(77, 0xE605004D), /* PORT77CR */
1299 PORTCR(78, 0xE605004E), /* PORT78CR */
1300 PORTCR(79, 0xE605004F), /* PORT79CR */
1301 PORTCR(80, 0xE6050050), /* PORT80CR */
1302 PORTCR(81, 0xE6050051), /* PORT81CR */
1303 PORTCR(82, 0xE6050052), /* PORT82CR */
1304 PORTCR(83, 0xE6050053), /* PORT83CR */
1305 PORTCR(84, 0xE6050054), /* PORT84CR */
1306 PORTCR(85, 0xE6050055), /* PORT85CR */
1307 PORTCR(86, 0xE6050056), /* PORT86CR */
1308 PORTCR(87, 0xE6050057), /* PORT87CR */
1309 PORTCR(88, 0xE6050058), /* PORT88CR */
1310 PORTCR(89, 0xE6050059), /* PORT89CR */
1311 PORTCR(90, 0xE605005A), /* PORT90CR */
1312 PORTCR(91, 0xE605005B), /* PORT91CR */
1313 PORTCR(92, 0xE605005C), /* PORT92CR */
1314 PORTCR(93, 0xE605005D), /* PORT93CR */
1315 PORTCR(94, 0xE605005E), /* PORT94CR */
1316 PORTCR(95, 0xE605005F), /* PORT95CR */
1317 PORTCR(96, 0xE6050060), /* PORT96CR */
1318 PORTCR(97, 0xE6050061), /* PORT97CR */
1319 PORTCR(98, 0xE6050062), /* PORT98CR */
1320 PORTCR(99, 0xE6050063), /* PORT99CR */
1321 PORTCR(100, 0xE6053064), /* PORT100CR */
1322 PORTCR(101, 0xE6053065), /* PORT101CR */
1323 PORTCR(102, 0xE6053066), /* PORT102CR */
1324 PORTCR(103, 0xE6053067), /* PORT103CR */
1325 PORTCR(104, 0xE6053068), /* PORT104CR */
1326 PORTCR(105, 0xE6053069), /* PORT105CR */
1327 PORTCR(106, 0xE605306A), /* PORT106CR */
1328 PORTCR(107, 0xE605306B), /* PORT107CR */
1329 PORTCR(108, 0xE605306C), /* PORT108CR */
1330 PORTCR(109, 0xE605306D), /* PORT109CR */
1331 PORTCR(110, 0xE605306E), /* PORT110CR */
1332 PORTCR(111, 0xE605306F), /* PORT111CR */
1333 PORTCR(112, 0xE6053070), /* PORT112CR */
1334 PORTCR(113, 0xE6053071), /* PORT113CR */
1335 PORTCR(114, 0xE6053072), /* PORT114CR */
1336 PORTCR(115, 0xE6053073), /* PORT115CR */
1337 PORTCR(116, 0xE6053074), /* PORT116CR */
1338 PORTCR(117, 0xE6053075), /* PORT117CR */
1339 PORTCR(118, 0xE6053076), /* PORT118CR */
1340 PORTCR(119, 0xE6053077), /* PORT119CR */
1341 PORTCR(120, 0xE6053078), /* PORT120CR */
1342 PORTCR(121, 0xE6050079), /* PORT121CR */
1343 PORTCR(122, 0xE605007A), /* PORT122CR */
1344 PORTCR(123, 0xE605007B), /* PORT123CR */
1345 PORTCR(124, 0xE605007C), /* PORT124CR */
1346 PORTCR(125, 0xE605007D), /* PORT125CR */
1347 PORTCR(126, 0xE605007E), /* PORT126CR */
1348 PORTCR(127, 0xE605007F), /* PORT127CR */
1349 PORTCR(128, 0xE6050080), /* PORT128CR */
1350 PORTCR(129, 0xE6050081), /* PORT129CR */
1351 PORTCR(130, 0xE6050082), /* PORT130CR */
1352 PORTCR(131, 0xE6050083), /* PORT131CR */
1353 PORTCR(132, 0xE6050084), /* PORT132CR */
1354 PORTCR(133, 0xE6050085), /* PORT133CR */
1355 PORTCR(134, 0xE6050086), /* PORT134CR */
1356 PORTCR(135, 0xE6050087), /* PORT135CR */
1357 PORTCR(136, 0xE6050088), /* PORT136CR */
1358 PORTCR(137, 0xE6050089), /* PORT137CR */
1359 PORTCR(138, 0xE605008A), /* PORT138CR */
1360 PORTCR(139, 0xE605008B), /* PORT139CR */
1361 PORTCR(140, 0xE605008C), /* PORT140CR */
1362 PORTCR(141, 0xE605008D), /* PORT141CR */
1363 PORTCR(142, 0xE605008E), /* PORT142CR */
1364 PORTCR(143, 0xE605008F), /* PORT143CR */
1365 PORTCR(144, 0xE6050090), /* PORT144CR */
1366 PORTCR(145, 0xE6050091), /* PORT145CR */
1367 PORTCR(146, 0xE6050092), /* PORT146CR */
1368 PORTCR(147, 0xE6050093), /* PORT147CR */
1369 PORTCR(148, 0xE6050094), /* PORT148CR */
1370 PORTCR(149, 0xE6050095), /* PORT149CR */
1371 PORTCR(150, 0xE6050096), /* PORT150CR */
1372 PORTCR(151, 0xE6050097), /* PORT151CR */
1373 PORTCR(152, 0xE6053098), /* PORT152CR */
1374 PORTCR(153, 0xE6053099), /* PORT153CR */
1375 PORTCR(154, 0xE605309A), /* PORT154CR */
1376 PORTCR(155, 0xE605309B), /* PORT155CR */
1377 PORTCR(156, 0xE605009C), /* PORT156CR */
1378 PORTCR(157, 0xE605009D), /* PORT157CR */
1379 PORTCR(158, 0xE605009E), /* PORT158CR */
1380 PORTCR(159, 0xE605009F), /* PORT159CR */
1381 PORTCR(160, 0xE60500A0), /* PORT160CR */
1382 PORTCR(161, 0xE60500A1), /* PORT161CR */
1383 PORTCR(162, 0xE60500A2), /* PORT162CR */
1384 PORTCR(163, 0xE60500A3), /* PORT163CR */
1385 PORTCR(164, 0xE60500A4), /* PORT164CR */
1386 PORTCR(165, 0xE60500A5), /* PORT165CR */
1387 PORTCR(166, 0xE60500A6), /* PORT166CR */
1388 PORTCR(167, 0xE60520A7), /* PORT167CR */
1389 PORTCR(168, 0xE60520A8), /* PORT168CR */
1390 PORTCR(169, 0xE60520A9), /* PORT169CR */
1391 PORTCR(170, 0xE60520AA), /* PORT170CR */
1392 PORTCR(171, 0xE60520AB), /* PORT171CR */
1393 PORTCR(172, 0xE60520AC), /* PORT172CR */
1394 PORTCR(173, 0xE60520AD), /* PORT173CR */
1395 PORTCR(174, 0xE60520AE), /* PORT174CR */
1396 PORTCR(175, 0xE60520AF), /* PORT175CR */
1397 PORTCR(176, 0xE60520B0), /* PORT176CR */
1398 PORTCR(177, 0xE60520B1), /* PORT177CR */
1399 PORTCR(178, 0xE60520B2), /* PORT178CR */
1400 PORTCR(179, 0xE60520B3), /* PORT179CR */
1401 PORTCR(180, 0xE60520B4), /* PORT180CR */
1402 PORTCR(181, 0xE60520B5), /* PORT181CR */
1403 PORTCR(182, 0xE60520B6), /* PORT182CR */
1404 PORTCR(183, 0xE60520B7), /* PORT183CR */
1405 PORTCR(184, 0xE60520B8), /* PORT184CR */
1406 PORTCR(185, 0xE60520B9), /* PORT185CR */
1407 PORTCR(186, 0xE60520BA), /* PORT186CR */
1408 PORTCR(187, 0xE60520BB), /* PORT187CR */
1409 PORTCR(188, 0xE60520BC), /* PORT188CR */
1410 PORTCR(189, 0xE60520BD), /* PORT189CR */
1411 PORTCR(190, 0xE60520BE), /* PORT190CR */
1412
1413 { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
1414 MSEL1CR_31_0, MSEL1CR_31_1,
1415 MSEL1CR_30_0, MSEL1CR_30_1,
1416 MSEL1CR_29_0, MSEL1CR_29_1,
1417 MSEL1CR_28_0, MSEL1CR_28_1,
1418 MSEL1CR_27_0, MSEL1CR_27_1,
1419 MSEL1CR_26_0, MSEL1CR_26_1,
1420 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1421 0, 0, 0, 0, 0, 0, 0, 0,
1422 MSEL1CR_16_0, MSEL1CR_16_1,
1423 MSEL1CR_15_0, MSEL1CR_15_1,
1424 MSEL1CR_14_0, MSEL1CR_14_1,
1425 MSEL1CR_13_0, MSEL1CR_13_1,
1426 MSEL1CR_12_0, MSEL1CR_12_1,
1427 0, 0, 0, 0,
1428 MSEL1CR_9_0, MSEL1CR_9_1,
1429 MSEL1CR_8_0, MSEL1CR_8_1,
1430 MSEL1CR_7_0, MSEL1CR_7_1,
1431 MSEL1CR_6_0, MSEL1CR_6_1,
1432 0, 0,
1433 MSEL1CR_4_0, MSEL1CR_4_1,
1434 MSEL1CR_3_0, MSEL1CR_3_1,
1435 MSEL1CR_2_0, MSEL1CR_2_1,
1436 0, 0,
1437 MSEL1CR_0_0, MSEL1CR_0_1,
1438 }
1439 },
1440 { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
1441 0, 0, 0, 0,
1442 0, 0, 0, 0,
1443 MSEL3CR_27_0, MSEL3CR_27_1,
1444 MSEL3CR_26_0, MSEL3CR_26_1,
1445 0, 0, 0, 0,
1446 0, 0, 0, 0,
1447 MSEL3CR_21_0, MSEL3CR_21_1,
1448 MSEL3CR_20_0, MSEL3CR_20_1,
1449 0, 0, 0, 0,
1450 0, 0, 0, 0,
1451 MSEL3CR_15_0, MSEL3CR_15_1,
1452 0, 0, 0, 0,
1453 0, 0, 0, 0,
1454 0, 0,
1455 MSEL3CR_9_0, MSEL3CR_9_1,
1456 0, 0, 0, 0,
1457 MSEL3CR_6_0, MSEL3CR_6_1,
1458 0, 0, 0, 0,
1459 0, 0, 0, 0,
1460 0, 0, 0, 0,
1461 }
1462 },
1463 { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
1464 0, 0, 0, 0,
1465 0, 0, 0, 0,
1466 0, 0, 0, 0,
1467 0, 0, 0, 0,
1468 0, 0, 0, 0,
1469 0, 0, 0, 0,
1470 MSEL4CR_19_0, MSEL4CR_19_1,
1471 MSEL4CR_18_0, MSEL4CR_18_1,
1472 MSEL4CR_17_0, MSEL4CR_17_1,
1473 MSEL4CR_16_0, MSEL4CR_16_1,
1474 MSEL4CR_15_0, MSEL4CR_15_1,
1475 MSEL4CR_14_0, MSEL4CR_14_1,
1476 0, 0, 0, 0,
1477 0, 0,
1478 MSEL4CR_10_0, MSEL4CR_10_1,
1479 0, 0, 0, 0,
1480 0, 0,
1481 MSEL4CR_6_0, MSEL4CR_6_1,
1482 0, 0,
1483 MSEL4CR_4_0, MSEL4CR_4_1,
1484 0, 0, 0, 0,
1485 MSEL4CR_1_0, MSEL4CR_1_1,
1486 0, 0,
1487 }
1488 },
1489 { },
1490};
1491
1492static struct pinmux_data_reg pinmux_data_regs[] = {
1493 { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
1494 PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
1495 PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
1496 PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
1497 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
1498 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
1499 0, 0, 0, 0,
1500 0, 0, 0, 0,
1501 0, 0, 0, 0,
1502 }
1503 },
1504 { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
1505 PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
1506 PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
1507 0, 0, 0, 0,
1508 0, 0, 0, 0,
1509 0, 0, 0, 0,
1510 0, 0, 0, 0,
1511 0, 0, 0, 0,
1512 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA,
1513 }
1514 },
1515 { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
1516 PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
1517 0, 0, 0, 0,
1518 PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
1519 PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
1520 PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
1521 PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
1522 PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
1523 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
1524 }
1525 },
1526 { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
1527 0, 0, 0, 0,
1528 0, 0, 0, 0,
1529 0, 0, 0, 0,
1530 0, 0, 0, 0,
1531 0, 0, 0, 0,
1532 0, 0, 0, 0,
1533 0, PORT166_DATA, PORT165_DATA, PORT164_DATA,
1534 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
1535 }
1536 },
1537 { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
1538 PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
1539 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
1540 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
1541 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
1542 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
1543 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
1544 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
1545 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA,
1546 }
1547 },
1548 { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
1549 0, 0, 0, 0, 0, 0, 0, 0,
1550 0, 0, 0, 0, 0, 0, 0, 0,
1551 0, 0, PORT45_DATA, PORT44_DATA,
1552 PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
1553 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
1554 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
1555 }
1556 },
1557 { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
1558 PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
1559 PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
1560 PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
1561 PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
1562 PORT47_DATA, PORT46_DATA, 0, 0,
1563 0, 0, 0, 0,
1564 0, 0, 0, 0,
1565 0, 0, 0, 0,
1566 }
1567 },
1568 { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
1569 0, 0, 0, 0,
1570 0, 0, 0, 0,
1571 0, 0, 0, 0,
1572 0, 0, 0, 0,
1573 0, 0, 0, 0,
1574 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
1575 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
1576 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
1577 }
1578 },
1579 { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
1580 0, PORT190_DATA, PORT189_DATA, PORT188_DATA,
1581 PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
1582 PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
1583 PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
1584 PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
1585 PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
1586 PORT167_DATA, 0, 0, 0,
1587 0, 0, 0, 0,
1588 }
1589 },
1590 { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
1591 0, 0, 0, 0,
1592 0, 0, 0, PORT120_DATA,
1593 PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
1594 PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
1595 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
1596 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
1597 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
1598 0, 0, 0, 0,
1599 }
1600 },
1601 { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
1602 0, 0, 0, 0,
1603 PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
1604 0, 0, 0, 0,
1605 0, 0, 0, 0,
1606 0, 0, 0, 0,
1607 0, 0, 0, 0,
1608 0, 0, 0, 0,
1609 0, 0, 0, 0,
1610 }
1611 },
1612 { },
1613};
1614
1615static struct pinmux_info sh7372_pinmux_info = {
1616 .name = "sh7372_pfc",
1617 .reserved_id = PINMUX_RESERVED,
1618 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1619 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1620 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1621 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1622 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1623 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1624 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1625
1626 .first_gpio = GPIO_PORT0,
1627 .last_gpio = GPIO_FN_SDENC_DV_CLKI,
1628
1629 .gpios = pinmux_gpios,
1630 .cfg_regs = pinmux_config_regs,
1631 .data_regs = pinmux_data_regs,
1632
1633 .gpio_data = pinmux_data,
1634 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1635};
1636
1637void sh7372_pinmux_init(void)
1638{
1639 register_pinmux(&sh7372_pinmux_info);
1640}