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review.evervolv.com / android_kernel_oneplus_msm8996 / 866ba0ef967c693dae952afafcb1582a390a82a0 / . / arch / arm / mach-omap2 / pm.h
blob: 32dbc1311efd6ac619be99f59cfe6f32c78f2ffa [file] [log] [blame]
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]1/*
2 * OMAP2/3 Power Management Routines
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 * Jouni Hogander
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
12#define __ARCH_ARM_MACH_OMAP2_PM_H
13
Thara Gopinath0c0a5d62010-05-29 22:02:23 +0530[diff] [blame]14#include <linux/err.h>
15
Paul Walmsley72e06d02010-12-21 21:05:16 -0700[diff] [blame]16#include "powerdomain.h"
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]17
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]18extern void *omap3_secure_ram_storage;
Kevin Hilmanc40552b2009-10-06 14:25:09 -0700[diff] [blame]19extern void omap3_pm_off_mode_enable(int);
Rajendra Nayak99e6a4d2008-10-08 17:30:58 +0530[diff] [blame]20extern void omap_sram_idle(void);
Rajendra Nayak20b01662008-10-08 17:31:22 +0530[diff] [blame]21extern int omap3_can_sleep(void);
Santosh Shilimkareb6a2c72010-09-15 01:04:01 +0530[diff] [blame]22extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
Kalle Jokiniemi03433712008-09-26 11:04:20 +0300[diff] [blame]23extern int omap3_idle_init(void);
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]24
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]25#if defined(CONFIG_PM_OPP)
26extern int omap3_opp_init(void);
Nishanth Menonf5a64222010-12-09 09:13:47 -0600[diff] [blame]27extern int omap4_opp_init(void);
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]28#else
29static inline int omap3_opp_init(void)
30{
31 return -EINVAL;
32}
Nishanth Menonf5a64222010-12-09 09:13:47 -0600[diff] [blame]33static inline int omap4_opp_init(void)
34{
35 return -EINVAL;
36}
Nishanth Menonfd1478c2010-12-09 09:13:46 -0600[diff] [blame]37#endif
38
Jean Pihet866ba0e2011-05-09 12:02:13 +0200[diff] [blame^]39/*
40 * cpuidle mach specific parameters
41 *
42 * The board code can override the default C-states definition using
43 * omap3_pm_init_cpuidle
44 */
Kevin Hilmanbb4de3d2009-12-15 16:37:18 -0800[diff] [blame]45struct cpuidle_params {
Jean Pihet866ba0e2011-05-09 12:02:13 +0200[diff] [blame^]46 u32 exit_latency; /* exit_latency = sleep + wake-up latencies */
47 u32 target_residency;
48 u8 valid; /* validates the C-state */
Kevin Hilmanbb4de3d2009-12-15 16:37:18 -0800[diff] [blame]49};
50
51#if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE)
52extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params);
53#else
54static
55inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params)
56{
57}
58#endif
59
Tero Kristo68d47782008-11-26 12:26:24 +0200[diff] [blame]60extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
61extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
62
Kevin Hilmand7814e42009-10-06 14:30:23 -0700[diff] [blame]63extern u32 wakeup_timer_seconds;
Ari Kauppi8e2efde2010-03-23 09:04:59 +0200[diff] [blame]64extern u32 wakeup_timer_milliseconds;
Kevin Hilmand7814e42009-10-06 14:30:23 -0700[diff] [blame]65extern struct omap_dm_timer *gptimer_wakeup;
66
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]67#ifdef CONFIG_PM_DEBUG
68extern void omap2_pm_dump(int mode, int resume, unsigned int us);
Santosh Shilimkar86b0c1e2010-09-15 01:03:59 +0530[diff] [blame]69extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]70extern int omap2_pm_debug;
Loïc Minierebfa88c2010-09-27 23:04:20 +0200[diff] [blame]71extern u32 enable_off_mode;
72extern u32 sleep_while_idle;
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]73#else
74#define omap2_pm_dump(mode, resume, us) do {} while (0);
Santosh Shilimkar86b0c1e2010-09-15 01:03:59 +0530[diff] [blame]75#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0);
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]76#define omap2_pm_debug 0
Loïc Minierebfa88c2010-09-27 23:04:20 +0200[diff] [blame]77#define enable_off_mode 0
78#define sleep_while_idle 0
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]79#endif
80
Sanjeev Premi6af83b32010-01-28 23:16:43 +0530[diff] [blame]81#if defined(CONFIG_CPU_IDLE)
Nishanth Menon80723c32010-12-20 14:05:08 -0600[diff] [blame]82extern void omap3_cpuidle_update_states(u32, u32);
Sanjeev Premi6af83b32010-01-28 23:16:43 +0530[diff] [blame]83#endif
84
Manjunatha GKae559d82009-11-16 20:16:52 +0530[diff] [blame]85#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]86extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
Tero Kristo2811d6b2008-10-29 13:31:24 +0200[diff] [blame]87extern int pm_dbg_regset_save(int reg_set);
88extern int pm_dbg_regset_init(int reg_set);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]89#else
Peter 'p2' De Schrijver331b93f2008-10-15 18:13:48 +0300[diff] [blame]90#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
Tero Kristo2811d6b2008-10-29 13:31:24 +0200[diff] [blame]91#define pm_dbg_regset_save(reg_set) do {} while (0);
92#define pm_dbg_regset_init(reg_set) do {} while (0);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]93#endif /* CONFIG_PM_DEBUG */
94
95extern void omap24xx_idle_loop_suspend(void);
96
97extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
98 void __iomem *sdrc_power);
99extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
Jean Pihetb6338bd2011-02-02 16:38:06 +0100[diff] [blame]100extern int save_secure_ram_context(u32 *addr);
Tero Kristo27d59a42008-10-13 13:15:00 +0300[diff] [blame]101extern void omap3_save_scratchpad_contents(void);
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]102
103extern unsigned int omap24xx_idle_loop_suspend_sz;
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]104extern unsigned int save_secure_ram_context_sz;
105extern unsigned int omap24xx_cpu_suspend_sz;
106extern unsigned int omap34xx_cpu_suspend_sz;
107
Nishanth Menon458e9992010-12-20 14:05:06 -0600[diff] [blame]108#define PM_RTA_ERRATUM_i608 (1 << 0)
Eduardo Valentincc1b6022010-12-20 14:05:09 -0600[diff] [blame]109#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)
Nishanth Menon458e9992010-12-20 14:05:06 -0600[diff] [blame]110
Nishanth Menon8cdfd832010-12-20 14:05:05 -0600[diff] [blame]111#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
112extern u16 pm34xx_errata;
113#define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id))
Peter 'p2' De Schrijverc4236d22010-12-20 14:05:07 -0600[diff] [blame]114extern void enable_omap3630_toggle_l2_on_restore(void);
Nishanth Menon8cdfd832010-12-20 14:05:05 -0600[diff] [blame]115#else
116#define IS_PM34XX_ERRATUM(id) 0
Peter 'p2' De Schrijverc4236d22010-12-20 14:05:07 -0600[diff] [blame]117static inline void enable_omap3630_toggle_l2_on_restore(void) { }
Nishanth Menon8cdfd832010-12-20 14:05:05 -0600[diff] [blame]118#endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
119
Thara Gopinath0c0a5d62010-05-29 22:02:23 +0530[diff] [blame]120#ifdef CONFIG_OMAP_SMARTREFLEX
121extern int omap_devinit_smartreflex(void);
122extern void omap_enable_smartreflex_on_init(void);
123#else
124static inline int omap_devinit_smartreflex(void)
125{
126 return -EINVAL;
127}
128
129static inline void omap_enable_smartreflex_on_init(void) {}
130#endif
131
Thara Gopinathfbc319f2010-12-10 22:51:05 +0530[diff] [blame]132#ifdef CONFIG_TWL4030_CORE
133extern int omap3_twl_init(void);
Thara Gopinath7bc3ed92010-12-10 23:15:16 +0530[diff] [blame]134extern int omap4_twl_init(void);
Thara Gopinath40713182011-02-15 13:28:58 +0530[diff] [blame]135extern int omap3_twl_set_sr_bit(bool enable);
Thara Gopinathfbc319f2010-12-10 22:51:05 +0530[diff] [blame]136#else
137static inline int omap3_twl_init(void)
138{
139 return -EINVAL;
140}
Thara Gopinath7bc3ed92010-12-10 23:15:16 +0530[diff] [blame]141static inline int omap4_twl_init(void)
142{
143 return -EINVAL;
144}
Thara Gopinathfbc319f2010-12-10 22:51:05 +0530[diff] [blame]145#endif
146
Kevin Hilman8bd22942009-05-28 10:56:16 -0700[diff] [blame]147#endif