blob: c9d90169ab1aca8c1f50e399cc90485e5a16b1a7 [file] [log] [blame]
Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
Reinette Chatre01f81622009-01-08 10:20:02 -08003 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07004 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
Winkler, Tomas759ef892008-12-09 11:28:58 -080022 * Intel Linux Wireless <ilw@linux.intel.com>
Zhu Yib481de92007-09-25 17:54:57 -070023 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
Zhu Yib481de92007-09-25 17:54:57 -070029#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
33#include <linux/skbuff.h>
34#include <linux/netdevice.h>
35#include <linux/wireless.h>
36#include <net/mac80211.h>
Zhu Yib481de92007-09-25 17:54:57 -070037#include <linux/etherdevice.h>
Zhu Yi12342c42007-12-20 11:27:32 +080038#include <asm/unaligned.h>
Zhu Yib481de92007-09-25 17:54:57 -070039
Assaf Krauss6bc913b2008-03-11 16:17:18 -070040#include "iwl-eeprom.h"
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070041#include "iwl-dev.h"
Tomas Winklerfee12472008-04-03 16:05:21 -070042#include "iwl-core.h"
Tomas Winkler3395f6e2008-03-25 16:33:37 -070043#include "iwl-io.h"
Zhu Yib481de92007-09-25 17:54:57 -070044#include "iwl-helpers.h"
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -070045#include "iwl-calib.h"
Tomas Winkler5083e562008-05-29 16:35:15 +080046#include "iwl-sta.h"
Johannes Berge932a602009-10-02 13:44:03 -070047#include "iwl-agn-led.h"
Zhu Yib481de92007-09-25 17:54:57 -070048
Tomas Winkler630fe9b2008-06-12 09:47:08 +080049static int iwl4965_send_tx_power(struct iwl_priv *priv);
Reinette Chatre3d816c72009-08-07 15:41:37 -070050static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
Tomas Winkler630fe9b2008-06-12 09:47:08 +080051
Reinette Chatrea0987a82008-12-02 12:14:06 -080052/* Highest firmware API version supported */
53#define IWL4965_UCODE_API_MAX 2
54
55/* Lowest firmware API version supported */
56#define IWL4965_UCODE_API_MIN 2
57
58#define IWL4965_FW_PRE "iwlwifi-4965-"
59#define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
60#define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
Tomas Winklerd16dc482008-07-11 11:53:38 +080061
62
Assaf Krauss1ea87392008-03-18 14:57:50 -070063/* module parameters */
64static struct iwl_mod_params iwl4965_mod_params = {
Assaf Krauss1ea87392008-03-18 14:57:50 -070065 .amsdu_size_8K = 1,
Ester Kummer3a1081e2008-05-06 11:05:14 +080066 .restart_fw = 1,
Assaf Krauss1ea87392008-03-18 14:57:50 -070067 /* the rest are 0 by default */
68};
69
Tomas Winkler57aab752008-04-14 21:16:03 -070070/* check contents of special bootstrap uCode SRAM */
71static int iwl4965_verify_bsm(struct iwl_priv *priv)
72{
73 __le32 *image = priv->ucode_boot.v_addr;
74 u32 len = priv->ucode_boot.len;
75 u32 reg;
76 u32 val;
77
Tomas Winklere1623442009-01-27 14:27:56 -080078 IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070079
80 /* verify BSM SRAM contents */
81 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
82 for (reg = BSM_SRAM_LOWER_BOUND;
83 reg < BSM_SRAM_LOWER_BOUND + len;
84 reg += sizeof(u32), image++) {
85 val = iwl_read_prph(priv, reg);
86 if (val != le32_to_cpu(*image)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +080087 IWL_ERR(priv, "BSM uCode verification failed at "
Tomas Winkler57aab752008-04-14 21:16:03 -070088 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
89 BSM_SRAM_LOWER_BOUND,
90 reg - BSM_SRAM_LOWER_BOUND, len,
91 val, le32_to_cpu(*image));
92 return -EIO;
93 }
94 }
95
Tomas Winklere1623442009-01-27 14:27:56 -080096 IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
Tomas Winkler57aab752008-04-14 21:16:03 -070097
98 return 0;
99}
100
101/**
102 * iwl4965_load_bsm - Load bootstrap instructions
103 *
104 * BSM operation:
105 *
106 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
107 * in special SRAM that does not power down during RFKILL. When powering back
108 * up after power-saving sleeps (or during initial uCode load), the BSM loads
109 * the bootstrap program into the on-board processor, and starts it.
110 *
111 * The bootstrap program loads (via DMA) instructions and data for a new
112 * program from host DRAM locations indicated by the host driver in the
113 * BSM_DRAM_* registers. Once the new program is loaded, it starts
114 * automatically.
115 *
116 * When initializing the NIC, the host driver points the BSM to the
117 * "initialize" uCode image. This uCode sets up some internal data, then
118 * notifies host via "initialize alive" that it is complete.
119 *
120 * The host then replaces the BSM_DRAM_* pointer values to point to the
121 * normal runtime uCode instructions and a backup uCode data cache buffer
122 * (filled initially with starting data values for the on-board processor),
123 * then triggers the "initialize" uCode to load and launch the runtime uCode,
124 * which begins normal operation.
125 *
126 * When doing a power-save shutdown, runtime uCode saves data SRAM into
127 * the backup data cache in DRAM before SRAM is powered down.
128 *
129 * When powering back up, the BSM loads the bootstrap program. This reloads
130 * the runtime uCode instructions and the backup data cache into SRAM,
131 * and re-launches the runtime uCode from where it left off.
132 */
133static int iwl4965_load_bsm(struct iwl_priv *priv)
134{
135 __le32 *image = priv->ucode_boot.v_addr;
136 u32 len = priv->ucode_boot.len;
137 dma_addr_t pinst;
138 dma_addr_t pdata;
139 u32 inst_len;
140 u32 data_len;
141 int i;
142 u32 done;
143 u32 reg_offset;
144 int ret;
145
Tomas Winklere1623442009-01-27 14:27:56 -0800146 IWL_DEBUG_INFO(priv, "Begin load bsm\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700147
Reinette Chatrec03ea162009-08-07 15:41:44 -0700148 priv->ucode_type = UCODE_RT;
Ron Rindjunskyfe9b6b72008-05-29 16:35:06 +0800149
Tomas Winkler57aab752008-04-14 21:16:03 -0700150 /* make sure bootstrap program is no larger than BSM's SRAM size */
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800151 if (len > IWL49_MAX_BSM_SIZE)
Tomas Winkler57aab752008-04-14 21:16:03 -0700152 return -EINVAL;
153
154 /* Tell bootstrap uCode where to find the "Initialize" uCode
155 * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
Tomas Winkler2d878892008-05-29 16:34:51 +0800156 * NOTE: iwl_init_alive_start() will replace these values,
Tomas Winkler57aab752008-04-14 21:16:03 -0700157 * after the "initialize" uCode has run, to point to
Tomas Winkler2d878892008-05-29 16:34:51 +0800158 * runtime/protocol instructions and backup data cache.
159 */
Tomas Winkler57aab752008-04-14 21:16:03 -0700160 pinst = priv->ucode_init.p_addr >> 4;
161 pdata = priv->ucode_init_data.p_addr >> 4;
162 inst_len = priv->ucode_init.len;
163 data_len = priv->ucode_init_data.len;
164
Tomas Winkler57aab752008-04-14 21:16:03 -0700165 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
166 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
167 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
168 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
169
170 /* Fill BSM memory with bootstrap instructions */
171 for (reg_offset = BSM_SRAM_LOWER_BOUND;
172 reg_offset < BSM_SRAM_LOWER_BOUND + len;
173 reg_offset += sizeof(u32), image++)
174 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
175
176 ret = iwl4965_verify_bsm(priv);
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700177 if (ret)
Tomas Winkler57aab752008-04-14 21:16:03 -0700178 return ret;
Tomas Winkler57aab752008-04-14 21:16:03 -0700179
180 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
181 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800182 iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
Tomas Winkler57aab752008-04-14 21:16:03 -0700183 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
184
185 /* Load bootstrap code into instruction SRAM now,
186 * to prepare to load "initialize" uCode */
187 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
188
189 /* Wait for load of bootstrap uCode to finish */
190 for (i = 0; i < 100; i++) {
191 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
192 if (!(done & BSM_WR_CTRL_REG_BIT_START))
193 break;
194 udelay(10);
195 }
196 if (i < 100)
Tomas Winklere1623442009-01-27 14:27:56 -0800197 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
Tomas Winkler57aab752008-04-14 21:16:03 -0700198 else {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800199 IWL_ERR(priv, "BSM write did not complete!\n");
Tomas Winkler57aab752008-04-14 21:16:03 -0700200 return -EIO;
201 }
202
203 /* Enable future boot loads whenever power management unit triggers it
204 * (e.g. when powering back up after power-save shutdown) */
205 iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
206
Tomas Winkler57aab752008-04-14 21:16:03 -0700207
208 return 0;
209}
210
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800211/**
212 * iwl4965_set_ucode_ptrs - Set uCode address location
213 *
214 * Tell initialization uCode where to find runtime uCode.
215 *
216 * BSM registers initially contain pointers to initialization uCode.
217 * We need to replace them to load runtime uCode inst and data,
218 * and to save runtime data when powering down.
219 */
220static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
221{
222 dma_addr_t pinst;
223 dma_addr_t pdata;
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800224 int ret = 0;
225
226 /* bits 35:4 for 4965 */
227 pinst = priv->ucode_code.p_addr >> 4;
228 pdata = priv->ucode_data_backup.p_addr >> 4;
229
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800230 /* Tell bootstrap uCode where to find image to load */
231 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
232 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
233 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
234 priv->ucode_data.len);
235
Tomas Winklera96a27f2008-10-23 23:48:56 -0700236 /* Inst byte count must be last to set up, bit 31 signals uCode
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800237 * that all new ptr/size info is in place */
238 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
239 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
Tomas Winklere1623442009-01-27 14:27:56 -0800240 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800241
242 return ret;
243}
244
245/**
246 * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
247 *
248 * Called after REPLY_ALIVE notification received from "initialize" uCode.
249 *
250 * The 4965 "initialize" ALIVE reply contains calibration data for:
251 * Voltage, temperature, and MIMO tx gain correction, now stored in priv
252 * (3945 does not contain this data).
253 *
254 * Tell "initialize" uCode to go ahead and load the runtime uCode.
255*/
256static void iwl4965_init_alive_start(struct iwl_priv *priv)
257{
258 /* Check alive response for "valid" sign from uCode */
259 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
260 /* We had an error bringing up the hardware, so take it
261 * all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800262 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800263 goto restart;
264 }
265
266 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
267 * This is a paranoid check, because we would not have gotten the
268 * "initialize" alive if code weren't properly loaded. */
269 if (iwl_verify_ucode(priv)) {
270 /* Runtime instruction load was bad;
271 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800272 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800273 goto restart;
274 }
275
276 /* Calculate temperature */
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +0800277 priv->temperature = iwl4965_hw_get_temperature(priv);
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800278
279 /* Send pointers to protocol/runtime uCode image ... init code will
280 * load and launch runtime uCode, which will send us another "Alive"
281 * notification. */
Tomas Winklere1623442009-01-27 14:27:56 -0800282 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800283 if (iwl4965_set_ucode_ptrs(priv)) {
284 /* Runtime instruction load won't happen;
285 * take it all the way back down so we can try again */
Tomas Winklere1623442009-01-27 14:27:56 -0800286 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +0800287 goto restart;
288 }
289 return;
290
291restart:
292 queue_work(priv->workqueue, &priv->restart);
293}
294
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700295static bool is_ht40_channel(__le32 rxon_flags)
Zhu Yib481de92007-09-25 17:54:57 -0700296{
Wey-Yi Guya2b0f022009-05-22 11:01:49 -0700297 int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
298 >> RXON_FLG_CHANNEL_MODE_POS;
299 return ((chan_mod == CHANNEL_MODE_PURE_40) ||
300 (chan_mod == CHANNEL_MODE_MIXED));
Zhu Yib481de92007-09-25 17:54:57 -0700301}
302
Tomas Winkler8614f362008-04-23 17:14:55 -0700303/*
304 * EEPROM handlers
305 */
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700306static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
Tomas Winkler8614f362008-04-23 17:14:55 -0700307{
Tomas Winkler0ef2ca62008-10-23 23:48:51 -0700308 return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
Tomas Winkler8614f362008-04-23 17:14:55 -0700309}
Zhu Yib481de92007-09-25 17:54:57 -0700310
Tomas Winklerda1bc452008-05-29 16:35:00 +0800311/*
Tomas Winklera96a27f2008-10-23 23:48:56 -0700312 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
Tomas Winklerda1bc452008-05-29 16:35:00 +0800313 * must be called under priv->lock and mac access
314 */
315static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
Zhu Yib481de92007-09-25 17:54:57 -0700316{
Tomas Winklerda1bc452008-05-29 16:35:00 +0800317 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
Zhu Yib481de92007-09-25 17:54:57 -0700318}
Ron Rindjunsky5a676bb2008-05-05 10:22:42 +0800319
Tomas Winkler91238712008-04-23 17:14:53 -0700320static int iwl4965_apm_init(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700321{
Tomas Winkler91238712008-04-23 17:14:53 -0700322 int ret = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700323
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700324 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
Tomas Winkler91238712008-04-23 17:14:53 -0700325 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
Zhu Yib481de92007-09-25 17:54:57 -0700326
Tomas Winkler8f061892008-05-29 16:34:56 +0800327 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
328 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
329 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
330
Tomas Winkler91238712008-04-23 17:14:53 -0700331 /* set "initialization complete" bit to move adapter
332 * D0U* --> D0A* state */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700333 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
Tomas Winkler91238712008-04-23 17:14:53 -0700334
335 /* wait for clock stabilization */
Abhijeet Kolekar1739d332009-10-02 13:44:05 -0700336 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
337 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
Zhu, Yi73d7b5a2008-12-05 07:58:40 -0800338 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
Tomas Winkler91238712008-04-23 17:14:53 -0700339 if (ret < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -0800340 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
Tomas Winkler91238712008-04-23 17:14:53 -0700341 goto out;
Zhu Yib481de92007-09-25 17:54:57 -0700342 }
343
Tomas Winkler91238712008-04-23 17:14:53 -0700344 /* enable DMA */
Tomas Winkler8f061892008-05-29 16:34:56 +0800345 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
346 APMG_CLK_VAL_BSM_CLK_RQT);
Zhu Yib481de92007-09-25 17:54:57 -0700347
348 udelay(20);
349
Tomas Winkler8f061892008-05-29 16:34:56 +0800350 /* disable L1-Active */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700351 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
Tomas Winkler91238712008-04-23 17:14:53 -0700352 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
Zhu Yib481de92007-09-25 17:54:57 -0700353
Tomas Winkler91238712008-04-23 17:14:53 -0700354out:
Tomas Winkler91238712008-04-23 17:14:53 -0700355 return ret;
356}
357
Tomas Winkler694cc562008-04-24 11:55:22 -0700358
359static void iwl4965_nic_config(struct iwl_priv *priv)
360{
361 unsigned long flags;
Tomas Winkler694cc562008-04-24 11:55:22 -0700362 u16 radio_cfg;
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800363 u16 lctl;
Tomas Winkler694cc562008-04-24 11:55:22 -0700364
365 spin_lock_irqsave(&priv->lock, flags);
366
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800367 lctl = iwl_pcie_link_ctl(priv);
Tomas Winkler694cc562008-04-24 11:55:22 -0700368
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800369 /* HW bug W/A - negligible power consumption */
370 /* L1-ASPM is enabled by BIOS */
371 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
372 /* L1-ASPM enabled: disable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800373 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
374 else
Tomas Winkler3fdb68d2009-02-10 15:19:02 -0800375 /* L1-ASPM disabled: enable L0S */
Tomas Winkler8f061892008-05-29 16:34:56 +0800376 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
Tomas Winkler694cc562008-04-24 11:55:22 -0700377
378 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
379
380 /* write radio config values to register */
381 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
382 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
383 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
384 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
385 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
386
387 /* set CSR_HW_CONFIG_REG for uCode use */
388 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
389 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
390 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
391
392 priv->calib_info = (struct iwl_eeprom_calib_info *)
393 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
394
395 spin_unlock_irqrestore(&priv->lock, flags);
396}
397
Zhu Yib481de92007-09-25 17:54:57 -0700398/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
399 * Called after every association, but this runs only once!
400 * ... once chain noise is calibrated the first time, it's good forever. */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700401static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700402{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700403 struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
Zhu Yib481de92007-09-25 17:54:57 -0700404
Tomas Winkler3109ece2008-03-28 16:33:35 -0700405 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700406 struct iwl_calib_diff_gain_cmd cmd;
Zhu Yib481de92007-09-25 17:54:57 -0700407
408 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800409 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Zhu Yib481de92007-09-25 17:54:57 -0700410 cmd.diff_gain_a = 0;
411 cmd.diff_gain_b = 0;
412 cmd.diff_gain_c = 0;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700413 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
414 sizeof(cmd), &cmd))
Winkler, Tomas15b16872008-12-19 10:37:33 +0800415 IWL_ERR(priv,
416 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
Zhu Yib481de92007-09-25 17:54:57 -0700417 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
Tomas Winklere1623442009-01-27 14:27:56 -0800418 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
Zhu Yib481de92007-09-25 17:54:57 -0700419 }
Zhu Yib481de92007-09-25 17:54:57 -0700420}
421
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700422static void iwl4965_gain_computation(struct iwl_priv *priv,
423 u32 *average_noise,
424 u16 min_average_noise_antenna_i,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700425 u32 min_average_noise,
426 u8 default_chain)
Zhu Yib481de92007-09-25 17:54:57 -0700427{
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700428 int i, ret;
429 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
Zhu Yib481de92007-09-25 17:54:57 -0700430
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700431 data->delta_gain_code[min_average_noise_antenna_i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700432
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -0700433 for (i = default_chain; i < NUM_RX_CHAINS; i++) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700434 s32 delta_g = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700435
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700436 if (!(data->disconn_array[i]) &&
437 (data->delta_gain_code[i] ==
Zhu Yib481de92007-09-25 17:54:57 -0700438 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700439 delta_g = average_noise[i] - min_average_noise;
440 data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
441 data->delta_gain_code[i] =
442 min(data->delta_gain_code[i],
443 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
Zhu Yib481de92007-09-25 17:54:57 -0700444
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700445 data->delta_gain_code[i] =
446 (data->delta_gain_code[i] | (1 << 2));
447 } else {
448 data->delta_gain_code[i] = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700449 }
Zhu Yib481de92007-09-25 17:54:57 -0700450 }
Tomas Winklere1623442009-01-27 14:27:56 -0800451 IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700452 data->delta_gain_code[0],
453 data->delta_gain_code[1],
454 data->delta_gain_code[2]);
Zhu Yib481de92007-09-25 17:54:57 -0700455
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700456 /* Differential gain gets sent to uCode only once */
457 if (!data->radio_write) {
Tomas Winklerf69f42a2008-10-23 23:48:52 -0700458 struct iwl_calib_diff_gain_cmd cmd;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700459 data->radio_write = 1;
Zhu Yib481de92007-09-25 17:54:57 -0700460
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700461 memset(&cmd, 0, sizeof(cmd));
Tomas Winkler0d950d82008-11-25 13:36:01 -0800462 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700463 cmd.diff_gain_a = data->delta_gain_code[0];
464 cmd.diff_gain_b = data->delta_gain_code[1];
465 cmd.diff_gain_c = data->delta_gain_code[2];
466 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
467 sizeof(cmd), &cmd);
468 if (ret)
Tomas Winklere1623442009-01-27 14:27:56 -0800469 IWL_DEBUG_CALIB(priv, "fail sending cmd "
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700470 "REPLY_PHY_CALIBRATION_CMD \n");
Zhu Yib481de92007-09-25 17:54:57 -0700471
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700472 /* TODO we might want recalculate
473 * rx_chain in rxon cmd */
474
475 /* Mark so we run this algo only once! */
476 data->state = IWL_CHAIN_NOISE_CALIBRATED;
Zhu Yib481de92007-09-25 17:54:57 -0700477 }
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700478 data->chain_noise_a = 0;
479 data->chain_noise_b = 0;
480 data->chain_noise_c = 0;
481 data->chain_signal_a = 0;
482 data->chain_signal_b = 0;
483 data->chain_signal_c = 0;
484 data->beacon_count = 0;
Zhu Yib481de92007-09-25 17:54:57 -0700485}
486
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800487static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
488 __le32 *tx_flags)
489{
Johannes Berge6a98542008-10-21 12:40:02 +0200490 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800491 *tx_flags |= TX_CMD_FLG_RTS_MSK;
492 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
Johannes Berge6a98542008-10-21 12:40:02 +0200493 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800494 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
495 *tx_flags |= TX_CMD_FLG_CTS_MSK;
496 }
497}
498
Zhu Yib481de92007-09-25 17:54:57 -0700499static void iwl4965_bg_txpower_work(struct work_struct *work)
500{
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700501 struct iwl_priv *priv = container_of(work, struct iwl_priv,
Zhu Yib481de92007-09-25 17:54:57 -0700502 txpower_work);
503
504 /* If a scan happened to start before we got here
505 * then just return; the statistics notification will
506 * kick off another scheduled work to compensate for
507 * any temperature delta we missed here. */
508 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
509 test_bit(STATUS_SCANNING, &priv->status))
510 return;
511
512 mutex_lock(&priv->mutex);
513
Tomas Winklera96a27f2008-10-23 23:48:56 -0700514 /* Regardless of if we are associated, we must reconfigure the
Zhu Yib481de92007-09-25 17:54:57 -0700515 * TX power since frames can be sent on non-radar channels while
516 * not associated */
Tomas Winkler630fe9b2008-06-12 09:47:08 +0800517 iwl4965_send_tx_power(priv);
Zhu Yib481de92007-09-25 17:54:57 -0700518
519 /* Update last_temperature to keep is_calib_needed from running
520 * when it isn't needed... */
521 priv->last_temperature = priv->temperature;
522
523 mutex_unlock(&priv->mutex);
524}
525
526/*
527 * Acquire priv->lock before calling this function !
528 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700529static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
Zhu Yib481de92007-09-25 17:54:57 -0700530{
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700531 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
Zhu Yib481de92007-09-25 17:54:57 -0700532 (index & 0xff) | (txq_id << 8));
Tomas Winkler12a81f62008-04-03 16:05:20 -0700533 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
Zhu Yib481de92007-09-25 17:54:57 -0700534}
535
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800536/**
537 * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
538 * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
539 * @scd_retry: (1) Indicates queue will be used in aggregation mode
540 *
541 * NOTE: Acquire priv->lock before calling this function !
Zhu Yib481de92007-09-25 17:54:57 -0700542 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700543static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800544 struct iwl_tx_queue *txq,
Zhu Yib481de92007-09-25 17:54:57 -0700545 int tx_fifo_id, int scd_retry)
546{
547 int txq_id = txq->q.id;
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800548
549 /* Find out whether to activate Tx queue */
Abhijeet Kolekarc3056062008-11-12 13:14:08 -0800550 int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
Zhu Yib481de92007-09-25 17:54:57 -0700551
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800552 /* Set up and activate */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700553 iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700554 (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
555 (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
556 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
557 (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
558 IWL49_SCD_QUEUE_STTS_REG_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700559
560 txq->sched_retry = scd_retry;
561
Tomas Winklere1623442009-01-27 14:27:56 -0800562 IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800563 active ? "Activate" : "Deactivate",
Zhu Yib481de92007-09-25 17:54:57 -0700564 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
565}
566
567static const u16 default_queue_to_tx_fifo[] = {
568 IWL_TX_FIFO_AC3,
569 IWL_TX_FIFO_AC2,
570 IWL_TX_FIFO_AC1,
571 IWL_TX_FIFO_AC0,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700572 IWL49_CMD_FIFO_NUM,
Zhu Yib481de92007-09-25 17:54:57 -0700573 IWL_TX_FIFO_HCCA_1,
574 IWL_TX_FIFO_HCCA_2
575};
576
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800577static int iwl4965_alive_notify(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700578{
579 u32 a;
Zhu Yib481de92007-09-25 17:54:57 -0700580 unsigned long flags;
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800581 int i, chan;
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800582 u32 reg_val;
Zhu Yib481de92007-09-25 17:54:57 -0700583
584 spin_lock_irqsave(&priv->lock, flags);
585
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800586 /* Clear 4965's internal Tx Scheduler data base */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700587 priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700588 a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
589 for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700590 iwl_write_targ_mem(priv, a, 0);
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700591 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700592 iwl_write_targ_mem(priv, a, 0);
Huaxu Wan39d5e0c2009-10-02 13:44:00 -0700593 for (; a < priv->scd_base_addr +
594 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700595 iwl_write_targ_mem(priv, a, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700596
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800597 /* Tel 4965 where to find Tx byte count tables */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700598 iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800599 priv->scd_bc_tbls.dma >> 10);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800600
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800601 /* Enable DMA channel */
602 for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
603 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
604 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
605 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
606
Winkler, Tomas40fc95d2008-11-19 15:32:27 -0800607 /* Update FH chicken bits */
608 reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
609 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
610 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
611
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800612 /* Disable chain mode for all queues */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700613 iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
Zhu Yib481de92007-09-25 17:54:57 -0700614
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800615 /* Initialize each Tx queue (including the command queue) */
Tomas Winkler5425e492008-04-15 16:01:38 -0700616 for (i = 0; i < priv->hw_params.max_txq_num; i++) {
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800617
618 /* TFD circular buffer read/write indexes */
Tomas Winkler12a81f62008-04-03 16:05:20 -0700619 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700620 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800621
622 /* Max Tx Window size for Scheduler-ACK mode */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700623 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700624 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
625 (SCD_WIN_SIZE <<
626 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
627 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800628
629 /* Frame limit */
Tomas Winkler3395f6e2008-03-25 16:33:37 -0700630 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700631 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
632 sizeof(u32),
633 (SCD_FRAME_LIMIT <<
634 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
635 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -0700636
637 }
Tomas Winkler12a81f62008-04-03 16:05:20 -0700638 iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
Tomas Winkler5425e492008-04-15 16:01:38 -0700639 (1 << priv->hw_params.max_txq_num) - 1);
Zhu Yib481de92007-09-25 17:54:57 -0700640
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800641 /* Activate all Tx DMA/FIFO channels */
Winkler, Tomas31a73fe2008-11-19 15:32:26 -0800642 priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
Zhu Yib481de92007-09-25 17:54:57 -0700643
644 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800645
646 /* Map each Tx/cmd queue to its corresponding fifo */
Zhu Yib481de92007-09-25 17:54:57 -0700647 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
648 int ac = default_queue_to_tx_fifo[i];
Ron Rindjunsky36470742008-05-15 13:54:10 +0800649 iwl_txq_ctx_activate(priv, i);
Zhu Yib481de92007-09-25 17:54:57 -0700650 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
651 }
652
Zhu Yib481de92007-09-25 17:54:57 -0700653 spin_unlock_irqrestore(&priv->lock, flags);
654
Mohamed Abbasa8b50a02009-05-22 11:01:47 -0700655 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700656}
657
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700658static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
659 .min_nrg_cck = 97,
Wey-Yi Guyfe6efb42009-06-12 13:22:54 -0700660 .max_nrg_cck = 0, /* not used, set to 0 */
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700661
662 .auto_corr_min_ofdm = 85,
663 .auto_corr_min_ofdm_mrc = 170,
664 .auto_corr_min_ofdm_x1 = 105,
665 .auto_corr_min_ofdm_mrc_x1 = 220,
666
667 .auto_corr_max_ofdm = 120,
668 .auto_corr_max_ofdm_mrc = 210,
669 .auto_corr_max_ofdm_x1 = 140,
670 .auto_corr_max_ofdm_mrc_x1 = 270,
671
672 .auto_corr_min_cck = 125,
673 .auto_corr_max_cck = 200,
674 .auto_corr_min_cck_mrc = 200,
675 .auto_corr_max_cck_mrc = 400,
676
677 .nrg_th_cck = 100,
678 .nrg_th_ofdm = 100,
Wey-Yi Guy55036d62009-10-09 13:20:24 -0700679
680 .barker_corr_th_min = 190,
681 .barker_corr_th_min_mrc = 390,
682 .nrg_th_cca = 62,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700683};
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700684
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700685static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
686{
687 /* want Kelvin */
Wey-Yi Guy672639d2009-07-24 11:13:01 -0700688 priv->hw_params.ct_kill_threshold =
689 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700690}
691
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800692/**
Tomas Winkler5425e492008-04-15 16:01:38 -0700693 * iwl4965_hw_set_hw_params
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800694 *
695 * Called when initializing driver
696 */
Emmanuel Grumbachbe1f3ab62008-06-12 09:47:18 +0800697static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -0700698{
Wey-Yi Guy88804e22009-10-09 13:20:28 -0700699 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
700 priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
701 priv->cfg->num_of_queues =
702 priv->cfg->mod_params->num_of_queues;
Assaf Krauss316c30d2008-03-14 10:38:46 -0700703
Wey-Yi Guy88804e22009-10-09 13:20:28 -0700704 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
Zhu Yif3f911d2008-12-02 12:14:04 -0800705 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800706 priv->hw_params.scd_bc_tbls_size =
Wey-Yi Guy88804e22009-10-09 13:20:28 -0700707 priv->cfg->num_of_queues *
708 sizeof(struct iwl4965_scd_bc_tbl);
Samuel Ortiza8e74e22009-01-23 13:45:14 -0800709 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
Tomas Winkler5425e492008-04-15 16:01:38 -0700710 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
711 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700712 priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
713 priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
714 priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -0700715 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700716
Winkler, Tomas141c43a2009-01-08 10:19:53 -0800717 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
718
Tomas Winklerec35cf22008-04-15 16:01:39 -0700719 priv->hw_params.tx_chains_num = 2;
720 priv->hw_params.rx_chains_num = 2;
Guy Cohenfde0db32008-04-21 15:42:01 -0700721 priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
722 priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
Wey-Yi Guy62161ae2009-05-21 13:44:23 -0700723 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
724 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
Ron Rindjunsky099b40b2008-04-21 15:41:53 -0700725
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -0700726 priv->hw_params.sens = &iwl4965_sensitivity;
Tomas Winkler3e82a822008-02-13 11:32:31 -0800727
Tomas Winkler059ff822008-04-14 21:16:14 -0700728 return 0;
Zhu Yib481de92007-09-25 17:54:57 -0700729}
730
Zhu Yib481de92007-09-25 17:54:57 -0700731static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
732{
733 s32 sign = 1;
734
735 if (num < 0) {
736 sign = -sign;
737 num = -num;
738 }
739 if (denom < 0) {
740 sign = -sign;
741 denom = -denom;
742 }
743 *res = 1;
744 *res = ((num * 2 + denom) / (denom * 2)) * sign;
745
746 return 1;
747}
748
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800749/**
750 * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
751 *
752 * Determines power supply voltage compensation for txpower calculations.
753 * Returns number of 1/2-dB steps to subtract from gain table index,
754 * to compensate for difference between power supply voltage during
755 * factory measurements, vs. current power supply voltage.
756 *
757 * Voltage indication is higher for lower voltage.
758 * Lower voltage requires more gain (lower gain table index).
759 */
Zhu Yib481de92007-09-25 17:54:57 -0700760static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
761 s32 current_voltage)
762{
763 s32 comp = 0;
764
765 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
766 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
767 return 0;
768
769 iwl4965_math_div_round(current_voltage - eeprom_voltage,
770 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
771
772 if (current_voltage > eeprom_voltage)
773 comp *= 2;
774 if ((comp < -2) || (comp > 2))
775 comp = 0;
776
777 return comp;
778}
779
Zhu Yib481de92007-09-25 17:54:57 -0700780static s32 iwl4965_get_tx_atten_grp(u16 channel)
781{
782 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
783 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
784 return CALIB_CH_GROUP_5;
785
786 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
787 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
788 return CALIB_CH_GROUP_1;
789
790 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
791 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
792 return CALIB_CH_GROUP_2;
793
794 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
795 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
796 return CALIB_CH_GROUP_3;
797
798 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
799 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
800 return CALIB_CH_GROUP_4;
801
Zhu Yib481de92007-09-25 17:54:57 -0700802 return -1;
803}
804
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700805static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
Zhu Yib481de92007-09-25 17:54:57 -0700806{
807 s32 b = -1;
808
809 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700810 if (priv->calib_info->band_info[b].ch_from == 0)
Zhu Yib481de92007-09-25 17:54:57 -0700811 continue;
812
Tomas Winkler073d3f52008-04-21 15:41:52 -0700813 if ((channel >= priv->calib_info->band_info[b].ch_from)
814 && (channel <= priv->calib_info->band_info[b].ch_to))
Zhu Yib481de92007-09-25 17:54:57 -0700815 break;
816 }
817
818 return b;
819}
820
821static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
822{
823 s32 val;
824
825 if (x2 == x1)
826 return y1;
827 else {
828 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
829 return val + y2;
830 }
831}
832
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +0800833/**
834 * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
835 *
836 * Interpolates factory measurements from the two sample channels within a
837 * sub-band, to apply to channel of interest. Interpolation is proportional to
838 * differences in channel frequencies, which is proportional to differences
839 * in channel number.
840 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -0700841static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
Tomas Winkler073d3f52008-04-21 15:41:52 -0700842 struct iwl_eeprom_calib_ch_info *chan_info)
Zhu Yib481de92007-09-25 17:54:57 -0700843{
844 s32 s = -1;
845 u32 c;
846 u32 m;
Tomas Winkler073d3f52008-04-21 15:41:52 -0700847 const struct iwl_eeprom_calib_measure *m1;
848 const struct iwl_eeprom_calib_measure *m2;
849 struct iwl_eeprom_calib_measure *omeas;
Zhu Yib481de92007-09-25 17:54:57 -0700850 u32 ch_i1;
851 u32 ch_i2;
852
853 s = iwl4965_get_sub_band(priv, channel);
854 if (s >= EEPROM_TX_POWER_BANDS) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800855 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
Zhu Yib481de92007-09-25 17:54:57 -0700856 return -1;
857 }
858
Tomas Winkler073d3f52008-04-21 15:41:52 -0700859 ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
860 ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
Zhu Yib481de92007-09-25 17:54:57 -0700861 chan_info->ch_num = (u8) channel;
862
Tomas Winklere1623442009-01-27 14:27:56 -0800863 IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
Zhu Yib481de92007-09-25 17:54:57 -0700864 channel, s, ch_i1, ch_i2);
865
866 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
867 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
Tomas Winkler073d3f52008-04-21 15:41:52 -0700868 m1 = &(priv->calib_info->band_info[s].ch1.
Zhu Yib481de92007-09-25 17:54:57 -0700869 measurements[c][m]);
Tomas Winkler073d3f52008-04-21 15:41:52 -0700870 m2 = &(priv->calib_info->band_info[s].ch2.
Zhu Yib481de92007-09-25 17:54:57 -0700871 measurements[c][m]);
872 omeas = &(chan_info->measurements[c][m]);
873
874 omeas->actual_pow =
875 (u8) iwl4965_interpolate_value(channel, ch_i1,
876 m1->actual_pow,
877 ch_i2,
878 m2->actual_pow);
879 omeas->gain_idx =
880 (u8) iwl4965_interpolate_value(channel, ch_i1,
881 m1->gain_idx, ch_i2,
882 m2->gain_idx);
883 omeas->temperature =
884 (u8) iwl4965_interpolate_value(channel, ch_i1,
885 m1->temperature,
886 ch_i2,
887 m2->temperature);
888 omeas->pa_det =
889 (s8) iwl4965_interpolate_value(channel, ch_i1,
890 m1->pa_det, ch_i2,
891 m2->pa_det);
892
Tomas Winklere1623442009-01-27 14:27:56 -0800893 IWL_DEBUG_TXPOWER(priv,
894 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
895 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
896 IWL_DEBUG_TXPOWER(priv,
897 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
898 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
899 IWL_DEBUG_TXPOWER(priv,
900 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
901 m1->pa_det, m2->pa_det, omeas->pa_det);
902 IWL_DEBUG_TXPOWER(priv,
903 "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
904 m1->temperature, m2->temperature,
905 omeas->temperature);
Zhu Yib481de92007-09-25 17:54:57 -0700906 }
907 }
908
909 return 0;
910}
911
912/* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
913 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
914static s32 back_off_table[] = {
915 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
916 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
917 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
918 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
919 10 /* CCK */
920};
921
922/* Thermal compensation values for txpower for various frequency ranges ...
923 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800924static struct iwl4965_txpower_comp_entry {
Zhu Yib481de92007-09-25 17:54:57 -0700925 s32 degrees_per_05db_a;
926 s32 degrees_per_05db_a_denom;
927} tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
928 {9, 2}, /* group 0 5.2, ch 34-43 */
929 {4, 1}, /* group 1 5.2, ch 44-70 */
930 {4, 1}, /* group 2 5.2, ch 71-124 */
931 {4, 1}, /* group 3 5.2, ch 125-200 */
932 {3, 1} /* group 4 2.4, ch all */
933};
934
935static s32 get_min_power_index(s32 rate_power_index, u32 band)
936{
937 if (!band) {
938 if ((rate_power_index & 7) <= 4)
939 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
940 }
941 return MIN_TX_GAIN_INDEX;
942}
943
944struct gain_entry {
945 u8 dsp;
946 u8 radio;
947};
948
949static const struct gain_entry gain_table[2][108] = {
950 /* 5.2GHz power gain index table */
951 {
952 {123, 0x3F}, /* highest txpower */
953 {117, 0x3F},
954 {110, 0x3F},
955 {104, 0x3F},
956 {98, 0x3F},
957 {110, 0x3E},
958 {104, 0x3E},
959 {98, 0x3E},
960 {110, 0x3D},
961 {104, 0x3D},
962 {98, 0x3D},
963 {110, 0x3C},
964 {104, 0x3C},
965 {98, 0x3C},
966 {110, 0x3B},
967 {104, 0x3B},
968 {98, 0x3B},
969 {110, 0x3A},
970 {104, 0x3A},
971 {98, 0x3A},
972 {110, 0x39},
973 {104, 0x39},
974 {98, 0x39},
975 {110, 0x38},
976 {104, 0x38},
977 {98, 0x38},
978 {110, 0x37},
979 {104, 0x37},
980 {98, 0x37},
981 {110, 0x36},
982 {104, 0x36},
983 {98, 0x36},
984 {110, 0x35},
985 {104, 0x35},
986 {98, 0x35},
987 {110, 0x34},
988 {104, 0x34},
989 {98, 0x34},
990 {110, 0x33},
991 {104, 0x33},
992 {98, 0x33},
993 {110, 0x32},
994 {104, 0x32},
995 {98, 0x32},
996 {110, 0x31},
997 {104, 0x31},
998 {98, 0x31},
999 {110, 0x30},
1000 {104, 0x30},
1001 {98, 0x30},
1002 {110, 0x25},
1003 {104, 0x25},
1004 {98, 0x25},
1005 {110, 0x24},
1006 {104, 0x24},
1007 {98, 0x24},
1008 {110, 0x23},
1009 {104, 0x23},
1010 {98, 0x23},
1011 {110, 0x22},
1012 {104, 0x18},
1013 {98, 0x18},
1014 {110, 0x17},
1015 {104, 0x17},
1016 {98, 0x17},
1017 {110, 0x16},
1018 {104, 0x16},
1019 {98, 0x16},
1020 {110, 0x15},
1021 {104, 0x15},
1022 {98, 0x15},
1023 {110, 0x14},
1024 {104, 0x14},
1025 {98, 0x14},
1026 {110, 0x13},
1027 {104, 0x13},
1028 {98, 0x13},
1029 {110, 0x12},
1030 {104, 0x08},
1031 {98, 0x08},
1032 {110, 0x07},
1033 {104, 0x07},
1034 {98, 0x07},
1035 {110, 0x06},
1036 {104, 0x06},
1037 {98, 0x06},
1038 {110, 0x05},
1039 {104, 0x05},
1040 {98, 0x05},
1041 {110, 0x04},
1042 {104, 0x04},
1043 {98, 0x04},
1044 {110, 0x03},
1045 {104, 0x03},
1046 {98, 0x03},
1047 {110, 0x02},
1048 {104, 0x02},
1049 {98, 0x02},
1050 {110, 0x01},
1051 {104, 0x01},
1052 {98, 0x01},
1053 {110, 0x00},
1054 {104, 0x00},
1055 {98, 0x00},
1056 {93, 0x00},
1057 {88, 0x00},
1058 {83, 0x00},
1059 {78, 0x00},
1060 },
1061 /* 2.4GHz power gain index table */
1062 {
1063 {110, 0x3f}, /* highest txpower */
1064 {104, 0x3f},
1065 {98, 0x3f},
1066 {110, 0x3e},
1067 {104, 0x3e},
1068 {98, 0x3e},
1069 {110, 0x3d},
1070 {104, 0x3d},
1071 {98, 0x3d},
1072 {110, 0x3c},
1073 {104, 0x3c},
1074 {98, 0x3c},
1075 {110, 0x3b},
1076 {104, 0x3b},
1077 {98, 0x3b},
1078 {110, 0x3a},
1079 {104, 0x3a},
1080 {98, 0x3a},
1081 {110, 0x39},
1082 {104, 0x39},
1083 {98, 0x39},
1084 {110, 0x38},
1085 {104, 0x38},
1086 {98, 0x38},
1087 {110, 0x37},
1088 {104, 0x37},
1089 {98, 0x37},
1090 {110, 0x36},
1091 {104, 0x36},
1092 {98, 0x36},
1093 {110, 0x35},
1094 {104, 0x35},
1095 {98, 0x35},
1096 {110, 0x34},
1097 {104, 0x34},
1098 {98, 0x34},
1099 {110, 0x33},
1100 {104, 0x33},
1101 {98, 0x33},
1102 {110, 0x32},
1103 {104, 0x32},
1104 {98, 0x32},
1105 {110, 0x31},
1106 {104, 0x31},
1107 {98, 0x31},
1108 {110, 0x30},
1109 {104, 0x30},
1110 {98, 0x30},
1111 {110, 0x6},
1112 {104, 0x6},
1113 {98, 0x6},
1114 {110, 0x5},
1115 {104, 0x5},
1116 {98, 0x5},
1117 {110, 0x4},
1118 {104, 0x4},
1119 {98, 0x4},
1120 {110, 0x3},
1121 {104, 0x3},
1122 {98, 0x3},
1123 {110, 0x2},
1124 {104, 0x2},
1125 {98, 0x2},
1126 {110, 0x1},
1127 {104, 0x1},
1128 {98, 0x1},
1129 {110, 0x0},
1130 {104, 0x0},
1131 {98, 0x0},
1132 {97, 0},
1133 {96, 0},
1134 {95, 0},
1135 {94, 0},
1136 {93, 0},
1137 {92, 0},
1138 {91, 0},
1139 {90, 0},
1140 {89, 0},
1141 {88, 0},
1142 {87, 0},
1143 {86, 0},
1144 {85, 0},
1145 {84, 0},
1146 {83, 0},
1147 {82, 0},
1148 {81, 0},
1149 {80, 0},
1150 {79, 0},
1151 {78, 0},
1152 {77, 0},
1153 {76, 0},
1154 {75, 0},
1155 {74, 0},
1156 {73, 0},
1157 {72, 0},
1158 {71, 0},
1159 {70, 0},
1160 {69, 0},
1161 {68, 0},
1162 {67, 0},
1163 {66, 0},
1164 {65, 0},
1165 {64, 0},
1166 {63, 0},
1167 {62, 0},
1168 {61, 0},
1169 {60, 0},
1170 {59, 0},
1171 }
1172};
1173
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001174static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001175 u8 is_ht40, u8 ctrl_chan_high,
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001176 struct iwl4965_tx_power_db *tx_power_tbl)
Zhu Yib481de92007-09-25 17:54:57 -07001177{
1178 u8 saturation_power;
1179 s32 target_power;
1180 s32 user_target_power;
1181 s32 power_limit;
1182 s32 current_temp;
1183 s32 reg_limit;
1184 s32 current_regulatory;
1185 s32 txatten_grp = CALIB_CH_GROUP_MAX;
1186 int i;
1187 int c;
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001188 const struct iwl_channel_info *ch_info = NULL;
Tomas Winkler073d3f52008-04-21 15:41:52 -07001189 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1190 const struct iwl_eeprom_calib_measure *measurement;
Zhu Yib481de92007-09-25 17:54:57 -07001191 s16 voltage;
1192 s32 init_voltage;
1193 s32 voltage_compensation;
1194 s32 degrees_per_05db_num;
1195 s32 degrees_per_05db_denom;
1196 s32 factory_temp;
1197 s32 temperature_comp[2];
1198 s32 factory_gain_index[2];
1199 s32 factory_actual_pwr[2];
1200 s32 power_index;
1201
Winkler, Tomas62ea9c52009-01-19 15:30:29 -08001202 /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
Zhu Yib481de92007-09-25 17:54:57 -07001203 * are used for indexing into txpower table) */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001204 user_target_power = 2 * priv->tx_power_user_lmt;
Zhu Yib481de92007-09-25 17:54:57 -07001205
1206 /* Get current (RXON) channel, band, width */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001207 IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1208 is_ht40);
Zhu Yib481de92007-09-25 17:54:57 -07001209
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001210 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1211
1212 if (!is_channel_valid(ch_info))
Zhu Yib481de92007-09-25 17:54:57 -07001213 return -EINVAL;
1214
1215 /* get txatten group, used to select 1) thermal txpower adjustment
1216 * and 2) mimo txpower balance between Tx chains. */
1217 txatten_grp = iwl4965_get_tx_atten_grp(channel);
Samuel Ortiza3139c52008-12-19 10:37:09 +08001218 if (txatten_grp < 0) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001219 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
Samuel Ortiza3139c52008-12-19 10:37:09 +08001220 channel);
Zhu Yib481de92007-09-25 17:54:57 -07001221 return -EINVAL;
Samuel Ortiza3139c52008-12-19 10:37:09 +08001222 }
Zhu Yib481de92007-09-25 17:54:57 -07001223
Tomas Winklere1623442009-01-27 14:27:56 -08001224 IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001225 channel, txatten_grp);
1226
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001227 if (is_ht40) {
Zhu Yib481de92007-09-25 17:54:57 -07001228 if (ctrl_chan_high)
1229 channel -= 2;
1230 else
1231 channel += 2;
1232 }
1233
1234 /* hardware txpower limits ...
1235 * saturation (clipping distortion) txpowers are in half-dBm */
1236 if (band)
Tomas Winkler073d3f52008-04-21 15:41:52 -07001237 saturation_power = priv->calib_info->saturation_power24;
Zhu Yib481de92007-09-25 17:54:57 -07001238 else
Tomas Winkler073d3f52008-04-21 15:41:52 -07001239 saturation_power = priv->calib_info->saturation_power52;
Zhu Yib481de92007-09-25 17:54:57 -07001240
1241 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1242 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1243 if (band)
1244 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1245 else
1246 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1247 }
1248
1249 /* regulatory txpower limits ... reg_limit values are in half-dBm,
1250 * max_power_avg values are in dBm, convert * 2 */
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001251 if (is_ht40)
1252 reg_limit = ch_info->ht40_max_power_avg * 2;
Zhu Yib481de92007-09-25 17:54:57 -07001253 else
1254 reg_limit = ch_info->max_power_avg * 2;
1255
1256 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1257 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1258 if (band)
1259 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1260 else
1261 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1262 }
1263
1264 /* Interpolate txpower calibration values for this channel,
1265 * based on factory calibration tests on spaced channels. */
1266 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1267
1268 /* calculate tx gain adjustment based on power supply voltage */
Tomas Winkler073d3f52008-04-21 15:41:52 -07001269 voltage = priv->calib_info->voltage;
Zhu Yib481de92007-09-25 17:54:57 -07001270 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1271 voltage_compensation =
1272 iwl4965_get_voltage_compensation(voltage, init_voltage);
1273
Tomas Winklere1623442009-01-27 14:27:56 -08001274 IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001275 init_voltage,
1276 voltage, voltage_compensation);
1277
1278 /* get current temperature (Celsius) */
1279 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1280 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1281 current_temp = KELVIN_TO_CELSIUS(current_temp);
1282
1283 /* select thermal txpower adjustment params, based on channel group
1284 * (same frequency group used for mimo txatten adjustment) */
1285 degrees_per_05db_num =
1286 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1287 degrees_per_05db_denom =
1288 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1289
1290 /* get per-chain txpower values from factory measurements */
1291 for (c = 0; c < 2; c++) {
1292 measurement = &ch_eeprom_info.measurements[c][1];
1293
1294 /* txgain adjustment (in half-dB steps) based on difference
1295 * between factory and current temperature */
1296 factory_temp = measurement->temperature;
1297 iwl4965_math_div_round((current_temp - factory_temp) *
1298 degrees_per_05db_denom,
1299 degrees_per_05db_num,
1300 &temperature_comp[c]);
1301
1302 factory_gain_index[c] = measurement->gain_idx;
1303 factory_actual_pwr[c] = measurement->actual_pow;
1304
Tomas Winklere1623442009-01-27 14:27:56 -08001305 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1306 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
Zhu Yib481de92007-09-25 17:54:57 -07001307 "curr tmp %d, comp %d steps\n",
1308 factory_temp, current_temp,
1309 temperature_comp[c]);
1310
Tomas Winklere1623442009-01-27 14:27:56 -08001311 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001312 factory_gain_index[c],
1313 factory_actual_pwr[c]);
1314 }
1315
1316 /* for each of 33 bit-rates (including 1 for CCK) */
1317 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1318 u8 is_mimo_rate;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001319 union iwl4965_tx_power_dual_stream tx_power;
Zhu Yib481de92007-09-25 17:54:57 -07001320
1321 /* for mimo, reduce each chain's txpower by half
1322 * (3dB, 6 steps), so total output power is regulatory
1323 * compliant. */
1324 if (i & 0x8) {
1325 current_regulatory = reg_limit -
1326 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1327 is_mimo_rate = 1;
1328 } else {
1329 current_regulatory = reg_limit;
1330 is_mimo_rate = 0;
1331 }
1332
1333 /* find txpower limit, either hardware or regulatory */
1334 power_limit = saturation_power - back_off_table[i];
1335 if (power_limit > current_regulatory)
1336 power_limit = current_regulatory;
1337
1338 /* reduce user's txpower request if necessary
1339 * for this rate on this channel */
1340 target_power = user_target_power;
1341 if (target_power > power_limit)
1342 target_power = power_limit;
1343
Tomas Winklere1623442009-01-27 14:27:56 -08001344 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001345 i, saturation_power - back_off_table[i],
1346 current_regulatory, user_target_power,
1347 target_power);
1348
1349 /* for each of 2 Tx chains (radio transmitters) */
1350 for (c = 0; c < 2; c++) {
1351 s32 atten_value;
1352
1353 if (is_mimo_rate)
1354 atten_value =
1355 (s32)le32_to_cpu(priv->card_alive_init.
1356 tx_atten[txatten_grp][c]);
1357 else
1358 atten_value = 0;
1359
1360 /* calculate index; higher index means lower txpower */
1361 power_index = (u8) (factory_gain_index[c] -
1362 (target_power -
1363 factory_actual_pwr[c]) -
1364 temperature_comp[c] -
1365 voltage_compensation +
1366 atten_value);
1367
Tomas Winklere1623442009-01-27 14:27:56 -08001368/* IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
Zhu Yib481de92007-09-25 17:54:57 -07001369 power_index); */
1370
1371 if (power_index < get_min_power_index(i, band))
1372 power_index = get_min_power_index(i, band);
1373
1374 /* adjust 5 GHz index to support negative indexes */
1375 if (!band)
1376 power_index += 9;
1377
1378 /* CCK, rate 32, reduce txpower for CCK */
1379 if (i == POWER_TABLE_CCK_ENTRY)
1380 power_index +=
1381 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1382
1383 /* stay within the table! */
1384 if (power_index > 107) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001385 IWL_WARN(priv, "txpower index %d > 107\n",
Zhu Yib481de92007-09-25 17:54:57 -07001386 power_index);
1387 power_index = 107;
1388 }
1389 if (power_index < 0) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001390 IWL_WARN(priv, "txpower index %d < 0\n",
Zhu Yib481de92007-09-25 17:54:57 -07001391 power_index);
1392 power_index = 0;
1393 }
1394
1395 /* fill txpower command for this rate/chain */
1396 tx_power.s.radio_tx_gain[c] =
1397 gain_table[band][power_index].radio;
1398 tx_power.s.dsp_predis_atten[c] =
1399 gain_table[band][power_index].dsp;
1400
Tomas Winklere1623442009-01-27 14:27:56 -08001401 IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
Zhu Yib481de92007-09-25 17:54:57 -07001402 "gain 0x%02x dsp %d\n",
1403 c, atten_value, power_index,
1404 tx_power.s.radio_tx_gain[c],
1405 tx_power.s.dsp_predis_atten[c]);
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001406 } /* for each chain */
Zhu Yib481de92007-09-25 17:54:57 -07001407
1408 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1409
Tomas Winkler3ac7f142008-07-21 02:40:14 +03001410 } /* for each rate */
Zhu Yib481de92007-09-25 17:54:57 -07001411
1412 return 0;
1413}
1414
1415/**
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001416 * iwl4965_send_tx_power - Configure the TXPOWER level user limit
Zhu Yib481de92007-09-25 17:54:57 -07001417 *
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001418 * Uses the active RXON for channel, band, and characteristics (ht40, high)
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001419 * The power limit is taken from priv->tx_power_user_lmt.
Zhu Yib481de92007-09-25 17:54:57 -07001420 */
Tomas Winkler630fe9b2008-06-12 09:47:08 +08001421static int iwl4965_send_tx_power(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001422{
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001423 struct iwl4965_txpowertable_cmd cmd = { 0 };
Tomas Winkler857485c2008-03-21 13:53:44 -07001424 int ret;
Zhu Yib481de92007-09-25 17:54:57 -07001425 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001426 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001427 u8 ctrl_chan_high = 0;
1428
1429 if (test_bit(STATUS_SCANNING, &priv->status)) {
1430 /* If this gets hit a lot, switch it to a BUG() and catch
1431 * the stack trace to find out who is calling this during
1432 * a scan. */
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001433 IWL_WARN(priv, "TX Power requested while scanning!\n");
Zhu Yib481de92007-09-25 17:54:57 -07001434 return -EAGAIN;
1435 }
1436
Johannes Berg8318d782008-01-24 19:38:38 +01001437 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001438
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001439 is_ht40 = is_ht40_channel(priv->active_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001440
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001441 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001442 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1443 ctrl_chan_high = 1;
1444
1445 cmd.band = band;
1446 cmd.channel = priv->active_rxon.channel;
1447
Tomas Winkler857485c2008-03-21 13:53:44 -07001448 ret = iwl4965_fill_txpower_tbl(priv, band,
Zhu Yib481de92007-09-25 17:54:57 -07001449 le16_to_cpu(priv->active_rxon.channel),
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001450 is_ht40, ctrl_chan_high, &cmd.tx_power);
Tomas Winkler857485c2008-03-21 13:53:44 -07001451 if (ret)
1452 goto out;
Zhu Yib481de92007-09-25 17:54:57 -07001453
Tomas Winkler857485c2008-03-21 13:53:44 -07001454 ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1455
1456out:
1457 return ret;
Zhu Yib481de92007-09-25 17:54:57 -07001458}
1459
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001460static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1461{
1462 int ret = 0;
1463 struct iwl4965_rxon_assoc_cmd rxon_assoc;
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001464 const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1465 const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001466
1467 if ((rxon1->flags == rxon2->flags) &&
1468 (rxon1->filter_flags == rxon2->filter_flags) &&
1469 (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1470 (rxon1->ofdm_ht_single_stream_basic_rates ==
1471 rxon2->ofdm_ht_single_stream_basic_rates) &&
1472 (rxon1->ofdm_ht_dual_stream_basic_rates ==
1473 rxon2->ofdm_ht_dual_stream_basic_rates) &&
1474 (rxon1->rx_chain == rxon2->rx_chain) &&
1475 (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001476 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
Tomas Winkler7e8c5192008-04-15 16:01:43 -07001477 return 0;
1478 }
1479
1480 rxon_assoc.flags = priv->staging_rxon.flags;
1481 rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1482 rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1483 rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1484 rxon_assoc.reserved = 0;
1485 rxon_assoc.ofdm_ht_single_stream_basic_rates =
1486 priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1487 rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1488 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1489 rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1490
1491 ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1492 sizeof(rxon_assoc), &rxon_assoc, NULL);
1493 if (ret)
1494 return ret;
1495
1496 return ret;
1497}
1498
Zhu Yi3c935522008-09-03 11:26:57 +08001499#ifdef IEEE80211_CONF_CHANNEL_SWITCH
Emmanuel Grumbacha33c2f42008-09-03 11:26:56 +08001500static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
Zhu Yib481de92007-09-25 17:54:57 -07001501{
1502 int rc;
1503 u8 band = 0;
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001504 bool is_ht40 = false;
Zhu Yib481de92007-09-25 17:54:57 -07001505 u8 ctrl_chan_high = 0;
Christoph Hellwigbb8c0932008-01-27 16:41:47 -08001506 struct iwl4965_channel_switch_cmd cmd = { 0 };
Assaf Kraussbf85ea42008-03-14 10:38:49 -07001507 const struct iwl_channel_info *ch_info;
Zhu Yib481de92007-09-25 17:54:57 -07001508
Johannes Berg8318d782008-01-24 19:38:38 +01001509 band = priv->band == IEEE80211_BAND_2GHZ;
Zhu Yib481de92007-09-25 17:54:57 -07001510
Assaf Krauss8622e702008-03-21 13:53:43 -07001511 ch_info = iwl_get_channel_info(priv, priv->band, channel);
Zhu Yib481de92007-09-25 17:54:57 -07001512
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001513 is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
Zhu Yib481de92007-09-25 17:54:57 -07001514
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001515 if (is_ht40 &&
Zhu Yib481de92007-09-25 17:54:57 -07001516 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1517 ctrl_chan_high = 1;
1518
1519 cmd.band = band;
1520 cmd.expect_beacon = 0;
1521 cmd.channel = cpu_to_le16(channel);
1522 cmd.rxon_flags = priv->active_rxon.flags;
1523 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1524 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1525 if (ch_info)
1526 cmd.expect_beacon = is_channel_radar(ch_info);
1527 else
1528 cmd.expect_beacon = 1;
1529
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001530 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
Zhu Yib481de92007-09-25 17:54:57 -07001531 ctrl_chan_high, &cmd.tx_power);
1532 if (rc) {
Tomas Winklere1623442009-01-27 14:27:56 -08001533 IWL_DEBUG_11H(priv, "error:%d fill txpower_tbl\n", rc);
Zhu Yib481de92007-09-25 17:54:57 -07001534 return rc;
1535 }
1536
Tomas Winkler857485c2008-03-21 13:53:44 -07001537 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
Zhu Yib481de92007-09-25 17:54:57 -07001538 return rc;
1539}
Zhu Yi3c935522008-09-03 11:26:57 +08001540#endif
Zhu Yib481de92007-09-25 17:54:57 -07001541
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001542/**
Tomas Winklere2a722e2008-04-14 21:16:10 -07001543 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001544 */
Tomas Winklere2a722e2008-04-14 21:16:10 -07001545static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +08001546 struct iwl_tx_queue *txq,
Tomas Winklere2a722e2008-04-14 21:16:10 -07001547 u16 byte_cnt)
Zhu Yib481de92007-09-25 17:54:57 -07001548{
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001549 struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
Tomas Winkler127901a2008-10-23 23:48:55 -07001550 int txq_id = txq->q.id;
1551 int write_ptr = txq->q.write_ptr;
1552 int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1553 __le16 bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001554
Tomas Winkler127901a2008-10-23 23:48:55 -07001555 WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
Zhu Yib481de92007-09-25 17:54:57 -07001556
Tomas Winkler127901a2008-10-23 23:48:55 -07001557 bc_ent = cpu_to_le16(len & 0xFFF);
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001558 /* Set up byte count within first 256 entries */
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001559 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001560
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001561 /* If within first 64 entries, duplicate at end */
Tomas Winkler127901a2008-10-23 23:48:55 -07001562 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -08001563 scd_bc_tbl[txq_id].
Tomas Winkler127901a2008-10-23 23:48:55 -07001564 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
Zhu Yib481de92007-09-25 17:54:57 -07001565}
1566
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001567/**
Zhu Yib481de92007-09-25 17:54:57 -07001568 * sign_extend - Sign extend a value using specified bit as sign-bit
1569 *
1570 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1571 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1572 *
1573 * @param oper value to sign extend
1574 * @param index 0 based bit index (0<=index<32) to sign bit
1575 */
1576static s32 sign_extend(u32 oper, int index)
1577{
1578 u8 shift = 31 - index;
1579
1580 return (s32)(oper << shift) >> shift;
1581}
1582
1583/**
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001584 * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
Zhu Yib481de92007-09-25 17:54:57 -07001585 * @statistics: Provides the temperature reading from the uCode
1586 *
1587 * A return of <0 indicates bogus data in the statistics
1588 */
Reinette Chatre3d816c72009-08-07 15:41:37 -07001589static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001590{
1591 s32 temperature;
1592 s32 vt;
1593 s32 R1, R2, R3;
1594 u32 R4;
1595
1596 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07001597 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1598 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001599 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1600 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1601 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1602 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1603 } else {
Tomas Winklere1623442009-01-27 14:27:56 -08001604 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
Zhu Yib481de92007-09-25 17:54:57 -07001605 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1606 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1607 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1608 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1609 }
1610
1611 /*
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001612 * Temperature is only 23 bits, so sign extend out to 32.
Zhu Yib481de92007-09-25 17:54:57 -07001613 *
1614 * NOTE If we haven't received a statistics notification yet
1615 * with an updated temperature, use R4 provided to us in the
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001616 * "initialize" ALIVE response.
1617 */
Zhu Yib481de92007-09-25 17:54:57 -07001618 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1619 vt = sign_extend(R4, 23);
1620 else
1621 vt = sign_extend(
1622 le32_to_cpu(priv->statistics.general.temperature), 23);
1623
Tomas Winklere1623442009-01-27 14:27:56 -08001624 IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
Zhu Yib481de92007-09-25 17:54:57 -07001625
1626 if (R3 == R1) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001627 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
Zhu Yib481de92007-09-25 17:54:57 -07001628 return -1;
1629 }
1630
1631 /* Calculate temperature in degrees Kelvin, adjust by 97%.
1632 * Add offset to center the adjustment around 0 degrees Centigrade. */
1633 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1634 temperature /= (R3 - R1);
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001635 temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
Zhu Yib481de92007-09-25 17:54:57 -07001636
Tomas Winklere1623442009-01-27 14:27:56 -08001637 IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001638 temperature, KELVIN_TO_CELSIUS(temperature));
Zhu Yib481de92007-09-25 17:54:57 -07001639
1640 return temperature;
1641}
1642
1643/* Adjust Txpower only if temperature variance is greater than threshold. */
1644#define IWL_TEMPERATURE_THRESHOLD 3
1645
1646/**
1647 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1648 *
1649 * If the temperature changed has changed sufficiently, then a recalibration
1650 * is needed.
1651 *
1652 * Assumes caller will replace priv->last_temperature once calibration
1653 * executed.
1654 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001655static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001656{
1657 int temp_diff;
1658
1659 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001660 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
Zhu Yib481de92007-09-25 17:54:57 -07001661 return 0;
1662 }
1663
1664 temp_diff = priv->temperature - priv->last_temperature;
1665
1666 /* get absolute value */
1667 if (temp_diff < 0) {
Tomas Winklere1623442009-01-27 14:27:56 -08001668 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001669 temp_diff = -temp_diff;
1670 } else if (temp_diff == 0)
Tomas Winklere1623442009-01-27 14:27:56 -08001671 IWL_DEBUG_POWER(priv, "Same temp, \n");
Zhu Yib481de92007-09-25 17:54:57 -07001672 else
Tomas Winklere1623442009-01-27 14:27:56 -08001673 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
Zhu Yib481de92007-09-25 17:54:57 -07001674
1675 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
Tomas Winklere1623442009-01-27 14:27:56 -08001676 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001677 return 0;
1678 }
1679
Tomas Winklere1623442009-01-27 14:27:56 -08001680 IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
Zhu Yib481de92007-09-25 17:54:57 -07001681
1682 return 1;
1683}
1684
Zhu Yi52256402008-06-30 17:23:31 +08001685static void iwl4965_temperature_calib(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07001686{
Zhu Yib481de92007-09-25 17:54:57 -07001687 s32 temp;
Zhu Yib481de92007-09-25 17:54:57 -07001688
Emmanuel Grumbach91dbc5b2008-06-12 09:47:14 +08001689 temp = iwl4965_hw_get_temperature(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001690 if (temp < 0)
1691 return;
1692
1693 if (priv->temperature != temp) {
1694 if (priv->temperature)
Tomas Winklere1623442009-01-27 14:27:56 -08001695 IWL_DEBUG_TEMP(priv, "Temperature changed "
Zhu Yib481de92007-09-25 17:54:57 -07001696 "from %dC to %dC\n",
1697 KELVIN_TO_CELSIUS(priv->temperature),
1698 KELVIN_TO_CELSIUS(temp));
1699 else
Tomas Winklere1623442009-01-27 14:27:56 -08001700 IWL_DEBUG_TEMP(priv, "Temperature "
Zhu Yib481de92007-09-25 17:54:57 -07001701 "initialized to %dC\n",
1702 KELVIN_TO_CELSIUS(temp));
1703 }
1704
1705 priv->temperature = temp;
Wey-Yi Guy39b73fb2009-07-24 11:13:02 -07001706 iwl_tt_handler(priv);
Zhu Yib481de92007-09-25 17:54:57 -07001707 set_bit(STATUS_TEMPERATURE, &priv->status);
1708
Emmanuel Grumbach203566f2008-06-12 09:46:54 +08001709 if (!priv->disable_tx_power_cal &&
1710 unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1711 iwl4965_is_temp_calib_needed(priv))
Zhu Yib481de92007-09-25 17:54:57 -07001712 queue_work(priv->workqueue, &priv->txpower_work);
1713}
1714
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001715/**
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001716 * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1717 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001718static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001719 u16 txq_id)
1720{
1721 /* Simply stop the queue, but don't change any configuration;
1722 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001723 iwl_write_prph(priv,
Tomas Winkler12a81f62008-04-03 16:05:20 -07001724 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001725 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1726 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001727}
1728
1729/**
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001730 * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
Ron Rindjunskyb095d03a72008-03-06 17:36:56 -08001731 * priv->lock must be held by the caller
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001732 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001733static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1734 u16 ssn_idx, u8 tx_fifo)
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001735{
Tomas Winkler9f17b312008-07-11 11:53:35 +08001736 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
Wey-Yi Guy88804e22009-10-09 13:20:28 -07001737 (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1738 <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001739 IWL_WARN(priv,
1740 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001741 txq_id, IWL49_FIRST_AMPDU_QUEUE,
Wey-Yi Guy88804e22009-10-09 13:20:28 -07001742 IWL49_FIRST_AMPDU_QUEUE +
1743 priv->cfg->num_of_ampdu_queues - 1);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001744 return -EINVAL;
1745 }
1746
1747 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1748
Tomas Winkler12a81f62008-04-03 16:05:20 -07001749 iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001750
1751 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1752 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1753 /* supposes that ssn_idx is valid (!= 0xFFF) */
1754 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1755
Tomas Winkler12a81f62008-04-03 16:05:20 -07001756 iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Ron Rindjunsky36470742008-05-15 13:54:10 +08001757 iwl_txq_ctx_deactivate(priv, txq_id);
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001758 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1759
1760 return 0;
1761}
1762
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001763/**
1764 * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1765 */
Tomas Winklerc79dd5b2008-03-12 16:58:50 -07001766static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
Zhu Yib481de92007-09-25 17:54:57 -07001767 u16 txq_id)
1768{
1769 u32 tbl_dw_addr;
1770 u32 tbl_dw;
1771 u16 scd_q2ratid;
1772
Tomas Winkler30e553e2008-05-29 16:35:16 +08001773 scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
Zhu Yib481de92007-09-25 17:54:57 -07001774
1775 tbl_dw_addr = priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001776 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
Zhu Yib481de92007-09-25 17:54:57 -07001777
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001778 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
Zhu Yib481de92007-09-25 17:54:57 -07001779
1780 if (txq_id & 0x1)
1781 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1782 else
1783 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1784
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001785 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
Zhu Yib481de92007-09-25 17:54:57 -07001786
1787 return 0;
1788}
1789
Ron Rindjunskyfe01b472008-01-28 14:07:24 +02001790
Zhu Yib481de92007-09-25 17:54:57 -07001791/**
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001792 * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1793 *
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +08001794 * NOTE: txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001795 * i.e. it must be one of the higher queues used for aggregation
Zhu Yib481de92007-09-25 17:54:57 -07001796 */
Tomas Winkler30e553e2008-05-29 16:35:16 +08001797static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1798 int tx_fifo, int sta_id, int tid, u16 ssn_idx)
Zhu Yib481de92007-09-25 17:54:57 -07001799{
1800 unsigned long flags;
Zhu Yib481de92007-09-25 17:54:57 -07001801 u16 ra_tid;
1802
Tomas Winkler9f17b312008-07-11 11:53:35 +08001803 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
Wey-Yi Guy88804e22009-10-09 13:20:28 -07001804 (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1805 <= txq_id)) {
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001806 IWL_WARN(priv,
1807 "queue number out of range: %d, must be %d to %d\n",
Tomas Winkler9f17b312008-07-11 11:53:35 +08001808 txq_id, IWL49_FIRST_AMPDU_QUEUE,
Wey-Yi Guy88804e22009-10-09 13:20:28 -07001809 IWL49_FIRST_AMPDU_QUEUE +
1810 priv->cfg->num_of_ampdu_queues - 1);
Tomas Winkler9f17b312008-07-11 11:53:35 +08001811 return -EINVAL;
1812 }
Zhu Yib481de92007-09-25 17:54:57 -07001813
1814 ra_tid = BUILD_RAxTID(sta_id, tid);
1815
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001816 /* Modify device's station table to Tx this TID */
Tomas Winkler9f586712008-11-12 13:14:05 -08001817 iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
Zhu Yib481de92007-09-25 17:54:57 -07001818
1819 spin_lock_irqsave(&priv->lock, flags);
Zhu Yib481de92007-09-25 17:54:57 -07001820
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001821 /* Stop this Tx queue before configuring it */
Zhu Yib481de92007-09-25 17:54:57 -07001822 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1823
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001824 /* Map receiver-address / traffic-ID to this queue */
Zhu Yib481de92007-09-25 17:54:57 -07001825 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1826
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001827 /* Set this queue as a chain-building queue */
Tomas Winkler12a81f62008-04-03 16:05:20 -07001828 iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001829
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001830 /* Place first TFD at index corresponding to start sequence number.
1831 * Assumes that ssn_idx is valid (!= 0xFFF) */
Tomas Winklerfc4b6852007-10-25 17:15:24 +08001832 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1833 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
Zhu Yib481de92007-09-25 17:54:57 -07001834 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1835
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001836 /* Set up Tx window size and frame limit for this queue */
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001837 iwl_write_targ_mem(priv,
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001838 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1839 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1840 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001841
Tomas Winkler3395f6e2008-03-25 16:33:37 -07001842 iwl_write_targ_mem(priv, priv->scd_base_addr +
Emmanuel Grumbach038669e2008-04-23 17:15:04 -07001843 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1844 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1845 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
Zhu Yib481de92007-09-25 17:54:57 -07001846
Tomas Winkler12a81f62008-04-03 16:05:20 -07001847 iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
Zhu Yib481de92007-09-25 17:54:57 -07001848
Cahill, Ben M8b6eaea2007-11-29 11:09:54 +08001849 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
Zhu Yib481de92007-09-25 17:54:57 -07001850 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1851
Zhu Yib481de92007-09-25 17:54:57 -07001852 spin_unlock_irqrestore(&priv->lock, flags);
1853
1854 return 0;
1855}
1856
Tomas Winkler133636d2008-05-05 10:22:34 +08001857
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08001858static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1859{
1860 switch (cmd_id) {
1861 case REPLY_RXON:
1862 return (u16) sizeof(struct iwl4965_rxon_cmd);
1863 default:
1864 return len;
1865 }
1866}
1867
Tomas Winkler133636d2008-05-05 10:22:34 +08001868static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1869{
1870 struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1871 addsta->mode = cmd->mode;
1872 memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1873 memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1874 addsta->station_flags = cmd->station_flags;
1875 addsta->station_flags_msk = cmd->station_flags_msk;
1876 addsta->tid_disable_tx = cmd->tid_disable_tx;
1877 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1878 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1879 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
Harvey Harrisonc1b4aa32009-01-29 13:26:44 -08001880 addsta->reserved1 = cpu_to_le16(0);
1881 addsta->reserved2 = cpu_to_le32(0);
Tomas Winkler133636d2008-05-05 10:22:34 +08001882
1883 return (u16)sizeof(struct iwl4965_addsta_cmd);
1884}
Tomas Winklerf20217d2008-05-29 16:35:10 +08001885
Tomas Winklerf20217d2008-05-29 16:35:10 +08001886static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1887{
Tomas Winkler25a65722008-06-12 09:47:07 +08001888 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001889}
1890
1891/**
Tomas Winklera96a27f2008-10-23 23:48:56 -07001892 * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
Tomas Winklerf20217d2008-05-29 16:35:10 +08001893 */
1894static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1895 struct iwl_ht_agg *agg,
Tomas Winkler25a65722008-06-12 09:47:07 +08001896 struct iwl4965_tx_resp *tx_resp,
1897 int txq_id, u16 start_idx)
Tomas Winklerf20217d2008-05-29 16:35:10 +08001898{
1899 u16 status;
Tomas Winkler25a65722008-06-12 09:47:07 +08001900 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001901 struct ieee80211_tx_info *info = NULL;
1902 struct ieee80211_hdr *hdr = NULL;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001903 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
Tomas Winkler25a65722008-06-12 09:47:07 +08001904 int i, sh, idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001905 u16 seq;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001906 if (agg->wait_for_ba)
Tomas Winklere1623442009-01-27 14:27:56 -08001907 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08001908
1909 agg->frame_count = tx_resp->frame_count;
1910 agg->start_idx = start_idx;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001911 agg->rate_n_flags = rate_n_flags;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001912 agg->bitmap = 0;
1913
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001914 /* num frames attempted by Tx command */
Tomas Winklerf20217d2008-05-29 16:35:10 +08001915 if (agg->frame_count == 1) {
1916 /* Only one frame was attempted; no block-ack will arrive */
1917 status = le16_to_cpu(frame_status[0].status);
Tomas Winkler25a65722008-06-12 09:47:07 +08001918 idx = start_idx;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001919
1920 /* FIXME: code repetition */
Tomas Winklere1623442009-01-27 14:27:56 -08001921 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001922 agg->frame_count, agg->start_idx, idx);
1923
1924 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
Johannes Berge6a98542008-10-21 12:40:02 +02001925 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winklerf20217d2008-05-29 16:35:10 +08001926 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
Abhijeet Kolekarc3056062008-11-12 13:14:08 -08001927 info->flags |= iwl_is_tx_success(status) ?
Tomas Winklerf20217d2008-05-29 16:35:10 +08001928 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08001929 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001930 /* FIXME: code repetition end */
1931
Tomas Winklere1623442009-01-27 14:27:56 -08001932 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001933 status & 0xff, tx_resp->failure_frame);
Tomas Winklere1623442009-01-27 14:27:56 -08001934 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001935
1936 agg->wait_for_ba = 0;
1937 } else {
1938 /* Two or more frames were attempted; expect block-ack */
1939 u64 bitmap = 0;
1940 int start = agg->start_idx;
1941
1942 /* Construct bit-map of pending frames within Tx window */
1943 for (i = 0; i < agg->frame_count; i++) {
1944 u16 sc;
1945 status = le16_to_cpu(frame_status[i].status);
1946 seq = le16_to_cpu(frame_status[i].sequence);
1947 idx = SEQ_TO_INDEX(seq);
1948 txq_id = SEQ_TO_QUEUE(seq);
1949
1950 if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1951 AGG_TX_STATE_ABORT_MSK))
1952 continue;
1953
Tomas Winklere1623442009-01-27 14:27:56 -08001954 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001955 agg->frame_count, txq_id, idx);
1956
1957 hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
Stanislaw Gruszka6c6a22e2009-09-23 10:51:34 +02001958 if (!hdr) {
1959 IWL_ERR(priv,
1960 "BUG_ON idx doesn't point to valid skb"
1961 " idx=%d, txq_id=%d\n", idx, txq_id);
1962 return -1;
1963 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08001964
1965 sc = le16_to_cpu(hdr->seq_ctrl);
1966 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001967 IWL_ERR(priv,
1968 "BUG_ON idx doesn't match seq control"
1969 " idx=%d, seq_idx=%d, seq=%d\n",
1970 idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001971 return -1;
1972 }
1973
Tomas Winklere1623442009-01-27 14:27:56 -08001974 IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001975 i, idx, SEQ_TO_SN(sc));
1976
1977 sh = idx - start;
1978 if (sh > 64) {
1979 sh = (start - idx) + 0xff;
1980 bitmap = bitmap << sh;
1981 sh = 0;
1982 start = idx;
1983 } else if (sh < -64)
1984 sh = 0xff - (start - idx);
1985 else if (sh < 0) {
1986 sh = start - idx;
1987 start = idx;
1988 bitmap = bitmap << sh;
1989 sh = 0;
1990 }
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08001991 bitmap |= 1ULL << sh;
Tomas Winklere1623442009-01-27 14:27:56 -08001992 IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08001993 start, (unsigned long long)bitmap);
Tomas Winklerf20217d2008-05-29 16:35:10 +08001994 }
1995
1996 agg->bitmap = bitmap;
1997 agg->start_idx = start;
Tomas Winklere1623442009-01-27 14:27:56 -08001998 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
Tomas Winklerf20217d2008-05-29 16:35:10 +08001999 agg->frame_count, agg->start_idx,
2000 (unsigned long long)agg->bitmap);
2001
2002 if (bitmap)
2003 agg->wait_for_ba = 1;
2004 }
2005 return 0;
2006}
Tomas Winklerf20217d2008-05-29 16:35:10 +08002007
2008/**
2009 * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2010 */
2011static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2012 struct iwl_rx_mem_buffer *rxb)
2013{
2014 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2015 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2016 int txq_id = SEQ_TO_QUEUE(sequence);
2017 int index = SEQ_TO_INDEX(sequence);
2018 struct iwl_tx_queue *txq = &priv->txq[txq_id];
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002019 struct ieee80211_hdr *hdr;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002020 struct ieee80211_tx_info *info;
2021 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
Tomas Winkler25a65722008-06-12 09:47:07 +08002022 u32 status = le32_to_cpu(tx_resp->u.status);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002023 int tid = MAX_TID_COUNT;
2024 int sta_id;
2025 int freed;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002026 u8 *qc = NULL;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002027
2028 if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002029 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002030 "is out of range [0-%d] %d %d\n", txq_id,
2031 index, txq->q.n_bd, txq->q.write_ptr,
2032 txq->q.read_ptr);
2033 return;
2034 }
2035
2036 info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2037 memset(&info->status, 0, sizeof(info->status));
2038
Tomas Winklerf20217d2008-05-29 16:35:10 +08002039 hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002040 if (ieee80211_is_data_qos(hdr->frame_control)) {
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -07002041 qc = ieee80211_get_qos_ctl(hdr);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002042 tid = qc[0] & 0xf;
2043 }
2044
2045 sta_id = iwl_get_ra_sta_id(priv, hdr);
2046 if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08002047 IWL_ERR(priv, "Station not known\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002048 return;
2049 }
2050
2051 if (txq->sched_retry) {
2052 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2053 struct iwl_ht_agg *agg = NULL;
2054
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002055 WARN_ON(!qc);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002056
2057 agg = &priv->stations[sta_id].tid[tid].agg;
2058
Tomas Winkler25a65722008-06-12 09:47:07 +08002059 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002060
Ron Rindjunsky32354272008-07-01 10:44:51 +03002061 /* check if BAR is needed */
2062 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2063 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
Tomas Winklerf20217d2008-05-29 16:35:10 +08002064
2065 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002066 index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
Tomas Winklere1623442009-01-27 14:27:56 -08002067 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
Tomas Winklerf20217d2008-05-29 16:35:10 +08002068 "%d index %d\n", scd_ssn , index);
Tomas Winkler17b88922008-05-29 16:35:12 +08002069 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002070 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2071
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002072 if (priv->mac80211_registered &&
2073 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2074 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
Tomas Winklerf20217d2008-05-29 16:35:10 +08002075 if (agg->state == IWL_AGG_OFF)
Johannes Berge4e72fb2009-03-23 17:28:42 +01002076 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002077 else
Johannes Berge4e72fb2009-03-23 17:28:42 +01002078 iwl_wake_queue(priv, txq->swq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002079 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002080 }
2081 } else {
Johannes Berge6a98542008-10-21 12:40:02 +02002082 info->status.rates[0].count = tx_resp->failure_frame + 1;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002083 info->flags |= iwl_is_tx_success(status) ?
2084 IEEE80211_TX_STAT_ACK : 0;
Tomas Winklere7d326a2008-06-12 09:47:11 +08002085 iwl_hwrate_to_tx_control(priv,
Ron Rindjunsky4f85f5b2008-06-09 22:54:35 +03002086 le32_to_cpu(tx_resp->rate_n_flags),
2087 info);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002088
Tomas Winklere1623442009-01-27 14:27:56 -08002089 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002090 "rate_n_flags 0x%x retries %d\n",
2091 txq_id,
2092 iwl_get_tx_fail_reason(status), status,
2093 le32_to_cpu(tx_resp->rate_n_flags),
2094 tx_resp->failure_frame);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002095
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002096 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
Tomas Winklered7fafe2008-10-23 23:48:50 -07002097 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winklerf20217d2008-05-29 16:35:10 +08002098 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002099
2100 if (priv->mac80211_registered &&
2101 (iwl_queue_space(&txq->q) > txq->q.low_mark))
Johannes Berge4e72fb2009-03-23 17:28:42 +01002102 iwl_wake_queue(priv, txq_id);
Tomas Winklerf20217d2008-05-29 16:35:10 +08002103 }
Tomas Winklerf20217d2008-05-29 16:35:10 +08002104
Tomas Winklered7fafe2008-10-23 23:48:50 -07002105 if (qc && likely(sta_id != IWL_INVALID_STATION))
Tomas Winkler3fd07a12008-10-23 23:48:49 -07002106 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2107
Tomas Winklerf20217d2008-05-29 16:35:10 +08002108 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
Winkler, Tomas15b16872008-12-19 10:37:33 +08002109 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
Tomas Winklerf20217d2008-05-29 16:35:10 +08002110}
2111
Tomas Winklercaab8f12008-08-04 16:00:42 +08002112static int iwl4965_calc_rssi(struct iwl_priv *priv,
2113 struct iwl_rx_phy_res *rx_resp)
2114{
2115 /* data from PHY/DSP regarding signal strength, etc.,
2116 * contents are always there, not configurable by host. */
2117 struct iwl4965_rx_non_cfg_phy *ncphy =
2118 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2119 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2120 >> IWL49_AGC_DB_POS;
2121
2122 u32 valid_antennae =
2123 (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2124 >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2125 u8 max_rssi = 0;
2126 u32 i;
2127
2128 /* Find max rssi among 3 possible receivers.
2129 * These values are measured by the digital signal processor (DSP).
2130 * They should stay fairly constant even as the signal strength varies,
2131 * if the radio's automatic gain control (AGC) is working right.
2132 * AGC value (see below) will provide the "interesting" info. */
2133 for (i = 0; i < 3; i++)
2134 if (valid_antennae & (1 << i))
2135 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2136
Tomas Winklere1623442009-01-27 14:27:56 -08002137 IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
Tomas Winklercaab8f12008-08-04 16:00:42 +08002138 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2139 max_rssi, agc);
2140
2141 /* dBm = max_rssi dB - agc dB - constant.
2142 * Higher AGC (higher radio gain) means lower signal. */
Samuel Ortiz250bdd22008-12-19 10:37:11 +08002143 return max_rssi - agc - IWL49_RSSI_OFFSET;
Tomas Winklercaab8f12008-08-04 16:00:42 +08002144}
2145
Tomas Winklerf20217d2008-05-29 16:35:10 +08002146
Zhu Yib481de92007-09-25 17:54:57 -07002147/* Set up 4965-specific Rx frame reply handlers */
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002148static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002149{
2150 /* Legacy Rx frames */
Emmanuel Grumbach1781a072008-06-30 17:23:09 +08002151 priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
Ron Rindjunsky37a44212008-05-29 16:35:18 +08002152 /* Tx response */
Tomas Winklerf20217d2008-05-29 16:35:10 +08002153 priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
Zhu Yib481de92007-09-25 17:54:57 -07002154}
2155
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002156static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002157{
2158 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002159}
2160
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002161static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
Zhu Yib481de92007-09-25 17:54:57 -07002162{
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002163 cancel_work_sync(&priv->txpower_work);
Zhu Yib481de92007-09-25 17:54:57 -07002164}
2165
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002166#define IWL4965_UCODE_GET(item) \
2167static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2168 u32 api_ver) \
2169{ \
2170 return le32_to_cpu(ucode->u.v1.item); \
2171}
2172
2173static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2174{
2175 return UCODE_HEADER_SIZE(1);
2176}
2177static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2178 u32 api_ver)
2179{
2180 return 0;
2181}
2182static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2183 u32 api_ver)
2184{
2185 return (u8 *) ucode->u.v1.data;
2186}
2187
2188IWL4965_UCODE_GET(inst_size);
2189IWL4965_UCODE_GET(data_size);
2190IWL4965_UCODE_GET(init_size);
2191IWL4965_UCODE_GET(init_data_size);
2192IWL4965_UCODE_GET(boot_size);
2193
Tomas Winkler3c424c22008-04-15 16:01:42 -07002194static struct iwl_hcmd_ops iwl4965_hcmd = {
Tomas Winkler7e8c5192008-04-15 16:01:43 -07002195 .rxon_assoc = iwl4965_send_rxon_assoc,
Abhijeet Kolekare0158e62009-04-08 11:26:37 -07002196 .commit_rxon = iwl_commit_rxon,
Abhijeet Kolekar45823532009-04-08 11:26:44 -07002197 .set_rxon_chain = iwl_set_rxon_chain,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002198};
2199
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002200static struct iwl_ucode_ops iwl4965_ucode = {
2201 .get_header_size = iwl4965_ucode_get_header_size,
2202 .get_build = iwl4965_ucode_get_build,
2203 .get_inst_size = iwl4965_ucode_get_inst_size,
2204 .get_data_size = iwl4965_ucode_get_data_size,
2205 .get_init_size = iwl4965_ucode_get_init_size,
2206 .get_init_data_size = iwl4965_ucode_get_init_data_size,
2207 .get_boot_size = iwl4965_ucode_get_boot_size,
2208 .get_data = iwl4965_ucode_get_data,
2209};
Tomas Winkler857485c2008-03-21 13:53:44 -07002210static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
Gregory Greenmanc1adf9f2008-05-15 13:53:59 +08002211 .get_hcmd_size = iwl4965_get_hcmd_size,
Tomas Winkler133636d2008-05-05 10:22:34 +08002212 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
Emmanuel Grumbachf0832f12008-04-16 16:34:47 -07002213 .chain_noise_reset = iwl4965_chain_noise_reset,
2214 .gain_computation = iwl4965_gain_computation,
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +08002215 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
Tomas Winklercaab8f12008-08-04 16:00:42 +08002216 .calc_rssi = iwl4965_calc_rssi,
Tomas Winkler857485c2008-03-21 13:53:44 -07002217};
2218
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002219static struct iwl_lib_ops iwl4965_lib = {
Tomas Winkler5425e492008-04-15 16:01:38 -07002220 .set_hw_params = iwl4965_hw_set_hw_params,
Tomas Winklere2a722e2008-04-14 21:16:10 -07002221 .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
Tomas Winklerda1bc452008-05-29 16:35:00 +08002222 .txq_set_sched = iwl4965_txq_set_sched,
Tomas Winkler30e553e2008-05-29 16:35:16 +08002223 .txq_agg_enable = iwl4965_txq_agg_enable,
2224 .txq_agg_disable = iwl4965_txq_agg_disable,
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -08002225 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2226 .txq_free_tfd = iwl_hw_txq_free_tfd,
Samuel Ortiza8e74e22009-01-23 13:45:14 -08002227 .txq_init = iwl_hw_tx_queue_init,
Emmanuel Grumbachd4789ef2008-04-24 11:55:20 -07002228 .rx_handler_setup = iwl4965_rx_handler_setup,
Emmanuel Grumbach4e393172008-06-12 09:46:53 +08002229 .setup_deferred_work = iwl4965_setup_deferred_work,
2230 .cancel_deferred_work = iwl4965_cancel_deferred_work,
Tomas Winkler57aab752008-04-14 21:16:03 -07002231 .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2232 .alive_notify = iwl4965_alive_notify,
Emmanuel Grumbachf3ccc082008-05-05 10:22:45 +08002233 .init_alive_start = iwl4965_init_alive_start,
Tomas Winkler57aab752008-04-14 21:16:03 -07002234 .load_ucode = iwl4965_load_bsm,
Reinette Chatreb7a79402009-09-25 14:24:23 -07002235 .dump_nic_event_log = iwl_dump_nic_event_log,
2236 .dump_nic_error_log = iwl_dump_nic_error_log,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002237 .apm_ops = {
Tomas Winkler91238712008-04-23 17:14:53 -07002238 .init = iwl4965_apm_init,
Abhijeet Kolekard68b6032009-10-02 13:44:04 -07002239 .stop = iwl_apm_stop,
Tomas Winkler694cc562008-04-24 11:55:22 -07002240 .config = iwl4965_nic_config,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002241 .set_pwr_src = iwl_set_pwr_src,
Tomas Winkler6f4083a2008-04-16 16:34:49 -07002242 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002243 .eeprom_ops = {
Tomas Winkler073d3f52008-04-21 15:41:52 -07002244 .regulatory_bands = {
2245 EEPROM_REGULATORY_BAND_1_CHANNELS,
2246 EEPROM_REGULATORY_BAND_2_CHANNELS,
2247 EEPROM_REGULATORY_BAND_3_CHANNELS,
2248 EEPROM_REGULATORY_BAND_4_CHANNELS,
2249 EEPROM_REGULATORY_BAND_5_CHANNELS,
Wey-Yi Guy7aafef12009-08-07 15:41:38 -07002250 EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2251 EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
Tomas Winkler073d3f52008-04-21 15:41:52 -07002252 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002253 .verify_signature = iwlcore_eeprom_verify_signature,
2254 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2255 .release_semaphore = iwlcore_eeprom_release_semaphore,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002256 .calib_version = iwl4965_eeprom_calib_version,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002257 .query_addr = iwlcore_eeprom_query_addr,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002258 },
Tomas Winkler630fe9b2008-06-12 09:47:08 +08002259 .send_tx_power = iwl4965_send_tx_power,
Emmanuel Grumbach5b9f8cd2008-10-29 14:05:46 -07002260 .update_chain_flags = iwl_update_chain_flags,
Abhijeet Kolekar5bbe2332009-04-08 11:26:35 -07002261 .post_associate = iwl_post_associate,
Abhijeet Kolekar60690a62009-04-08 11:26:49 -07002262 .config_ap = iwl_config_ap,
Mohamed Abbasef850d72009-05-22 11:01:50 -07002263 .isr = iwl_isr_legacy,
Wey-Yi Guy62161ae2009-05-21 13:44:23 -07002264 .temp_ops = {
2265 .temperature = iwl4965_temperature_calib,
2266 .set_ct_kill = iwl4965_set_ct_threshold,
2267 },
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002268};
2269
2270static struct iwl_ops iwl4965_ops = {
Jay Sternbergcc0f5552009-07-17 09:30:16 -07002271 .ucode = &iwl4965_ucode,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002272 .lib = &iwl4965_lib,
Tomas Winkler3c424c22008-04-15 16:01:42 -07002273 .hcmd = &iwl4965_hcmd,
Tomas Winkler857485c2008-03-21 13:53:44 -07002274 .utils = &iwl4965_hcmd_utils,
Johannes Berge932a602009-10-02 13:44:03 -07002275 .led = &iwlagn_led_ops,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002276};
2277
Ron Rindjunskyfed90172008-04-15 16:01:41 -07002278struct iwl_cfg iwl4965_agn_cfg = {
Tomas Winkler82b9a122008-03-04 18:09:30 -08002279 .name = "4965AGN",
Reinette Chatrea0987a82008-12-02 12:14:06 -08002280 .fw_name_pre = IWL4965_FW_PRE,
2281 .ucode_api_max = IWL4965_UCODE_API_MAX,
2282 .ucode_api_min = IWL4965_UCODE_API_MIN,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002283 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
Tomas Winkler073d3f52008-04-21 15:41:52 -07002284 .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
Tomas Winkler0ef2ca62008-10-23 23:48:51 -07002285 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2286 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
Assaf Krauss6bc913b2008-03-11 16:17:18 -07002287 .ops = &iwl4965_ops,
Wey-Yi Guy88804e22009-10-09 13:20:28 -07002288 .num_of_queues = IWL49_NUM_QUEUES,
2289 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
Assaf Krauss1ea87392008-03-18 14:57:50 -07002290 .mod_params = &iwl4965_mod_params,
Daniel C Halperinb2617932009-08-13 13:30:59 -07002291 .use_isr_legacy = true,
2292 .ht_greenfield_support = false,
Johannes Berg96d8c6a2009-09-11 10:50:37 -07002293 .broken_powersave = true,
Wey-Yi Guyf2d0d0e2009-09-11 10:38:14 -07002294 .led_compensation = 61,
Wey-Yi Guyd8c07e72009-09-25 14:24:26 -07002295 .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
Tomas Winkler82b9a122008-03-04 18:09:30 -08002296};
2297
Tomas Winklerd16dc482008-07-11 11:53:38 +08002298/* Module firmware */
Reinette Chatrea0987a82008-12-02 12:14:06 -08002299MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
Tomas Winklerd16dc482008-07-11 11:53:38 +08002300
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002301module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002302MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002303module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
Niels de Vos61a2d072008-07-31 00:07:23 -07002304MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
Assaf Krauss1ea87392008-03-18 14:57:50 -07002305module_param_named(
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002306 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002307MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2308
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002309module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002310MODULE_PARM_DESC(queues_num, "number of hw queues.");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002311/* 11n */
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002312module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
Ron Rindjunsky49779292008-06-30 17:23:21 +08002313MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002314module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2315 int, S_IRUGO);
Assaf Krauss1ea87392008-03-18 14:57:50 -07002316MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
Ron Rindjunsky49779292008-06-30 17:23:21 +08002317
Wey-Yi Guy4e30cb62009-09-17 10:43:47 -07002318module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
Ester Kummer3a1081e2008-05-06 11:05:14 +08002319MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");