| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * linux/kernel/irq/chip.c | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | 
|  | 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | 
|  | 6 | * | 
|  | 7 | * This file contains the core interrupt handling code, for irq-chip | 
|  | 8 | * based architectures. | 
|  | 9 | * | 
|  | 10 | * Detailed information is available in Documentation/DocBook/genericirq | 
|  | 11 | */ | 
|  | 12 |  | 
|  | 13 | #include <linux/irq.h> | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 14 | #include <linux/msi.h> | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 15 | #include <linux/module.h> | 
|  | 16 | #include <linux/interrupt.h> | 
|  | 17 | #include <linux/kernel_stat.h> | 
|  | 18 |  | 
|  | 19 | #include "internals.h" | 
|  | 20 |  | 
|  | 21 | /** | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 22 | *	dynamic_irq_init - initialize a dynamically allocated irq | 
|  | 23 | *	@irq:	irq number to initialize | 
|  | 24 | */ | 
|  | 25 | void dynamic_irq_init(unsigned int irq) | 
|  | 26 | { | 
| Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 27 | struct irq_desc *desc; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 28 | unsigned long flags; | 
|  | 29 |  | 
| Yinghai Lu | 0b8f1ef | 2008-12-05 18:58:31 -0800 | [diff] [blame] | 30 | desc = irq_to_desc(irq); | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 31 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 32 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 33 | return; | 
|  | 34 | } | 
|  | 35 |  | 
|  | 36 | /* Ensure we don't have left over values from a previous use of this irq */ | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 37 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 38 | desc->status = IRQ_DISABLED; | 
|  | 39 | desc->chip = &no_irq_chip; | 
|  | 40 | desc->handle_irq = handle_bad_irq; | 
|  | 41 | desc->depth = 1; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 42 | desc->msi_desc = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 43 | desc->handler_data = NULL; | 
|  | 44 | desc->chip_data = NULL; | 
|  | 45 | desc->action = NULL; | 
|  | 46 | desc->irq_count = 0; | 
|  | 47 | desc->irqs_unhandled = 0; | 
|  | 48 | #ifdef CONFIG_SMP | 
| Mike Travis | 7f7ace0 | 2009-01-10 21:58:08 -0800 | [diff] [blame] | 49 | cpumask_setall(desc->affinity); | 
|  | 50 | #ifdef CONFIG_GENERIC_PENDING_IRQ | 
|  | 51 | cpumask_clear(desc->pending_mask); | 
|  | 52 | #endif | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 53 | #endif | 
|  | 54 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 55 | } | 
|  | 56 |  | 
|  | 57 | /** | 
|  | 58 | *	dynamic_irq_cleanup - cleanup a dynamically allocated irq | 
|  | 59 | *	@irq:	irq number to initialize | 
|  | 60 | */ | 
|  | 61 | void dynamic_irq_cleanup(unsigned int irq) | 
|  | 62 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 63 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 64 | unsigned long flags; | 
|  | 65 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 66 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 67 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 68 | return; | 
|  | 69 | } | 
|  | 70 |  | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 71 | spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 72 | if (desc->action) { | 
|  | 73 | spin_unlock_irqrestore(&desc->lock, flags); | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 74 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 75 | irq); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 76 | return; | 
|  | 77 | } | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 78 | desc->msi_desc = NULL; | 
|  | 79 | desc->handler_data = NULL; | 
|  | 80 | desc->chip_data = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 81 | desc->handle_irq = handle_bad_irq; | 
|  | 82 | desc->chip = &no_irq_chip; | 
| Dean Nelson | b6f3b78 | 2008-10-18 16:06:56 -0700 | [diff] [blame] | 83 | desc->name = NULL; | 
| Yinghai Lu | 0f3c2a8 | 2009-02-08 16:18:03 -0800 | [diff] [blame] | 84 | clear_kstat_irqs(desc); | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 85 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 86 | } | 
|  | 87 |  | 
|  | 88 |  | 
|  | 89 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 90 | *	set_irq_chip - set the irq chip for an irq | 
|  | 91 | *	@irq:	irq number | 
|  | 92 | *	@chip:	pointer to irq chip description structure | 
|  | 93 | */ | 
|  | 94 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | 
|  | 95 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 96 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 97 | unsigned long flags; | 
|  | 98 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 99 | if (!desc) { | 
| Arjan van de Ven | 261c40c | 2008-07-25 19:45:37 -0700 | [diff] [blame] | 100 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 101 | return -EINVAL; | 
|  | 102 | } | 
|  | 103 |  | 
|  | 104 | if (!chip) | 
|  | 105 | chip = &no_irq_chip; | 
|  | 106 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 107 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 108 | irq_chip_set_defaults(chip); | 
|  | 109 | desc->chip = chip; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 110 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 111 |  | 
|  | 112 | return 0; | 
|  | 113 | } | 
|  | 114 | EXPORT_SYMBOL(set_irq_chip); | 
|  | 115 |  | 
|  | 116 | /** | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 117 | *	set_irq_type - set the irq trigger type for an irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 118 | *	@irq:	irq number | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 119 | *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 120 | */ | 
|  | 121 | int set_irq_type(unsigned int irq, unsigned int type) | 
|  | 122 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 123 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 124 | unsigned long flags; | 
|  | 125 | int ret = -ENXIO; | 
|  | 126 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 127 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 128 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); | 
|  | 129 | return -ENODEV; | 
|  | 130 | } | 
|  | 131 |  | 
| David Brownell | f2b662d | 2008-12-01 14:31:38 -0800 | [diff] [blame] | 132 | type &= IRQ_TYPE_SENSE_MASK; | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 133 | if (type == IRQ_TYPE_NONE) | 
|  | 134 | return 0; | 
|  | 135 |  | 
|  | 136 | spin_lock_irqsave(&desc->lock, flags); | 
| Chris Friesen | 0b3682ba3 | 2008-10-20 12:41:58 -0600 | [diff] [blame] | 137 | ret = __irq_set_trigger(desc, irq, type); | 
| David Brownell | 0c5d1eb | 2008-10-01 14:46:18 -0700 | [diff] [blame] | 138 | spin_unlock_irqrestore(&desc->lock, flags); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 139 | return ret; | 
|  | 140 | } | 
|  | 141 | EXPORT_SYMBOL(set_irq_type); | 
|  | 142 |  | 
|  | 143 | /** | 
|  | 144 | *	set_irq_data - set irq type data for an irq | 
|  | 145 | *	@irq:	Interrupt number | 
|  | 146 | *	@data:	Pointer to interrupt specific data | 
|  | 147 | * | 
|  | 148 | *	Set the hardware irq controller data for an irq | 
|  | 149 | */ | 
|  | 150 | int set_irq_data(unsigned int irq, void *data) | 
|  | 151 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 152 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 153 | unsigned long flags; | 
|  | 154 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 155 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 156 | printk(KERN_ERR | 
|  | 157 | "Trying to install controller data for IRQ%d\n", irq); | 
|  | 158 | return -EINVAL; | 
|  | 159 | } | 
|  | 160 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 161 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 162 | desc->handler_data = data; | 
|  | 163 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 164 | return 0; | 
|  | 165 | } | 
|  | 166 | EXPORT_SYMBOL(set_irq_data); | 
|  | 167 |  | 
|  | 168 | /** | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 169 | *	set_irq_data - set irq type data for an irq | 
|  | 170 | *	@irq:	Interrupt number | 
| Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 171 | *	@entry:	Pointer to MSI descriptor data | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 172 | * | 
|  | 173 | *	Set the hardware irq controller data for an irq | 
|  | 174 | */ | 
|  | 175 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | 
|  | 176 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 177 | struct irq_desc *desc = irq_to_desc(irq); | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 178 | unsigned long flags; | 
|  | 179 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 180 | if (!desc) { | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 181 | printk(KERN_ERR | 
|  | 182 | "Trying to install msi data for IRQ%d\n", irq); | 
|  | 183 | return -EINVAL; | 
|  | 184 | } | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 185 |  | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 186 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 187 | desc->msi_desc = entry; | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 188 | if (entry) | 
|  | 189 | entry->irq = irq; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 190 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 191 | return 0; | 
|  | 192 | } | 
|  | 193 |  | 
|  | 194 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 195 | *	set_irq_chip_data - set irq chip data for an irq | 
|  | 196 | *	@irq:	Interrupt number | 
|  | 197 | *	@data:	Pointer to chip specific data | 
|  | 198 | * | 
|  | 199 | *	Set the hardware irq chip data for an irq | 
|  | 200 | */ | 
|  | 201 | int set_irq_chip_data(unsigned int irq, void *data) | 
|  | 202 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 203 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 204 | unsigned long flags; | 
|  | 205 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 206 | if (!desc) { | 
|  | 207 | printk(KERN_ERR | 
|  | 208 | "Trying to install chip data for IRQ%d\n", irq); | 
|  | 209 | return -EINVAL; | 
|  | 210 | } | 
|  | 211 |  | 
|  | 212 | if (!desc->chip) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 213 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); | 
|  | 214 | return -EINVAL; | 
|  | 215 | } | 
|  | 216 |  | 
|  | 217 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 218 | desc->chip_data = data; | 
|  | 219 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 220 |  | 
|  | 221 | return 0; | 
|  | 222 | } | 
|  | 223 | EXPORT_SYMBOL(set_irq_chip_data); | 
|  | 224 |  | 
|  | 225 | /* | 
|  | 226 | * default enable function | 
|  | 227 | */ | 
|  | 228 | static void default_enable(unsigned int irq) | 
|  | 229 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 230 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 231 |  | 
|  | 232 | desc->chip->unmask(irq); | 
|  | 233 | desc->status &= ~IRQ_MASKED; | 
|  | 234 | } | 
|  | 235 |  | 
|  | 236 | /* | 
|  | 237 | * default disable function | 
|  | 238 | */ | 
|  | 239 | static void default_disable(unsigned int irq) | 
|  | 240 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 241 | } | 
|  | 242 |  | 
|  | 243 | /* | 
|  | 244 | * default startup function | 
|  | 245 | */ | 
|  | 246 | static unsigned int default_startup(unsigned int irq) | 
|  | 247 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 248 | struct irq_desc *desc = irq_to_desc(irq); | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 249 |  | 
| Yinghai Lu | 08678b0 | 2008-08-19 20:50:05 -0700 | [diff] [blame] | 250 | desc->chip->enable(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 251 | return 0; | 
|  | 252 | } | 
|  | 253 |  | 
|  | 254 | /* | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 255 | * default shutdown function | 
|  | 256 | */ | 
|  | 257 | static void default_shutdown(unsigned int irq) | 
|  | 258 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 259 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 260 |  | 
|  | 261 | desc->chip->mask(irq); | 
|  | 262 | desc->status |= IRQ_MASKED; | 
|  | 263 | } | 
|  | 264 |  | 
|  | 265 | /* | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 266 | * Fixup enable/disable function pointers | 
|  | 267 | */ | 
|  | 268 | void irq_chip_set_defaults(struct irq_chip *chip) | 
|  | 269 | { | 
|  | 270 | if (!chip->enable) | 
|  | 271 | chip->enable = default_enable; | 
|  | 272 | if (!chip->disable) | 
|  | 273 | chip->disable = default_disable; | 
|  | 274 | if (!chip->startup) | 
|  | 275 | chip->startup = default_startup; | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 276 | /* | 
|  | 277 | * We use chip->disable, when the user provided its own. When | 
|  | 278 | * we have default_disable set for chip->disable, then we need | 
|  | 279 | * to use default_shutdown, otherwise the irq line is not | 
|  | 280 | * disabled on free_irq(): | 
|  | 281 | */ | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 282 | if (!chip->shutdown) | 
| Thomas Gleixner | 89d694b | 2008-02-18 18:25:17 +0100 | [diff] [blame] | 283 | chip->shutdown = chip->disable != default_disable ? | 
|  | 284 | chip->disable : default_shutdown; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 285 | if (!chip->name) | 
|  | 286 | chip->name = chip->typename; | 
| Zhang, Yanmin | b86432b | 2006-11-16 01:19:10 -0800 | [diff] [blame] | 287 | if (!chip->end) | 
|  | 288 | chip->end = dummy_irq_chip.end; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 289 | } | 
|  | 290 |  | 
|  | 291 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | 
|  | 292 | { | 
|  | 293 | if (desc->chip->mask_ack) | 
|  | 294 | desc->chip->mask_ack(irq); | 
|  | 295 | else { | 
|  | 296 | desc->chip->mask(irq); | 
| Wang Chen | efdc64f | 2008-12-29 13:35:11 +0800 | [diff] [blame] | 297 | if (desc->chip->ack) | 
|  | 298 | desc->chip->ack(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 299 | } | 
|  | 300 | } | 
|  | 301 |  | 
|  | 302 | /** | 
|  | 303 | *	handle_simple_irq - Simple and software-decoded IRQs. | 
|  | 304 | *	@irq:	the interrupt number | 
|  | 305 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 306 | * | 
|  | 307 | *	Simple interrupts are either sent from a demultiplexing interrupt | 
|  | 308 | *	handler or come from hardware, where no interrupt hardware control | 
|  | 309 | *	is necessary. | 
|  | 310 | * | 
|  | 311 | *	Note: The caller is expected to handle the ack, clear, mask and | 
|  | 312 | *	unmask issues if necessary. | 
|  | 313 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 314 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 315 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 316 | { | 
|  | 317 | struct irqaction *action; | 
|  | 318 | irqreturn_t action_ret; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 319 |  | 
|  | 320 | spin_lock(&desc->lock); | 
|  | 321 |  | 
|  | 322 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 323 | goto out_unlock; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 324 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 325 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 326 |  | 
|  | 327 | action = desc->action; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 328 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 329 | goto out_unlock; | 
|  | 330 |  | 
|  | 331 | desc->status |= IRQ_INPROGRESS; | 
|  | 332 | spin_unlock(&desc->lock); | 
|  | 333 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 334 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 335 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 336 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 337 |  | 
|  | 338 | spin_lock(&desc->lock); | 
|  | 339 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 340 | out_unlock: | 
|  | 341 | spin_unlock(&desc->lock); | 
|  | 342 | } | 
|  | 343 |  | 
|  | 344 | /** | 
|  | 345 | *	handle_level_irq - Level type irq handler | 
|  | 346 | *	@irq:	the interrupt number | 
|  | 347 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 348 | * | 
|  | 349 | *	Level type interrupts are active as long as the hardware line has | 
|  | 350 | *	the active level. This may require to mask the interrupt and unmask | 
|  | 351 | *	it after the associated handler has acknowledged the device, so the | 
|  | 352 | *	interrupt line is back to inactive. | 
|  | 353 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 354 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 355 | handle_level_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 356 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 357 | struct irqaction *action; | 
|  | 358 | irqreturn_t action_ret; | 
|  | 359 |  | 
|  | 360 | spin_lock(&desc->lock); | 
|  | 361 | mask_ack_irq(desc, irq); | 
|  | 362 |  | 
|  | 363 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 364 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 365 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 366 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 367 |  | 
|  | 368 | /* | 
|  | 369 | * If its disabled or no action available | 
|  | 370 | * keep it masked and get out of here | 
|  | 371 | */ | 
|  | 372 | action = desc->action; | 
| Thomas Gleixner | 4966342 | 2007-08-12 15:46:34 +0000 | [diff] [blame] | 373 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 374 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 375 |  | 
|  | 376 | desc->status |= IRQ_INPROGRESS; | 
|  | 377 | spin_unlock(&desc->lock); | 
|  | 378 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 379 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 380 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 381 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 382 |  | 
|  | 383 | spin_lock(&desc->lock); | 
|  | 384 | desc->status &= ~IRQ_INPROGRESS; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 385 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | 
|  | 386 | desc->chip->unmask(irq); | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 387 | out_unlock: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 388 | spin_unlock(&desc->lock); | 
|  | 389 | } | 
| Ingo Molnar | 14819ea | 2009-01-14 12:34:21 +0100 | [diff] [blame] | 390 | EXPORT_SYMBOL_GPL(handle_level_irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 391 |  | 
|  | 392 | /** | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 393 | *	handle_fasteoi_irq - irq handler for transparent controllers | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 394 | *	@irq:	the interrupt number | 
|  | 395 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 396 | * | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 397 | *	Only a single callback will be issued to the chip: an ->eoi() | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 398 | *	call when the interrupt has been serviced. This enables support | 
|  | 399 | *	for modern forms of interrupt handlers, which handle the flow | 
|  | 400 | *	details in hardware, transparently. | 
|  | 401 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 402 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 403 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 404 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 405 | struct irqaction *action; | 
|  | 406 | irqreturn_t action_ret; | 
|  | 407 |  | 
|  | 408 | spin_lock(&desc->lock); | 
|  | 409 |  | 
|  | 410 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 411 | goto out; | 
|  | 412 |  | 
|  | 413 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 414 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 415 |  | 
|  | 416 | /* | 
|  | 417 | * If its disabled or no action available | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 418 | * then mask it and get out of here: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 419 | */ | 
|  | 420 | action = desc->action; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 421 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
|  | 422 | desc->status |= IRQ_PENDING; | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 423 | if (desc->chip->mask) | 
|  | 424 | desc->chip->mask(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 425 | goto out; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 426 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 427 |  | 
|  | 428 | desc->status |= IRQ_INPROGRESS; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 429 | desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 430 | spin_unlock(&desc->lock); | 
|  | 431 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 432 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 433 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 434 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 435 |  | 
|  | 436 | spin_lock(&desc->lock); | 
|  | 437 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 438 | out: | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 439 | desc->chip->eoi(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 440 |  | 
|  | 441 | spin_unlock(&desc->lock); | 
|  | 442 | } | 
|  | 443 |  | 
|  | 444 | /** | 
|  | 445 | *	handle_edge_irq - edge type IRQ handler | 
|  | 446 | *	@irq:	the interrupt number | 
|  | 447 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 448 | * | 
|  | 449 | *	Interrupt occures on the falling and/or rising edge of a hardware | 
|  | 450 | *	signal. The occurence is latched into the irq controller hardware | 
|  | 451 | *	and must be acked in order to be reenabled. After the ack another | 
|  | 452 | *	interrupt can happen on the same source even before the first one | 
|  | 453 | *	is handled by the assosiacted event handler. If this happens it | 
|  | 454 | *	might be necessary to disable (mask) the interrupt depending on the | 
|  | 455 | *	controller hardware. This requires to reenable the interrupt inside | 
|  | 456 | *	of the loop which handles the interrupts which have arrived while | 
|  | 457 | *	the handler was running. If all pending interrupts are handled, the | 
|  | 458 | *	loop is left. | 
|  | 459 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 460 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 461 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 462 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 463 | spin_lock(&desc->lock); | 
|  | 464 |  | 
|  | 465 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
|  | 466 |  | 
|  | 467 | /* | 
|  | 468 | * If we're currently running this IRQ, or its disabled, | 
|  | 469 | * we shouldn't process the IRQ. Mark it pending, handle | 
|  | 470 | * the necessary masking and go out | 
|  | 471 | */ | 
|  | 472 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | 
|  | 473 | !desc->action)) { | 
|  | 474 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | 
|  | 475 | mask_ack_irq(desc, irq); | 
|  | 476 | goto out_unlock; | 
|  | 477 | } | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 478 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 479 |  | 
|  | 480 | /* Start handling the irq */ | 
| Wang Chen | efdc64f | 2008-12-29 13:35:11 +0800 | [diff] [blame] | 481 | if (desc->chip->ack) | 
|  | 482 | desc->chip->ack(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 483 |  | 
|  | 484 | /* Mark the IRQ currently in progress.*/ | 
|  | 485 | desc->status |= IRQ_INPROGRESS; | 
|  | 486 |  | 
|  | 487 | do { | 
|  | 488 | struct irqaction *action = desc->action; | 
|  | 489 | irqreturn_t action_ret; | 
|  | 490 |  | 
|  | 491 | if (unlikely(!action)) { | 
|  | 492 | desc->chip->mask(irq); | 
|  | 493 | goto out_unlock; | 
|  | 494 | } | 
|  | 495 |  | 
|  | 496 | /* | 
|  | 497 | * When another irq arrived while we were handling | 
|  | 498 | * one, we could have masked the irq. | 
|  | 499 | * Renable it, if it was not disabled in meantime. | 
|  | 500 | */ | 
|  | 501 | if (unlikely((desc->status & | 
|  | 502 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | 
|  | 503 | (IRQ_PENDING | IRQ_MASKED))) { | 
|  | 504 | desc->chip->unmask(irq); | 
|  | 505 | desc->status &= ~IRQ_MASKED; | 
|  | 506 | } | 
|  | 507 |  | 
|  | 508 | desc->status &= ~IRQ_PENDING; | 
|  | 509 | spin_unlock(&desc->lock); | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 510 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 511 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 512 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 513 | spin_lock(&desc->lock); | 
|  | 514 |  | 
|  | 515 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | 
|  | 516 |  | 
|  | 517 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 518 | out_unlock: | 
|  | 519 | spin_unlock(&desc->lock); | 
|  | 520 | } | 
|  | 521 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 522 | /** | 
|  | 523 | *	handle_percpu_IRQ - Per CPU local irq handler | 
|  | 524 | *	@irq:	the interrupt number | 
|  | 525 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 526 | * | 
|  | 527 | *	Per CPU interrupts on SMP machines without locking requirements | 
|  | 528 | */ | 
| Harvey Harrison | 7ad5b3a | 2008-02-08 04:19:53 -0800 | [diff] [blame] | 529 | void | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 530 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 531 | { | 
|  | 532 | irqreturn_t action_ret; | 
|  | 533 |  | 
| Thomas Gleixner | d6c88a5 | 2008-10-15 15:27:23 +0200 | [diff] [blame] | 534 | kstat_incr_irqs_this_cpu(irq, desc); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 535 |  | 
|  | 536 | if (desc->chip->ack) | 
|  | 537 | desc->chip->ack(irq); | 
|  | 538 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 539 | action_ret = handle_IRQ_event(irq, desc->action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 540 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 541 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 542 |  | 
| Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 543 | if (desc->chip->eoi) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 544 | desc->chip->eoi(irq); | 
|  | 545 | } | 
|  | 546 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 547 | void | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 548 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, | 
|  | 549 | const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 550 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 551 | struct irq_desc *desc = irq_to_desc(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 552 | unsigned long flags; | 
|  | 553 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 554 | if (!desc) { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 555 | printk(KERN_ERR | 
|  | 556 | "Trying to install type control for IRQ%d\n", irq); | 
|  | 557 | return; | 
|  | 558 | } | 
|  | 559 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 560 | if (!handle) | 
|  | 561 | handle = handle_bad_irq; | 
| Thomas Gleixner | 9d7ac8b | 2006-12-22 01:08:14 -0800 | [diff] [blame] | 562 | else if (desc->chip == &no_irq_chip) { | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 563 | printk(KERN_WARNING "Trying to install %sinterrupt handler " | 
| Geert Uytterhoeven | b039db8 | 2006-12-20 15:59:48 +0100 | [diff] [blame] | 564 | "for IRQ%d\n", is_chained ? "chained " : "", irq); | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 565 | /* | 
|  | 566 | * Some ARM implementations install a handler for really dumb | 
|  | 567 | * interrupt hardware without setting an irq_chip. This worked | 
|  | 568 | * with the ARM no_irq_chip but the check in setup_irq would | 
|  | 569 | * prevent us to setup the interrupt at all. Switch it to | 
|  | 570 | * dummy_irq_chip for easy transition. | 
|  | 571 | */ | 
|  | 572 | desc->chip = &dummy_irq_chip; | 
|  | 573 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 574 |  | 
|  | 575 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 576 |  | 
|  | 577 | /* Uninstall? */ | 
|  | 578 | if (handle == handle_bad_irq) { | 
| Yinghai Lu | fcef591 | 2009-04-27 17:58:23 -0700 | [diff] [blame] | 579 | if (desc->chip != &no_irq_chip) | 
| Jan Beulich | 5575ddf | 2007-02-16 01:28:26 -0800 | [diff] [blame] | 580 | mask_ack_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 581 | desc->status |= IRQ_DISABLED; | 
|  | 582 | desc->depth = 1; | 
|  | 583 | } | 
|  | 584 | desc->handle_irq = handle; | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 585 | desc->name = name; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 586 |  | 
|  | 587 | if (handle != handle_bad_irq && is_chained) { | 
|  | 588 | desc->status &= ~IRQ_DISABLED; | 
|  | 589 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | 
|  | 590 | desc->depth = 0; | 
| Pawel MOLL | 7e6e178 | 2008-09-01 10:12:11 +0100 | [diff] [blame] | 591 | desc->chip->startup(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 592 | } | 
|  | 593 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 594 | } | 
| Ingo Molnar | 14819ea | 2009-01-14 12:34:21 +0100 | [diff] [blame] | 595 | EXPORT_SYMBOL_GPL(__set_irq_handler); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 596 |  | 
|  | 597 | void | 
|  | 598 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | 
| David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 599 | irq_flow_handler_t handle) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 600 | { | 
|  | 601 | set_irq_chip(irq, chip); | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 602 | __set_irq_handler(irq, handle, 0, NULL); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 603 | } | 
|  | 604 |  | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 605 | void | 
|  | 606 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | 
|  | 607 | irq_flow_handler_t handle, const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 608 | { | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 609 | set_irq_chip(irq, chip); | 
|  | 610 | __set_irq_handler(irq, handle, 0, name); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 611 | } | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 612 |  | 
|  | 613 | void __init set_irq_noprobe(unsigned int irq) | 
|  | 614 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 615 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 616 | unsigned long flags; | 
|  | 617 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 618 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 619 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 620 | return; | 
|  | 621 | } | 
|  | 622 |  | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 623 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 624 | desc->status |= IRQ_NOPROBE; | 
|  | 625 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 626 | } | 
|  | 627 |  | 
|  | 628 | void __init set_irq_probe(unsigned int irq) | 
|  | 629 | { | 
| Thomas Gleixner | d3c6004 | 2008-10-16 09:55:00 +0200 | [diff] [blame] | 630 | struct irq_desc *desc = irq_to_desc(irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 631 | unsigned long flags; | 
|  | 632 |  | 
| Yinghai Lu | 7d94f7c | 2008-08-19 20:50:14 -0700 | [diff] [blame] | 633 | if (!desc) { | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 634 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 635 | return; | 
|  | 636 | } | 
|  | 637 |  | 
| Ralf Baechle | 46f4f8f | 2008-02-08 04:22:01 -0800 | [diff] [blame] | 638 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 639 | desc->status &= ~IRQ_NOPROBE; | 
|  | 640 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 641 | } |