blob: d753a40973ba40a7a1abf68e08d551809efabfbb [file] [log] [blame]
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 gpio functions
3 *
4 * Derived from ivtv-gpio.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
21 * 02111-1307 USA
22 */
23
24#include "cx18-driver.h"
25#include "cx18-cards.h"
26#include "cx18-gpio.h"
27#include "tuner-xc2028.h"
28
29/********************* GPIO stuffs *********************/
30
31/* GPIO registers */
32#define CX18_REG_GPIO_IN 0xc72010
33#define CX18_REG_GPIO_OUT1 0xc78100
34#define CX18_REG_GPIO_DIR1 0xc78108
35#define CX18_REG_GPIO_OUT2 0xc78104
36#define CX18_REG_GPIO_DIR2 0xc7810c
37
38/*
39 * HVR-1600 GPIO pins, courtesy of Hauppauge:
40 *
41 * gpio0: zilog ir process reset pin
42 * gpio1: zilog programming pin (you should never use this)
43 * gpio12: cx24227 reset pin
44 * gpio13: cs5345 reset pin
45*/
46
Hans Verkuil9dcbf352008-05-12 13:57:18 -030047static void gpio_write(struct cx18 *cx)
48{
Hans Verkuilba60bc62008-05-25 14:34:36 -030049 u32 dir = cx->gpio_dir;
50 u32 val = cx->gpio_val;
51
52 write_reg((dir & 0xffff) << 16, CX18_REG_GPIO_DIR1);
53 write_reg(((dir & 0xffff) << 16) | (val & 0xffff),
Hans Verkuil9dcbf352008-05-12 13:57:18 -030054 CX18_REG_GPIO_OUT1);
Hans Verkuilba60bc62008-05-25 14:34:36 -030055 write_reg(dir & 0xffff0000, CX18_REG_GPIO_DIR2);
Andy Walls1f09e8a2008-06-22 01:27:00 -030056 write_reg_sync((dir & 0xffff0000) | ((val & 0xffff0000) >> 16),
Hans Verkuil9dcbf352008-05-12 13:57:18 -030057 CX18_REG_GPIO_OUT2);
58}
59
Andy Walls1f09e8a2008-06-22 01:27:00 -030060void cx18_reset_i2c_slaves_gpio(struct cx18 *cx)
61{
62 const struct cx18_gpio_i2c_slave_reset *p;
63
64 p = &cx->card->gpio_i2c_slave_reset;
65
66 if ((p->active_lo_mask | p->active_hi_mask) == 0)
67 return;
68
69 /* Assuming that the masks are a subset of the bits in gpio_dir */
70
71 /* Assert */
Andy Walls8abdd002008-07-13 19:05:25 -030072 mutex_lock(&cx->gpio_lock);
Andy Walls1f09e8a2008-06-22 01:27:00 -030073 cx->gpio_val =
74 (cx->gpio_val | p->active_hi_mask) & ~(p->active_lo_mask);
75 gpio_write(cx);
76 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted));
77
78 /* Deassert */
79 cx->gpio_val =
80 (cx->gpio_val | p->active_lo_mask) & ~(p->active_hi_mask);
81 gpio_write(cx);
82 schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery));
Andy Walls8abdd002008-07-13 19:05:25 -030083 mutex_unlock(&cx->gpio_lock);
Andy Walls1f09e8a2008-06-22 01:27:00 -030084}
85
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030086void cx18_gpio_init(struct cx18 *cx)
87{
Andy Walls8abdd002008-07-13 19:05:25 -030088 mutex_lock(&cx->gpio_lock);
Hans Verkuilba60bc62008-05-25 14:34:36 -030089 cx->gpio_dir = cx->card->gpio_init.direction;
90 cx->gpio_val = cx->card->gpio_init.initial_value;
Hans Verkuil9dcbf352008-05-12 13:57:18 -030091
Hans Verkuil4ecc2472008-05-30 11:03:12 -030092 if (cx->card->tuners[0].tuner == TUNER_XC2028) {
Hans Verkuilba60bc62008-05-25 14:34:36 -030093 cx->gpio_dir |= 1 << cx->card->xceive_pin;
94 cx->gpio_val |= 1 << cx->card->xceive_pin;
Hans Verkuil7f3917f2008-05-19 22:13:02 -030095 }
96
Andy Walls8abdd002008-07-13 19:05:25 -030097 if (cx->gpio_dir == 0) {
98 mutex_unlock(&cx->gpio_lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030099 return;
Andy Walls8abdd002008-07-13 19:05:25 -0300100 }
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300101
Hans Verkuil9dcbf352008-05-12 13:57:18 -0300102 CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n",
103 read_reg(CX18_REG_GPIO_DIR1), read_reg(CX18_REG_GPIO_DIR2),
104 read_reg(CX18_REG_GPIO_OUT1), read_reg(CX18_REG_GPIO_OUT2));
105
106 gpio_write(cx);
Andy Walls8abdd002008-07-13 19:05:25 -0300107 mutex_unlock(&cx->gpio_lock);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300108}
109
110/* Xceive tuner reset function */
111int cx18_reset_tuner_gpio(void *dev, int cmd, int value)
112{
113 struct i2c_algo_bit_data *algo = dev;
Hans Verkuil9dcbf352008-05-12 13:57:18 -0300114 struct cx18_i2c_algo_callback_data *cb_data = algo->data;
115 struct cx18 *cx = cb_data->cx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300116
117 if (cmd != XC2028_TUNER_RESET)
118 return 0;
119 CX18_DEBUG_INFO("Resetting tuner\n");
Hans Verkuil9dcbf352008-05-12 13:57:18 -0300120
Andy Walls8abdd002008-07-13 19:05:25 -0300121 mutex_lock(&cx->gpio_lock);
Hans Verkuilba60bc62008-05-25 14:34:36 -0300122 cx->gpio_val &= ~(1 << cx->card->xceive_pin);
Hans Verkuil9dcbf352008-05-12 13:57:18 -0300123 gpio_write(cx);
Andy Walls8abdd002008-07-13 19:05:25 -0300124 mutex_unlock(&cx->gpio_lock);
Hans Verkuil9dcbf352008-05-12 13:57:18 -0300125 schedule_timeout_interruptible(msecs_to_jiffies(1));
126
Andy Walls8abdd002008-07-13 19:05:25 -0300127 mutex_lock(&cx->gpio_lock);
Hans Verkuilba60bc62008-05-25 14:34:36 -0300128 cx->gpio_val |= 1 << cx->card->xceive_pin;
Hans Verkuil9dcbf352008-05-12 13:57:18 -0300129 gpio_write(cx);
Andy Walls8abdd002008-07-13 19:05:25 -0300130 mutex_unlock(&cx->gpio_lock);
Hans Verkuil9dcbf352008-05-12 13:57:18 -0300131 schedule_timeout_interruptible(msecs_to_jiffies(1));
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300132 return 0;
133}
Sri Deevi03c28082008-06-21 11:06:44 -0300134
135int cx18_gpio(struct cx18 *cx, unsigned int command, void *arg)
136{
137 struct v4l2_routing *route = arg;
138 u32 mask, data;
139
140 switch (command) {
141 case VIDIOC_INT_S_AUDIO_ROUTING:
142 if (route->input > 2)
143 return -EINVAL;
144 mask = cx->card->gpio_audio_input.mask;
145 switch (route->input) {
146 case 0:
147 data = cx->card->gpio_audio_input.tuner;
148 break;
149 case 1:
150 data = cx->card->gpio_audio_input.linein;
151 break;
152 case 2:
153 default:
154 data = cx->card->gpio_audio_input.radio;
155 break;
156 }
157 break;
158
159 default:
160 return -EINVAL;
161 }
162 if (mask) {
Andy Walls8abdd002008-07-13 19:05:25 -0300163 mutex_lock(&cx->gpio_lock);
Sri Deevi03c28082008-06-21 11:06:44 -0300164 cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask);
165 gpio_write(cx);
Andy Walls8abdd002008-07-13 19:05:25 -0300166 mutex_unlock(&cx->gpio_lock);
Sri Deevi03c28082008-06-21 11:06:44 -0300167 }
168 return 0;
169}