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Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010029#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090030#include <linux/slab.h>
Steve Sakomancc175572008-10-30 21:35:26 -070031#include <sound/core.h>
32#include <sound/pcm.h>
33#include <sound/pcm_params.h>
34#include <sound/soc.h>
35#include <sound/soc-dapm.h>
36#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020037#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038
39#include "twl4030.h"
40
41/*
42 * twl4030 register cache & default register settings
43 */
44static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
45 0x00, /* this register not used */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030046 0x00, /* REG_CODEC_MODE (0x1) */
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +030047 0x00, /* REG_OPTION (0x2) */
Steve Sakomancc175572008-10-30 21:35:26 -070048 0x00, /* REG_UNKNOWN (0x3) */
49 0x00, /* REG_MICBIAS_CTL (0x4) */
Peter Ujfalusi979bb1f2010-05-26 11:38:16 +030050 0x00, /* REG_ANAMICL (0x5) */
Grazvydas Ignotas5920b452008-12-02 20:48:58 +020051 0x00, /* REG_ANAMICR (0x6) */
52 0x00, /* REG_AVADC_CTL (0x7) */
Steve Sakomancc175572008-10-30 21:35:26 -070053 0x00, /* REG_ADCMICSEL (0x8) */
54 0x00, /* REG_DIGMIXING (0x9) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030055 0x0f, /* REG_ATXL1PGA (0xA) */
56 0x0f, /* REG_ATXR1PGA (0xB) */
57 0x0f, /* REG_AVTXL2PGA (0xC) */
58 0x0f, /* REG_AVTXR2PGA (0xD) */
Peter Ujfalusic42a59e2010-02-09 15:24:04 +020059 0x00, /* REG_AUDIO_IF (0xE) */
Steve Sakomancc175572008-10-30 21:35:26 -070060 0x00, /* REG_VOICE_IF (0xF) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030061 0x3f, /* REG_ARXR1PGA (0x10) */
62 0x3f, /* REG_ARXL1PGA (0x11) */
63 0x3f, /* REG_ARXR2PGA (0x12) */
64 0x3f, /* REG_ARXL2PGA (0x13) */
65 0x25, /* REG_VRXPGA (0x14) */
Steve Sakomancc175572008-10-30 21:35:26 -070066 0x00, /* REG_VSTPGA (0x15) */
67 0x00, /* REG_VRX2ARXPGA (0x16) */
Peter Ujfalusic8124592010-01-28 15:57:04 +020068 0x00, /* REG_AVDAC_CTL (0x17) */
Steve Sakomancc175572008-10-30 21:35:26 -070069 0x00, /* REG_ARX2VTXPGA (0x18) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030070 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
71 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
72 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
73 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
Steve Sakomancc175572008-10-30 21:35:26 -070074 0x00, /* REG_ATX2ARXPGA (0x1D) */
75 0x00, /* REG_BT_IF (0x1E) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030076 0x55, /* REG_BTPGA (0x1F) */
Steve Sakomancc175572008-10-30 21:35:26 -070077 0x00, /* REG_BTSTPGA (0x20) */
78 0x00, /* REG_EAR_CTL (0x21) */
Peter Ujfalusie47c7962010-02-17 09:49:54 +020079 0x00, /* REG_HS_SEL (0x22) */
80 0x00, /* REG_HS_GAIN_SET (0x23) */
Steve Sakomancc175572008-10-30 21:35:26 -070081 0x00, /* REG_HS_POPN_SET (0x24) */
82 0x00, /* REG_PREDL_CTL (0x25) */
83 0x00, /* REG_PREDR_CTL (0x26) */
84 0x00, /* REG_PRECKL_CTL (0x27) */
85 0x00, /* REG_PRECKR_CTL (0x28) */
86 0x00, /* REG_HFL_CTL (0x29) */
87 0x00, /* REG_HFR_CTL (0x2A) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030088 0x05, /* REG_ALC_CTL (0x2B) */
Steve Sakomancc175572008-10-30 21:35:26 -070089 0x00, /* REG_ALC_SET1 (0x2C) */
90 0x00, /* REG_ALC_SET2 (0x2D) */
91 0x00, /* REG_BOOST_CTL (0x2E) */
Peter Ujfalusif8d05bd2008-11-24 08:25:45 +020092 0x00, /* REG_SOFTVOL_CTL (0x2F) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030093 0x13, /* REG_DTMF_FREQSEL (0x30) */
Steve Sakomancc175572008-10-30 21:35:26 -070094 0x00, /* REG_DTMF_TONEXT1H (0x31) */
95 0x00, /* REG_DTMF_TONEXT1L (0x32) */
96 0x00, /* REG_DTMF_TONEXT2H (0x33) */
97 0x00, /* REG_DTMF_TONEXT2L (0x34) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +030098 0x79, /* REG_DTMF_TONOFF (0x35) */
99 0x11, /* REG_DTMF_WANONOFF (0x36) */
Steve Sakomancc175572008-10-30 21:35:26 -0700100 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
102 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
Peter Ujfalusic8124592010-01-28 15:57:04 +0200103 0x06, /* REG_APLL_CTL (0x3A) */
Steve Sakomancc175572008-10-30 21:35:26 -0700104 0x00, /* REG_DTMF_CTL (0x3B) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +0300105 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
106 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
Steve Sakomancc175572008-10-30 21:35:26 -0700107 0x00, /* REG_MISC_SET_1 (0x3E) */
108 0x00, /* REG_PCMBTMUX (0x3F) */
109 0x00, /* not used (0x40) */
110 0x00, /* not used (0x41) */
111 0x00, /* not used (0x42) */
112 0x00, /* REG_RX_PATH_SEL (0x43) */
Peter Ujfalusi33f92ed2010-05-26 11:38:14 +0300113 0x32, /* REG_VDL_APGA_CTL (0x44) */
Steve Sakomancc175572008-10-30 21:35:26 -0700114 0x00, /* REG_VIBRA_CTL (0x45) */
115 0x00, /* REG_VIBRA_SET (0x46) */
116 0x00, /* REG_VIBRA_PWM_SET (0x47) */
117 0x00, /* REG_ANAMIC_GAIN (0x48) */
118 0x00, /* REG_MISC_SET_2 (0x49) */
Peter Ujfalusif3b5d302009-05-25 11:12:12 +0300119 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
Steve Sakomancc175572008-10-30 21:35:26 -0700120};
121
Peter Ujfalusi73939582009-01-29 14:57:50 +0200122/* codec private data */
123struct twl4030_priv {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300124 struct snd_soc_codec codec;
125
Peter Ujfalusi73939582009-01-29 14:57:50 +0200126 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300127
128 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200129 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +0200130
131 struct snd_pcm_substream *master_substream;
132 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +0300133
134 unsigned int configured;
135 unsigned int rate;
136 unsigned int sample_bits;
137 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300138
139 unsigned int sysclk;
140
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200141 /* Output (with associated amp) states */
142 u8 hsl_enabled, hsr_enabled;
143 u8 earpiece_enabled;
144 u8 predrivel_enabled, predriver_enabled;
145 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200146};
147
Steve Sakomancc175572008-10-30 21:35:26 -0700148/*
149 * read twl4030 register cache
150 */
151static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
152 unsigned int reg)
153{
Takashi Iwaid08664f2009-06-04 09:58:18 +0200154 u8 *cache = codec->reg_cache;
Steve Sakomancc175572008-10-30 21:35:26 -0700155
Ian Molton91432e92009-01-17 17:44:23 +0000156 if (reg >= TWL4030_CACHEREGNUM)
157 return -EIO;
158
Steve Sakomancc175572008-10-30 21:35:26 -0700159 return cache[reg];
160}
161
162/*
163 * write twl4030 register cache
164 */
165static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
166 u8 reg, u8 value)
167{
168 u8 *cache = codec->reg_cache;
169
170 if (reg >= TWL4030_CACHEREGNUM)
171 return;
172 cache[reg] = value;
173}
174
175/*
176 * write to the twl4030 register space
177 */
178static int twl4030_write(struct snd_soc_codec *codec,
179 unsigned int reg, unsigned int value)
180{
Mark Brownb2c812e2010-04-14 15:35:19 +0900181 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200182 int write_to_reg = 0;
183
Steve Sakomancc175572008-10-30 21:35:26 -0700184 twl4030_write_reg_cache(codec, reg, value);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200185 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
186 /* Decide if the given register can be written */
187 switch (reg) {
188 case TWL4030_REG_EAR_CTL:
189 if (twl4030->earpiece_enabled)
190 write_to_reg = 1;
191 break;
192 case TWL4030_REG_PREDL_CTL:
193 if (twl4030->predrivel_enabled)
194 write_to_reg = 1;
195 break;
196 case TWL4030_REG_PREDR_CTL:
197 if (twl4030->predriver_enabled)
198 write_to_reg = 1;
199 break;
200 case TWL4030_REG_PRECKL_CTL:
201 if (twl4030->carkitl_enabled)
202 write_to_reg = 1;
203 break;
204 case TWL4030_REG_PRECKR_CTL:
205 if (twl4030->carkitr_enabled)
206 write_to_reg = 1;
207 break;
208 case TWL4030_REG_HS_GAIN_SET:
209 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
210 write_to_reg = 1;
211 break;
212 default:
213 /* All other register can be written */
214 write_to_reg = 1;
215 break;
216 }
217 if (write_to_reg)
218 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
219 value, reg);
220 }
221 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700222}
223
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200224static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700225{
Mark Brownb2c812e2010-04-14 15:35:19 +0900226 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300227 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700228
Peter Ujfalusi73939582009-01-29 14:57:50 +0200229 if (enable == twl4030->codec_powered)
230 return;
231
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200232 if (enable)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300233 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200234 else
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300235 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700236
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300237 if (mode >= 0) {
238 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
239 twl4030->codec_powered = enable;
240 }
Steve Sakomancc175572008-10-30 21:35:26 -0700241
242 /* REVISIT: this delay is present in TI sample drivers */
243 /* but there seems to be no TRM requirement for it */
244 udelay(10);
245}
246
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300247static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700248{
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300249 int i, difference = 0;
250 u8 val;
Steve Sakomancc175572008-10-30 21:35:26 -0700251
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300252 dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
253 for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
254 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
255 if (val != twl4030_reg[i]) {
256 difference++;
257 dev_dbg(codec->dev,
258 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
259 i, val, twl4030_reg[i]);
260 }
261 }
262 dev_dbg(codec->dev, "Found %d non maching registers. %s\n",
263 difference, difference ? "Not OK" : "OK");
264}
265
Peter Ujfalusia3a29b52010-05-26 11:38:21 +0300266static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
267{
268 int i;
Steve Sakomancc175572008-10-30 21:35:26 -0700269
270 /* set all audio section registers to reasonable defaults */
271 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
Peter Ujfalusi68d01952009-11-04 09:58:20 +0200272 if (i != TWL4030_REG_APLL_CTL)
Peter Ujfalusia3a29b52010-05-26 11:38:21 +0300273 twl4030_write(codec, i, twl4030_reg[i]);
Steve Sakomancc175572008-10-30 21:35:26 -0700274
275}
276
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300277static void twl4030_init_chip(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -0700278{
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300279 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
280 struct twl4030_setup_data *setup = socdev->codec_data;
281 struct snd_soc_codec *codec = socdev->card->codec;
282 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
283 u8 reg, byte;
284 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700285
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300286 /* Check defaults, if instructed before anything else */
287 if (setup && setup->check_defaults)
288 twl4030_check_defaults(codec);
289
Peter Ujfalusia3a29b52010-05-26 11:38:21 +0300290 /* Reset registers, if no setup data or if instructed to do so */
291 if (!setup || (setup && setup->reset_registers))
292 twl4030_reset_registers(codec);
293
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300294 /* Refresh APLL_CTL register from HW */
Peter Ujfalusi9fdcc0f2010-05-26 11:38:18 +0300295 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300296 TWL4030_REG_APLL_CTL);
297 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
298
299 /* anti-pop when changing analog gain */
300 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
301 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
302 reg | TWL4030_SMOOTH_ANAVOL_EN);
303
304 twl4030_write(codec, TWL4030_REG_OPTION,
305 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
306 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
307
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300308 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
309 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
310
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300311 /* Machine dependent setup */
312 if (!setup)
313 return;
314
315 /* Configuration for headset ramp delay from setup data */
316 if (setup->sysclk != twl4030->sysclk)
317 dev_warn(codec->dev,
318 "Mismatch in APLL mclk: %u (configured: %u)\n",
319 setup->sysclk, twl4030->sysclk);
320
321 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
322 reg &= ~TWL4030_RAMP_DELAY;
323 reg |= (setup->ramp_delay_value << 2);
324 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
325
326 /* initiate offset cancellation */
327 twl4030_codec_enable(codec, 1);
328
329 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
330 reg &= ~TWL4030_OFFSET_CNCL_SEL;
331 reg |= setup->offset_cncl_path;
332 twl4030_write(codec, TWL4030_REG_ANAMICL,
333 reg | TWL4030_CNCL_OFFSET_START);
334
335 /* wait for offset cancellation to complete */
336 do {
337 /* this takes a little while, so don't slam i2c */
338 udelay(2000);
339 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
340 TWL4030_REG_ANAMICL);
341 } while ((i++ < 100) &&
342 ((byte & TWL4030_CNCL_OFFSET_START) ==
343 TWL4030_CNCL_OFFSET_START));
344
345 /* Make sure that the reg_cache has the same value as the HW */
346 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
347
Steve Sakomancc175572008-10-30 21:35:26 -0700348 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700349}
350
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200351static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200352{
Mark Brownb2c812e2010-04-14 15:35:19 +0900353 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300354 int status = -1;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200355
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300356 if (enable) {
357 twl4030->apll_enabled++;
358 if (twl4030->apll_enabled == 1)
359 status = twl4030_codec_enable_resource(
360 TWL4030_CODEC_RES_APLL);
361 } else {
362 twl4030->apll_enabled--;
363 if (!twl4030->apll_enabled)
364 status = twl4030_codec_disable_resource(
365 TWL4030_CODEC_RES_APLL);
366 }
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300367
368 if (status >= 0)
369 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200370}
371
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200372/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900373static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
374 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
375 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
376 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
377 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
378};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200379
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200380/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900381static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
382 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
383 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
384 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
385 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
386};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200387
388/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900389static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
390 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
391 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
392 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
393 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
394};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200395
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200396/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900397static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
398 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
399 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
400 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
401};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200402
403/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900404static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
405 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
406 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
407 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
408};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200409
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200410/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900411static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
412 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
413 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
414 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
415};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200416
417/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900418static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
419 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
420 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
421 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
422};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200423
Peter Ujfalusidf339802008-12-09 12:35:51 +0200424/* Handsfree Left */
425static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900426 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200427
428static const struct soc_enum twl4030_handsfreel_enum =
429 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
430 ARRAY_SIZE(twl4030_handsfreel_texts),
431 twl4030_handsfreel_texts);
432
433static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
434SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
435
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300436/* Handsfree Left virtual mute */
437static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
438 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
439
Peter Ujfalusidf339802008-12-09 12:35:51 +0200440/* Handsfree Right */
441static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900442 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200443
444static const struct soc_enum twl4030_handsfreer_enum =
445 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
446 ARRAY_SIZE(twl4030_handsfreer_texts),
447 twl4030_handsfreer_texts);
448
449static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
450SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
451
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300452/* Handsfree Right virtual mute */
453static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
454 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
455
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300456/* Vibra */
457/* Vibra audio path selection */
458static const char *twl4030_vibra_texts[] =
459 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
460
461static const struct soc_enum twl4030_vibra_enum =
462 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
463 ARRAY_SIZE(twl4030_vibra_texts),
464 twl4030_vibra_texts);
465
466static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
467SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
468
469/* Vibra path selection: local vibrator (PWM) or audio driven */
470static const char *twl4030_vibrapath_texts[] =
471 {"Local vibrator", "Audio"};
472
473static const struct soc_enum twl4030_vibrapath_enum =
474 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
475 ARRAY_SIZE(twl4030_vibrapath_texts),
476 twl4030_vibrapath_texts);
477
478static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
479SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
480
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200481/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900482static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300483 SOC_DAPM_SINGLE("Main Mic Capture Switch",
484 TWL4030_REG_ANAMICL, 0, 1, 0),
485 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
486 TWL4030_REG_ANAMICL, 1, 1, 0),
487 SOC_DAPM_SINGLE("AUXL Capture Switch",
488 TWL4030_REG_ANAMICL, 2, 1, 0),
489 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
490 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900491};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200492
493/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900494static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300495 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
496 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900497};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200498
499/* TX1 L/R Analog/Digital microphone selection */
500static const char *twl4030_micpathtx1_texts[] =
501 {"Analog", "Digimic0"};
502
503static const struct soc_enum twl4030_micpathtx1_enum =
504 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
505 ARRAY_SIZE(twl4030_micpathtx1_texts),
506 twl4030_micpathtx1_texts);
507
508static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
509SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
510
511/* TX2 L/R Analog/Digital microphone selection */
512static const char *twl4030_micpathtx2_texts[] =
513 {"Analog", "Digimic1"};
514
515static const struct soc_enum twl4030_micpathtx2_enum =
516 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
517 ARRAY_SIZE(twl4030_micpathtx2_texts),
518 twl4030_micpathtx2_texts);
519
520static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
521SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
522
Peter Ujfalusi73939582009-01-29 14:57:50 +0200523/* Analog bypass for AudioR1 */
524static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
525 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
526
527/* Analog bypass for AudioL1 */
528static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
529 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
530
531/* Analog bypass for AudioR2 */
532static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
533 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
534
535/* Analog bypass for AudioL2 */
536static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
537 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
538
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500539/* Analog bypass for Voice */
540static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
541 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
542
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300543/* Digital bypass gain, mute instead of -30dB */
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200544static const unsigned int twl4030_dapm_dbypass_tlv[] = {
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300545 TLV_DB_RANGE_HEAD(3),
546 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
547 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200548 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
549};
550
551/* Digital bypass left (TX1L -> RX2L) */
552static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
553 SOC_DAPM_SINGLE_TLV("Volume",
554 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
555 twl4030_dapm_dbypass_tlv);
556
557/* Digital bypass right (TX1R -> RX2R) */
558static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
559 SOC_DAPM_SINGLE_TLV("Volume",
560 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
561 twl4030_dapm_dbypass_tlv);
562
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500563/*
564 * Voice Sidetone GAIN volume control:
565 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
566 */
567static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
568
569/* Digital bypass voice: sidetone (VUL -> VDL)*/
570static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
571 SOC_DAPM_SINGLE_TLV("Volume",
572 TWL4030_REG_VSTPGA, 0, 0x29, 0,
573 twl4030_dapm_dbypassv_tlv);
574
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200575static int micpath_event(struct snd_soc_dapm_widget *w,
576 struct snd_kcontrol *kcontrol, int event)
577{
578 struct soc_enum *e = (struct soc_enum *)w->kcontrols->private_value;
579 unsigned char adcmicsel, micbias_ctl;
580
581 adcmicsel = twl4030_read_reg_cache(w->codec, TWL4030_REG_ADCMICSEL);
582 micbias_ctl = twl4030_read_reg_cache(w->codec, TWL4030_REG_MICBIAS_CTL);
583 /* Prepare the bits for the given TX path:
584 * shift_l == 0: TX1 microphone path
585 * shift_l == 2: TX2 microphone path */
586 if (e->shift_l) {
587 /* TX2 microphone path */
588 if (adcmicsel & TWL4030_TX2IN_SEL)
589 micbias_ctl |= TWL4030_MICBIAS2_CTL; /* digimic */
590 else
591 micbias_ctl &= ~TWL4030_MICBIAS2_CTL;
592 } else {
593 /* TX1 microphone path */
594 if (adcmicsel & TWL4030_TX1IN_SEL)
595 micbias_ctl |= TWL4030_MICBIAS1_CTL; /* digimic */
596 else
597 micbias_ctl &= ~TWL4030_MICBIAS1_CTL;
598 }
599
600 twl4030_write(w->codec, TWL4030_REG_MICBIAS_CTL, micbias_ctl);
601
602 return 0;
603}
604
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300605/*
606 * Output PGA builder:
607 * Handle the muting and unmuting of the given output (turning off the
608 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200609 * On mute bypass the reg_cache and write 0 to the register
610 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300611 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
612 */
613#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
614static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
615 struct snd_kcontrol *kcontrol, int event) \
616{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900617 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300618 \
619 switch (event) { \
620 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200621 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300622 twl4030_write(w->codec, reg, \
623 twl4030_read_reg_cache(w->codec, reg)); \
624 break; \
625 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200626 twl4030->pin_name##_enabled = 0; \
627 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
628 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300629 break; \
630 } \
631 return 0; \
632}
633
634TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
635TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
636TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
637TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
638TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
639
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300640static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800641{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800642 unsigned char hs_ctl;
643
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300644 hs_ctl = twl4030_read_reg_cache(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800645
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300646 if (ramp) {
647 /* HF ramp-up */
648 hs_ctl |= TWL4030_HF_CTL_REF_EN;
649 twl4030_write(codec, reg, hs_ctl);
650 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800651 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300652 twl4030_write(codec, reg, hs_ctl);
653 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800654 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800655 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300656 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800657 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300658 /* HF ramp-down */
659 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
660 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
661 twl4030_write(codec, reg, hs_ctl);
662 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
663 twl4030_write(codec, reg, hs_ctl);
664 udelay(40);
665 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
666 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800667 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300668}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800669
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300670static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
671 struct snd_kcontrol *kcontrol, int event)
672{
673 switch (event) {
674 case SND_SOC_DAPM_POST_PMU:
675 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
676 break;
677 case SND_SOC_DAPM_POST_PMD:
678 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
679 break;
680 }
681 return 0;
682}
683
684static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
685 struct snd_kcontrol *kcontrol, int event)
686{
687 switch (event) {
688 case SND_SOC_DAPM_POST_PMU:
689 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
690 break;
691 case SND_SOC_DAPM_POST_PMD:
692 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
693 break;
694 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800695 return 0;
696}
697
Jari Vanhala86139a12009-10-29 11:58:09 +0200698static int vibramux_event(struct snd_soc_dapm_widget *w,
699 struct snd_kcontrol *kcontrol, int event)
700{
701 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
702 return 0;
703}
704
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200705static int apll_event(struct snd_soc_dapm_widget *w,
706 struct snd_kcontrol *kcontrol, int event)
707{
708 switch (event) {
709 case SND_SOC_DAPM_PRE_PMU:
710 twl4030_apll_enable(w->codec, 1);
711 break;
712 case SND_SOC_DAPM_POST_PMD:
713 twl4030_apll_enable(w->codec, 0);
714 break;
715 }
716 return 0;
717}
718
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300719static int aif_event(struct snd_soc_dapm_widget *w,
720 struct snd_kcontrol *kcontrol, int event)
721{
722 u8 audio_if;
723
724 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
725 switch (event) {
726 case SND_SOC_DAPM_PRE_PMU:
727 /* Enable AIF */
728 /* enable the PLL before we use it to clock the DAI */
729 twl4030_apll_enable(w->codec, 1);
730
731 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
732 audio_if | TWL4030_AIF_EN);
733 break;
734 case SND_SOC_DAPM_POST_PMD:
735 /* disable the DAI before we stop it's source PLL */
736 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
737 audio_if & ~TWL4030_AIF_EN);
738 twl4030_apll_enable(w->codec, 0);
739 break;
740 }
741 return 0;
742}
743
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300744static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200745{
Candelaria Villareal, Jorge4e49ffd12009-07-01 19:17:43 -0500746 struct snd_soc_device *socdev = codec->socdev;
747 struct twl4030_setup_data *setup = socdev->codec_data;
748
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200749 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900750 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300751 /* Base values for ramp delay calculation: 2^19 - 2^26 */
752 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
753 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200754
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300755 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
756 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200757
Candelaria Villareal, Jorge4e49ffd12009-07-01 19:17:43 -0500758 /* Enable external mute control, this dramatically reduces
759 * the pop-noise */
760 if (setup && setup->hs_extmute) {
761 if (setup->set_hs_extmute) {
762 setup->set_hs_extmute(1);
763 } else {
764 hs_pop |= TWL4030_EXTMUTE;
765 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
766 }
767 }
768
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300769 if (ramp) {
770 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200771 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300772 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200773 /* Actually write to the register */
774 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
775 hs_gain,
776 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200777 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300778 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd12009-07-01 19:17:43 -0500779 /* Wait ramp delay time + 1, so the VMID can settle */
780 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
781 twl4030->sysclk) + 1);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300782 } else {
783 /* Headset ramp-down _not_ according to
784 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200785 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300786 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
787 /* Wait ramp delay time + 1, so the VMID can settle */
788 mdelay((ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
789 twl4030->sysclk) + 1);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200790 /* Bypass the reg_cache to mute the headset */
Balaji T Kfc7b92f2009-12-13 21:23:33 +0100791 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200792 hs_gain & (~0x0f),
793 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300794
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200795 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300796 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
797 }
Candelaria Villareal, Jorge4e49ffd12009-07-01 19:17:43 -0500798
799 /* Disable external mute */
800 if (setup && setup->hs_extmute) {
801 if (setup->set_hs_extmute) {
802 setup->set_hs_extmute(0);
803 } else {
804 hs_pop &= ~TWL4030_EXTMUTE;
805 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
806 }
807 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300808}
809
810static int headsetlpga_event(struct snd_soc_dapm_widget *w,
811 struct snd_kcontrol *kcontrol, int event)
812{
Mark Brownb2c812e2010-04-14 15:35:19 +0900813 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300814
815 switch (event) {
816 case SND_SOC_DAPM_POST_PMU:
817 /* Do the ramp-up only once */
818 if (!twl4030->hsr_enabled)
819 headset_ramp(w->codec, 1);
820
821 twl4030->hsl_enabled = 1;
822 break;
823 case SND_SOC_DAPM_POST_PMD:
824 /* Do the ramp-down only if both headsetL/R is disabled */
825 if (!twl4030->hsr_enabled)
826 headset_ramp(w->codec, 0);
827
828 twl4030->hsl_enabled = 0;
829 break;
830 }
831 return 0;
832}
833
834static int headsetrpga_event(struct snd_soc_dapm_widget *w,
835 struct snd_kcontrol *kcontrol, int event)
836{
Mark Brownb2c812e2010-04-14 15:35:19 +0900837 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300838
839 switch (event) {
840 case SND_SOC_DAPM_POST_PMU:
841 /* Do the ramp-up only once */
842 if (!twl4030->hsl_enabled)
843 headset_ramp(w->codec, 1);
844
845 twl4030->hsr_enabled = 1;
846 break;
847 case SND_SOC_DAPM_POST_PMD:
848 /* Do the ramp-down only if both headsetL/R is disabled */
849 if (!twl4030->hsl_enabled)
850 headset_ramp(w->codec, 0);
851
852 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200853 break;
854 }
855 return 0;
856}
857
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200858/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200859 * Some of the gain controls in TWL (mostly those which are associated with
860 * the outputs) are implemented in an interesting way:
861 * 0x0 : Power down (mute)
862 * 0x1 : 6dB
863 * 0x2 : 0 dB
864 * 0x3 : -6 dB
865 * Inverting not going to help with these.
866 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
867 */
868#define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
869 xinvert, tlv_array) \
870{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
871 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
872 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
873 .tlv.p = (tlv_array), \
874 .info = snd_soc_info_volsw, \
875 .get = snd_soc_get_volsw_twl4030, \
876 .put = snd_soc_put_volsw_twl4030, \
877 .private_value = (unsigned long)&(struct soc_mixer_control) \
878 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
879 .max = xmax, .invert = xinvert} }
880#define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
881 xinvert, tlv_array) \
882{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
883 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
884 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
885 .tlv.p = (tlv_array), \
886 .info = snd_soc_info_volsw_2r, \
887 .get = snd_soc_get_volsw_r2_twl4030,\
888 .put = snd_soc_put_volsw_r2_twl4030, \
889 .private_value = (unsigned long)&(struct soc_mixer_control) \
890 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
Mark Brown64089b82008-12-08 19:17:58 +0000891 .rshift = xshift, .max = xmax, .invert = xinvert} }
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200892#define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
893 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
894 xinvert, tlv_array)
895
896static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
897 struct snd_ctl_elem_value *ucontrol)
898{
899 struct soc_mixer_control *mc =
900 (struct soc_mixer_control *)kcontrol->private_value;
901 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
902 unsigned int reg = mc->reg;
903 unsigned int shift = mc->shift;
904 unsigned int rshift = mc->rshift;
905 int max = mc->max;
906 int mask = (1 << fls(max)) - 1;
907
908 ucontrol->value.integer.value[0] =
909 (snd_soc_read(codec, reg) >> shift) & mask;
910 if (ucontrol->value.integer.value[0])
911 ucontrol->value.integer.value[0] =
912 max + 1 - ucontrol->value.integer.value[0];
913
914 if (shift != rshift) {
915 ucontrol->value.integer.value[1] =
916 (snd_soc_read(codec, reg) >> rshift) & mask;
917 if (ucontrol->value.integer.value[1])
918 ucontrol->value.integer.value[1] =
919 max + 1 - ucontrol->value.integer.value[1];
920 }
921
922 return 0;
923}
924
925static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
926 struct snd_ctl_elem_value *ucontrol)
927{
928 struct soc_mixer_control *mc =
929 (struct soc_mixer_control *)kcontrol->private_value;
930 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
931 unsigned int reg = mc->reg;
932 unsigned int shift = mc->shift;
933 unsigned int rshift = mc->rshift;
934 int max = mc->max;
935 int mask = (1 << fls(max)) - 1;
936 unsigned short val, val2, val_mask;
937
938 val = (ucontrol->value.integer.value[0] & mask);
939
940 val_mask = mask << shift;
941 if (val)
942 val = max + 1 - val;
943 val = val << shift;
944 if (shift != rshift) {
945 val2 = (ucontrol->value.integer.value[1] & mask);
946 val_mask |= mask << rshift;
947 if (val2)
948 val2 = max + 1 - val2;
949 val |= val2 << rshift;
950 }
951 return snd_soc_update_bits(codec, reg, val_mask, val);
952}
953
954static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
955 struct snd_ctl_elem_value *ucontrol)
956{
957 struct soc_mixer_control *mc =
958 (struct soc_mixer_control *)kcontrol->private_value;
959 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
960 unsigned int reg = mc->reg;
961 unsigned int reg2 = mc->rreg;
962 unsigned int shift = mc->shift;
963 int max = mc->max;
964 int mask = (1<<fls(max))-1;
965
966 ucontrol->value.integer.value[0] =
967 (snd_soc_read(codec, reg) >> shift) & mask;
968 ucontrol->value.integer.value[1] =
969 (snd_soc_read(codec, reg2) >> shift) & mask;
970
971 if (ucontrol->value.integer.value[0])
972 ucontrol->value.integer.value[0] =
973 max + 1 - ucontrol->value.integer.value[0];
974 if (ucontrol->value.integer.value[1])
975 ucontrol->value.integer.value[1] =
976 max + 1 - ucontrol->value.integer.value[1];
977
978 return 0;
979}
980
981static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
982 struct snd_ctl_elem_value *ucontrol)
983{
984 struct soc_mixer_control *mc =
985 (struct soc_mixer_control *)kcontrol->private_value;
986 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
987 unsigned int reg = mc->reg;
988 unsigned int reg2 = mc->rreg;
989 unsigned int shift = mc->shift;
990 int max = mc->max;
991 int mask = (1 << fls(max)) - 1;
992 int err;
993 unsigned short val, val2, val_mask;
994
995 val_mask = mask << shift;
996 val = (ucontrol->value.integer.value[0] & mask);
997 val2 = (ucontrol->value.integer.value[1] & mask);
998
999 if (val)
1000 val = max + 1 - val;
1001 if (val2)
1002 val2 = max + 1 - val2;
1003
1004 val = val << shift;
1005 val2 = val2 << shift;
1006
1007 err = snd_soc_update_bits(codec, reg, val_mask, val);
1008 if (err < 0)
1009 return err;
1010
1011 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
1012 return err;
1013}
1014
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001015/* Codec operation modes */
1016static const char *twl4030_op_modes_texts[] = {
1017 "Option 2 (voice/audio)", "Option 1 (audio)"
1018};
1019
1020static const struct soc_enum twl4030_op_modes_enum =
1021 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
1022 ARRAY_SIZE(twl4030_op_modes_texts),
1023 twl4030_op_modes_texts);
1024
Mark Brown423c2382009-06-20 13:54:02 +01001025static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001026 struct snd_ctl_elem_value *ucontrol)
1027{
1028 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +09001029 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001030 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1031 unsigned short val;
1032 unsigned short mask, bitmask;
1033
1034 if (twl4030->configured) {
1035 printk(KERN_ERR "twl4030 operation mode cannot be "
1036 "changed on-the-fly\n");
1037 return -EBUSY;
1038 }
1039
1040 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1041 ;
1042 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1043 return -EINVAL;
1044
1045 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1046 mask = (bitmask - 1) << e->shift_l;
1047 if (e->shift_l != e->shift_r) {
1048 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1049 return -EINVAL;
1050 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1051 mask |= (bitmask - 1) << e->shift_r;
1052 }
1053
1054 return snd_soc_update_bits(codec, e->reg, mask, val);
1055}
1056
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +02001057/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001058 * FGAIN volume control:
1059 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1060 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001061static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +02001062
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001063/*
1064 * CGAIN volume control:
1065 * 0 dB to 12 dB in 6 dB steps
1066 * value 2 and 3 means 12 dB
1067 */
Peter Ujfalusid889a722008-12-01 10:03:46 +02001068static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1069
1070/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001071 * Voice Downlink GAIN volume control:
1072 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1073 */
1074static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1075
1076/*
Peter Ujfalusid889a722008-12-01 10:03:46 +02001077 * Analog playback gain
1078 * -24 dB to 12 dB in 2 dB steps
1079 */
1080static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +02001081
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001082/*
Peter Ujfalusi42902392008-12-01 10:03:47 +02001083 * Gain controls tied to outputs
1084 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1085 */
1086static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1087
1088/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001089 * Gain control for earpiece amplifier
1090 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1091 */
1092static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1093
1094/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001095 * Capture gain after the ADCs
1096 * from 0 dB to 31 dB in 1 dB steps
1097 */
1098static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1099
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001100/*
1101 * Gain control for input amplifiers
1102 * 0 dB to 30 dB in 6 dB steps
1103 */
1104static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1105
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001106/* AVADC clock priority */
1107static const char *twl4030_avadc_clk_priority_texts[] = {
1108 "Voice high priority", "HiFi high priority"
1109};
1110
1111static const struct soc_enum twl4030_avadc_clk_priority_enum =
1112 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1113 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1114 twl4030_avadc_clk_priority_texts);
1115
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001116static const char *twl4030_rampdelay_texts[] = {
1117 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1118 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1119 "3495/2581/1748 ms"
1120};
1121
1122static const struct soc_enum twl4030_rampdelay_enum =
1123 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1124 ARRAY_SIZE(twl4030_rampdelay_texts),
1125 twl4030_rampdelay_texts);
1126
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001127/* Vibra H-bridge direction mode */
1128static const char *twl4030_vibradirmode_texts[] = {
1129 "Vibra H-bridge direction", "Audio data MSB",
1130};
1131
1132static const struct soc_enum twl4030_vibradirmode_enum =
1133 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1134 ARRAY_SIZE(twl4030_vibradirmode_texts),
1135 twl4030_vibradirmode_texts);
1136
1137/* Vibra H-bridge direction */
1138static const char *twl4030_vibradir_texts[] = {
1139 "Positive polarity", "Negative polarity",
1140};
1141
1142static const struct soc_enum twl4030_vibradir_enum =
1143 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1144 ARRAY_SIZE(twl4030_vibradir_texts),
1145 twl4030_vibradir_texts);
1146
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001147/* Digimic Left and right swapping */
1148static const char *twl4030_digimicswap_texts[] = {
1149 "Not swapped", "Swapped",
1150};
1151
1152static const struct soc_enum twl4030_digimicswap_enum =
1153 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1154 ARRAY_SIZE(twl4030_digimicswap_texts),
1155 twl4030_digimicswap_texts);
1156
Steve Sakomancc175572008-10-30 21:35:26 -07001157static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001158 /* Codec operation mode control */
1159 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1160 snd_soc_get_enum_double,
1161 snd_soc_put_twl4030_opmode_enum_double),
1162
Peter Ujfalusid889a722008-12-01 10:03:46 +02001163 /* Common playback gain controls */
1164 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1165 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1166 0, 0x3f, 0, digital_fine_tlv),
1167 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1168 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1169 0, 0x3f, 0, digital_fine_tlv),
1170
1171 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1172 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1173 6, 0x2, 0, digital_coarse_tlv),
1174 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1175 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1176 6, 0x2, 0, digital_coarse_tlv),
1177
1178 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1179 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1180 3, 0x12, 1, analog_tlv),
1181 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1182 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1183 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001184 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1185 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1186 1, 1, 0),
1187 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1188 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1189 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001190
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001191 /* Common voice downlink gain controls */
1192 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1193 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1194
1195 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1196 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1197
1198 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1199 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1200
Peter Ujfalusi42902392008-12-01 10:03:47 +02001201 /* Separate output gain controls */
1202 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1203 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1204 4, 3, 0, output_tvl),
1205
1206 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1207 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1208
1209 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1210 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1211 4, 3, 0, output_tvl),
1212
1213 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001214 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001215
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001216 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001217 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001218 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1219 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001220 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1221 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1222 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001223
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001224 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001225 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001226
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001227 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1228
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001229 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001230
1231 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1232 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001233
1234 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001235};
1236
Steve Sakomancc175572008-10-30 21:35:26 -07001237static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001238 /* Left channel inputs */
1239 SND_SOC_DAPM_INPUT("MAINMIC"),
1240 SND_SOC_DAPM_INPUT("HSMIC"),
1241 SND_SOC_DAPM_INPUT("AUXL"),
1242 SND_SOC_DAPM_INPUT("CARKITMIC"),
1243 /* Right channel inputs */
1244 SND_SOC_DAPM_INPUT("SUBMIC"),
1245 SND_SOC_DAPM_INPUT("AUXR"),
1246 /* Digital microphones (Stereo) */
1247 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1248 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001249
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001250 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001251 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001252 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1253 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001254 SND_SOC_DAPM_OUTPUT("HSOL"),
1255 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001256 SND_SOC_DAPM_OUTPUT("CARKITL"),
1257 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001258 SND_SOC_DAPM_OUTPUT("HFL"),
1259 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001260 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001261
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001262 /* AIF and APLL clocks for running DAIs (including loopback) */
1263 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1264 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1265 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1266
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001267 /* DACs */
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001268 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001269 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001270 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001271 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001272 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001273 SND_SOC_NOPM, 0, 0),
Peter Ujfalusib4852b72009-05-22 15:12:15 +03001274 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
Peter Ujfalusi73939582009-01-29 14:57:50 +02001275 SND_SOC_NOPM, 0, 0),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001276 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001277 SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001278
Peter Ujfalusi73939582009-01-29 14:57:50 +02001279 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001280 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1281 &twl4030_dapm_abypassr1_control),
1282 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1283 &twl4030_dapm_abypassl1_control),
1284 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1285 &twl4030_dapm_abypassr2_control),
1286 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1287 &twl4030_dapm_abypassl2_control),
1288 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1289 &twl4030_dapm_abypassv_control),
1290
1291 /* Master analog loopback switch */
1292 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1293 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001294
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001295 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001296 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1297 &twl4030_dapm_dbypassl_control),
1298 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1299 &twl4030_dapm_dbypassr_control),
1300 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1301 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001302
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001303 /* Digital mixers, power control for the physical DACs */
1304 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1305 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1306 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1307 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1308 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1309 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1310 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1311 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1312 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1313 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1314
1315 /* Analog mixers, power control for the physical PGAs */
1316 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1317 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1318 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1319 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1320 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1321 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1322 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1323 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1324 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1325 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001326
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001327 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1328 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1329
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001330 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1331 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001332
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001333 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001334 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001335 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1336 &twl4030_dapm_earpiece_controls[0],
1337 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001338 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1339 0, 0, NULL, 0, earpiecepga_event,
1340 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001341 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001342 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1343 &twl4030_dapm_predrivel_controls[0],
1344 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001345 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1346 0, 0, NULL, 0, predrivelpga_event,
1347 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001348 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1349 &twl4030_dapm_predriver_controls[0],
1350 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001351 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1352 0, 0, NULL, 0, predriverpga_event,
1353 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001354 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001355 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001356 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001357 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1358 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1359 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001360 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1361 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1362 &twl4030_dapm_hsor_controls[0],
1363 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001364 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1365 0, 0, NULL, 0, headsetrpga_event,
1366 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001367 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001368 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1369 &twl4030_dapm_carkitl_controls[0],
1370 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001371 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1372 0, 0, NULL, 0, carkitlpga_event,
1373 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001374 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1375 &twl4030_dapm_carkitr_controls[0],
1376 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001377 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1378 0, 0, NULL, 0, carkitrpga_event,
1379 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001380
1381 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001382 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001383 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1384 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001385 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001386 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001387 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1388 0, 0, NULL, 0, handsfreelpga_event,
1389 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1390 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1391 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001392 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001393 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001394 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1395 0, 0, NULL, 0, handsfreerpga_event,
1396 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001397 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001398 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1399 &twl4030_dapm_vibra_control, vibramux_event,
1400 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001401 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1402 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001403
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001404 /* Introducing four virtual ADC, since TWL4030 have four channel for
1405 capture */
1406 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1407 SND_SOC_NOPM, 0, 0),
1408 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1409 SND_SOC_NOPM, 0, 0),
1410 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1411 SND_SOC_NOPM, 0, 0),
1412 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1413 SND_SOC_NOPM, 0, 0),
1414
1415 /* Analog/Digital mic path selection.
1416 TX1 Left/Right: either analog Left/Right or Digimic0
1417 TX2 Left/Right: either analog Left/Right or Digimic1 */
1418 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1419 &twl4030_dapm_micpathtx1_control, micpath_event,
1420 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1421 SND_SOC_DAPM_POST_REG),
1422 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1423 &twl4030_dapm_micpathtx2_control, micpath_event,
1424 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD|
1425 SND_SOC_DAPM_POST_REG),
1426
Joonyoung Shim97b80962009-05-11 20:36:08 +09001427 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001428 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001429 TWL4030_REG_ANAMICL, 4, 0,
1430 &twl4030_dapm_analoglmic_controls[0],
1431 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001432 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001433 TWL4030_REG_ANAMICR, 4, 0,
1434 &twl4030_dapm_analogrmic_controls[0],
1435 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001436
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001437 SND_SOC_DAPM_PGA("ADC Physical Left",
1438 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1439 SND_SOC_DAPM_PGA("ADC Physical Right",
1440 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001441
1442 SND_SOC_DAPM_PGA("Digimic0 Enable",
1443 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0),
1444 SND_SOC_DAPM_PGA("Digimic1 Enable",
1445 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0),
1446
1447 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1448 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1449 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001450
Steve Sakomancc175572008-10-30 21:35:26 -07001451};
1452
1453static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001454 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1455 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1456 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1457 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1458 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001459
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001460 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001461 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1462
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001463 {"Digital R1 Playback Mixer", NULL, "AIF Enable"},
1464 {"Digital L1 Playback Mixer", NULL, "AIF Enable"},
1465 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1466 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1467
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001468 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1469 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1470 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1471 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1472 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001473
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001474 /* Internal playback routings */
1475 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001476 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1477 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1478 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1479 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001480 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001481 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001482 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1483 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1484 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1485 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001486 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001487 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001488 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1489 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1490 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1491 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001492 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001493 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001494 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1495 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1496 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001497 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001498 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001499 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1500 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1501 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001502 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001503 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001504 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1505 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1506 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001507 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001508 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001509 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1510 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1511 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001512 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001513 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001514 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1515 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1516 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1517 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001518 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1519 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001520 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001521 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1522 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1523 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1524 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001525 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1526 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001527 /* Vibra */
1528 {"Vibra Mux", "AudioL1", "DAC Left1"},
1529 {"Vibra Mux", "AudioR1", "DAC Right1"},
1530 {"Vibra Mux", "AudioL2", "DAC Left2"},
1531 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001532
Steve Sakomancc175572008-10-30 21:35:26 -07001533 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001534 /* Must be always connected (for AIF and APLL) */
1535 {"Virtual HiFi OUT", NULL, "Digital L1 Playback Mixer"},
1536 {"Virtual HiFi OUT", NULL, "Digital R1 Playback Mixer"},
1537 {"Virtual HiFi OUT", NULL, "Digital L2 Playback Mixer"},
1538 {"Virtual HiFi OUT", NULL, "Digital R2 Playback Mixer"},
1539 /* Must be always connected (for APLL) */
1540 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1541 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001542 {"EARPIECE", NULL, "Earpiece PGA"},
1543 {"PREDRIVEL", NULL, "PredriveL PGA"},
1544 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001545 {"HSOL", NULL, "HeadsetL PGA"},
1546 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001547 {"CARKITL", NULL, "CarkitL PGA"},
1548 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001549 {"HFL", NULL, "HandsfreeL PGA"},
1550 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001551 {"Vibra Route", "Audio", "Vibra Mux"},
1552 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001553
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001554 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001555 /* Must be always connected (for AIF and APLL) */
1556 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1557 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1558 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1559 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1560 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001561 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1562 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1563 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1564 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001565
Peter Ujfalusi90289352009-08-14 08:44:00 +03001566 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1567 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001568
Peter Ujfalusi90289352009-08-14 08:44:00 +03001569 {"ADC Physical Left", NULL, "Analog Left"},
1570 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001571
1572 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1573 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1574
1575 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001576 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001577 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1578 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001579 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001580 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1581 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001582 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001583 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1584 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001585 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001586 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1587
1588 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1589 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1590 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1591 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1592
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001593 {"ADC Virtual Left1", NULL, "AIF Enable"},
1594 {"ADC Virtual Right1", NULL, "AIF Enable"},
1595 {"ADC Virtual Left2", NULL, "AIF Enable"},
1596 {"ADC Virtual Right2", NULL, "AIF Enable"},
1597
Peter Ujfalusi73939582009-01-29 14:57:50 +02001598 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001599 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1600 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1601 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1602 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1603 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001604
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001605 /* Supply for the Analog loopbacks */
1606 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1607 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1608 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1609 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1610 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1611
Peter Ujfalusi73939582009-01-29 14:57:50 +02001612 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1613 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1614 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1615 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001616 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001617
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001618 /* Digital bypass routes */
1619 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1620 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001621 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001622
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001623 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1624 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1625 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001626
Steve Sakomancc175572008-10-30 21:35:26 -07001627};
1628
1629static int twl4030_add_widgets(struct snd_soc_codec *codec)
1630{
1631 snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
1632 ARRAY_SIZE(twl4030_dapm_widgets));
1633
1634 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
1635
Steve Sakomancc175572008-10-30 21:35:26 -07001636 return 0;
1637}
1638
Steve Sakomancc175572008-10-30 21:35:26 -07001639static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1640 enum snd_soc_bias_level level)
1641{
1642 switch (level) {
1643 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001644 break;
1645 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001646 break;
1647 case SND_SOC_BIAS_STANDBY:
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001648 if (codec->bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001649 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001650 break;
1651 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001652 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001653 break;
1654 }
1655 codec->bias_level = level;
1656
1657 return 0;
1658}
1659
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001660static void twl4030_constraints(struct twl4030_priv *twl4030,
1661 struct snd_pcm_substream *mst_substream)
1662{
1663 struct snd_pcm_substream *slv_substream;
1664
1665 /* Pick the stream, which need to be constrained */
1666 if (mst_substream == twl4030->master_substream)
1667 slv_substream = twl4030->slave_substream;
1668 else if (mst_substream == twl4030->slave_substream)
1669 slv_substream = twl4030->master_substream;
1670 else /* This should not happen.. */
1671 return;
1672
1673 /* Set the constraints according to the already configured stream */
1674 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1675 SNDRV_PCM_HW_PARAM_RATE,
1676 twl4030->rate,
1677 twl4030->rate);
1678
1679 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1680 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1681 twl4030->sample_bits,
1682 twl4030->sample_bits);
1683
1684 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1685 SNDRV_PCM_HW_PARAM_CHANNELS,
1686 twl4030->channels,
1687 twl4030->channels);
1688}
1689
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001690/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1691 * capture has to be enabled/disabled. */
1692static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1693 int enable)
1694{
1695 u8 reg, mask;
1696
1697 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1698
1699 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1700 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1701 else
1702 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1703
1704 if (enable)
1705 reg |= mask;
1706 else
1707 reg &= ~mask;
1708
1709 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1710}
1711
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001712static int twl4030_startup(struct snd_pcm_substream *substream,
1713 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001714{
1715 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1716 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001717 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001718 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001719
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001720 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001721 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001722 /* The DAI has one configuration for playback and capture, so
1723 * if the DAI has been already configured then constrain this
1724 * substream to match it. */
1725 if (twl4030->configured)
1726 twl4030_constraints(twl4030, twl4030->master_substream);
1727 } else {
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001728 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1729 TWL4030_OPTION_1)) {
1730 /* In option2 4 channel is not supported, set the
1731 * constraint for the first stream for channels, the
1732 * second stream will 'inherit' this cosntraint */
1733 snd_pcm_hw_constraint_minmax(substream->runtime,
1734 SNDRV_PCM_HW_PARAM_CHANNELS,
1735 2, 2);
1736 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001737 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001738 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001739
1740 return 0;
1741}
1742
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001743static void twl4030_shutdown(struct snd_pcm_substream *substream,
1744 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001745{
1746 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1747 struct snd_soc_device *socdev = rtd->socdev;
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001748 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001749 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001750
1751 if (twl4030->master_substream == substream)
1752 twl4030->master_substream = twl4030->slave_substream;
1753
1754 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001755
1756 /* If all streams are closed, or the remaining stream has not yet
1757 * been configured than set the DAI as not configured. */
1758 if (!twl4030->master_substream)
1759 twl4030->configured = 0;
1760 else if (!twl4030->master_substream->runtime->channels)
1761 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001762
1763 /* If the closing substream had 4 channel, do the necessary cleanup */
1764 if (substream->runtime->channels == 4)
1765 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001766}
1767
Steve Sakomancc175572008-10-30 21:35:26 -07001768static int twl4030_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +00001769 struct snd_pcm_hw_params *params,
1770 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001771{
1772 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1773 struct snd_soc_device *socdev = rtd->socdev;
Mark Brown6627a652009-01-23 22:55:23 +00001774 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001775 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001776 u8 mode, old_mode, format, old_format;
1777
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001778 /* If the substream has 4 channel, do the necessary setup */
1779 if (params_channels(params) == 4) {
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001780 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1781 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1782
1783 /* Safety check: are we in the correct operating mode and
1784 * the interface is in TDM mode? */
1785 if ((mode & TWL4030_OPTION_1) &&
1786 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001787 twl4030_tdm_enable(codec, substream->stream, 1);
1788 else
1789 return -EINVAL;
1790 }
1791
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001792 if (twl4030->configured)
1793 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001794 return 0;
1795
Steve Sakomancc175572008-10-30 21:35:26 -07001796 /* bit rate */
1797 old_mode = twl4030_read_reg_cache(codec,
1798 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1799 mode = old_mode & ~TWL4030_APLL_RATE;
1800
1801 switch (params_rate(params)) {
1802 case 8000:
1803 mode |= TWL4030_APLL_RATE_8000;
1804 break;
1805 case 11025:
1806 mode |= TWL4030_APLL_RATE_11025;
1807 break;
1808 case 12000:
1809 mode |= TWL4030_APLL_RATE_12000;
1810 break;
1811 case 16000:
1812 mode |= TWL4030_APLL_RATE_16000;
1813 break;
1814 case 22050:
1815 mode |= TWL4030_APLL_RATE_22050;
1816 break;
1817 case 24000:
1818 mode |= TWL4030_APLL_RATE_24000;
1819 break;
1820 case 32000:
1821 mode |= TWL4030_APLL_RATE_32000;
1822 break;
1823 case 44100:
1824 mode |= TWL4030_APLL_RATE_44100;
1825 break;
1826 case 48000:
1827 mode |= TWL4030_APLL_RATE_48000;
1828 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001829 case 96000:
1830 mode |= TWL4030_APLL_RATE_96000;
1831 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001832 default:
1833 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1834 params_rate(params));
1835 return -EINVAL;
1836 }
1837
Steve Sakomancc175572008-10-30 21:35:26 -07001838 /* sample size */
1839 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1840 format = old_format;
1841 format &= ~TWL4030_DATA_WIDTH;
1842 switch (params_format(params)) {
1843 case SNDRV_PCM_FORMAT_S16_LE:
1844 format |= TWL4030_DATA_WIDTH_16S_16W;
1845 break;
1846 case SNDRV_PCM_FORMAT_S24_LE:
1847 format |= TWL4030_DATA_WIDTH_32S_24W;
1848 break;
1849 default:
1850 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1851 params_format(params));
1852 return -EINVAL;
1853 }
1854
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001855 if (format != old_format || mode != old_mode) {
1856 if (twl4030->codec_powered) {
1857 /*
1858 * If the codec is powered, than we need to toggle the
1859 * codec power.
1860 */
1861 twl4030_codec_enable(codec, 0);
1862 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1863 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1864 twl4030_codec_enable(codec, 1);
1865 } else {
1866 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1867 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1868 }
Steve Sakomancc175572008-10-30 21:35:26 -07001869 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001870
1871 /* Store the important parameters for the DAI configuration and set
1872 * the DAI as configured */
1873 twl4030->configured = 1;
1874 twl4030->rate = params_rate(params);
1875 twl4030->sample_bits = hw_param_interval(params,
1876 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1877 twl4030->channels = params_channels(params);
1878
1879 /* If both playback and capture streams are open, and one of them
1880 * is setting the hw parameters right now (since we are here), set
1881 * constraints to the other stream to match the current one. */
1882 if (twl4030->slave_substream)
1883 twl4030_constraints(twl4030, substream);
1884
Steve Sakomancc175572008-10-30 21:35:26 -07001885 return 0;
1886}
1887
1888static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1889 int clk_id, unsigned int freq, int dir)
1890{
1891 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001892 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001893
1894 switch (freq) {
1895 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001896 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001897 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001898 break;
1899 default:
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001900 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001901 return -EINVAL;
1902 }
1903
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001904 if ((freq / 1000) != twl4030->sysclk) {
1905 dev_err(codec->dev,
1906 "Mismatch in APLL mclk: %u (configured: %u)\n",
1907 freq, twl4030->sysclk * 1000);
1908 return -EINVAL;
1909 }
Steve Sakomancc175572008-10-30 21:35:26 -07001910
1911 return 0;
1912}
1913
1914static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1915 unsigned int fmt)
1916{
1917 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001918 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001919 u8 old_format, format;
1920
1921 /* get format */
1922 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1923 format = old_format;
1924
1925 /* set master/slave audio interface */
1926 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1927 case SND_SOC_DAIFMT_CBM_CFM:
1928 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001929 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001930 break;
1931 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001932 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001933 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001934 break;
1935 default:
1936 return -EINVAL;
1937 }
1938
1939 /* interface format */
1940 format &= ~TWL4030_AIF_FORMAT;
1941 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1942 case SND_SOC_DAIFMT_I2S:
1943 format |= TWL4030_AIF_FORMAT_CODEC;
1944 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001945 case SND_SOC_DAIFMT_DSP_A:
1946 format |= TWL4030_AIF_FORMAT_TDM;
1947 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001948 default:
1949 return -EINVAL;
1950 }
1951
1952 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001953 if (twl4030->codec_powered) {
1954 /*
1955 * If the codec is powered, than we need to toggle the
1956 * codec power.
1957 */
1958 twl4030_codec_enable(codec, 0);
1959 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1960 twl4030_codec_enable(codec, 1);
1961 } else {
1962 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1963 }
Steve Sakomancc175572008-10-30 21:35:26 -07001964 }
1965
1966 return 0;
1967}
1968
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001969static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1970{
1971 struct snd_soc_codec *codec = dai->codec;
1972 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1973
1974 if (tristate)
1975 reg |= TWL4030_AIF_TRI_EN;
1976 else
1977 reg &= ~TWL4030_AIF_TRI_EN;
1978
1979 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1980}
1981
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001982/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1983 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1984static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1985 int enable)
1986{
1987 u8 reg, mask;
1988
1989 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1990
1991 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1992 mask = TWL4030_ARXL1_VRX_EN;
1993 else
1994 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1995
1996 if (enable)
1997 reg |= mask;
1998 else
1999 reg &= ~mask;
2000
2001 twl4030_write(codec, TWL4030_REG_OPTION, reg);
2002}
2003
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002004static int twl4030_voice_startup(struct snd_pcm_substream *substream,
2005 struct snd_soc_dai *dai)
2006{
2007 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2008 struct snd_soc_device *socdev = rtd->socdev;
2009 struct snd_soc_codec *codec = socdev->card->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09002010 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002011 u8 mode;
2012
2013 /* If the system master clock is not 26MHz, the voice PCM interface is
2014 * not avilable.
2015 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002016 if (twl4030->sysclk != 26000) {
2017 dev_err(codec->dev, "The board is configured for %u Hz, while"
2018 "the Voice interface needs 26MHz APLL mclk\n",
2019 twl4030->sysclk * 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002020 return -EINVAL;
2021 }
2022
2023 /* If the codec mode is not option2, the voice PCM interface is not
2024 * avilable.
2025 */
2026 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2027 & TWL4030_OPT_MODE;
2028
2029 if (mode != TWL4030_OPTION_2) {
2030 printk(KERN_ERR "TWL4030 voice startup: "
2031 "the codec mode is not option2\n");
2032 return -EINVAL;
2033 }
2034
2035 return 0;
2036}
2037
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002038static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
2039 struct snd_soc_dai *dai)
2040{
2041 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2042 struct snd_soc_device *socdev = rtd->socdev;
2043 struct snd_soc_codec *codec = socdev->card->codec;
2044
2045 /* Enable voice digital filters */
2046 twl4030_voice_enable(codec, substream->stream, 0);
2047}
2048
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002049static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2050 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2051{
2052 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2053 struct snd_soc_device *socdev = rtd->socdev;
2054 struct snd_soc_codec *codec = socdev->card->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002055 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002056 u8 old_mode, mode;
2057
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002058 /* Enable voice digital filters */
2059 twl4030_voice_enable(codec, substream->stream, 1);
2060
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002061 /* bit rate */
2062 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2063 & ~(TWL4030_CODECPDZ);
2064 mode = old_mode;
2065
2066 switch (params_rate(params)) {
2067 case 8000:
2068 mode &= ~(TWL4030_SEL_16K);
2069 break;
2070 case 16000:
2071 mode |= TWL4030_SEL_16K;
2072 break;
2073 default:
2074 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2075 params_rate(params));
2076 return -EINVAL;
2077 }
2078
2079 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002080 if (twl4030->codec_powered) {
2081 /*
2082 * If the codec is powered, than we need to toggle the
2083 * codec power.
2084 */
2085 twl4030_codec_enable(codec, 0);
2086 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2087 twl4030_codec_enable(codec, 1);
2088 } else {
2089 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2090 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002091 }
2092
2093 return 0;
2094}
2095
2096static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2097 int clk_id, unsigned int freq, int dir)
2098{
2099 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002100 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002101
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002102 if (freq != 26000000) {
2103 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2104 "interface needs 26MHz APLL mclk\n", freq);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002105 return -EINVAL;
2106 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002107 if ((freq / 1000) != twl4030->sysclk) {
2108 dev_err(codec->dev,
2109 "Mismatch in APLL mclk: %u (configured: %u)\n",
2110 freq, twl4030->sysclk * 1000);
2111 return -EINVAL;
2112 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002113 return 0;
2114}
2115
2116static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2117 unsigned int fmt)
2118{
2119 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002120 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002121 u8 old_format, format;
2122
2123 /* get format */
2124 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2125 format = old_format;
2126
2127 /* set master/slave audio interface */
2128 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002129 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002130 format &= ~(TWL4030_VIF_SLAVE_EN);
2131 break;
2132 case SND_SOC_DAIFMT_CBS_CFS:
2133 format |= TWL4030_VIF_SLAVE_EN;
2134 break;
2135 default:
2136 return -EINVAL;
2137 }
2138
2139 /* clock inversion */
2140 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2141 case SND_SOC_DAIFMT_IB_NF:
2142 format &= ~(TWL4030_VIF_FORMAT);
2143 break;
2144 case SND_SOC_DAIFMT_NB_IF:
2145 format |= TWL4030_VIF_FORMAT;
2146 break;
2147 default:
2148 return -EINVAL;
2149 }
2150
2151 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002152 if (twl4030->codec_powered) {
2153 /*
2154 * If the codec is powered, than we need to toggle the
2155 * codec power.
2156 */
2157 twl4030_codec_enable(codec, 0);
2158 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2159 twl4030_codec_enable(codec, 1);
2160 } else {
2161 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2162 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002163 }
2164
2165 return 0;
2166}
2167
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002168static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2169{
2170 struct snd_soc_codec *codec = dai->codec;
2171 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2172
2173 if (tristate)
2174 reg |= TWL4030_VIF_TRI_EN;
2175 else
2176 reg &= ~TWL4030_VIF_TRI_EN;
2177
2178 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2179}
2180
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002181#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Steve Sakomancc175572008-10-30 21:35:26 -07002182#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2183
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002184static struct snd_soc_dai_ops twl4030_dai_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002185 .startup = twl4030_startup,
2186 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002187 .hw_params = twl4030_hw_params,
2188 .set_sysclk = twl4030_set_dai_sysclk,
2189 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002190 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002191};
2192
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002193static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2194 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002195 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002196 .hw_params = twl4030_voice_hw_params,
2197 .set_sysclk = twl4030_voice_set_dai_sysclk,
2198 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002199 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002200};
2201
2202struct snd_soc_dai twl4030_dai[] = {
2203{
Steve Sakomancc175572008-10-30 21:35:26 -07002204 .name = "twl4030",
2205 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002206 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002207 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002208 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002209 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Steve Sakomancc175572008-10-30 21:35:26 -07002210 .formats = TWL4030_FORMATS,},
2211 .capture = {
2212 .stream_name = "Capture",
2213 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002214 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002215 .rates = TWL4030_RATES,
2216 .formats = TWL4030_FORMATS,},
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002217 .ops = &twl4030_dai_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002218},
2219{
2220 .name = "twl4030 Voice",
2221 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002222 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002223 .channels_min = 1,
2224 .channels_max = 1,
2225 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2226 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2227 .capture = {
2228 .stream_name = "Capture",
2229 .channels_min = 1,
2230 .channels_max = 2,
2231 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2232 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2233 .ops = &twl4030_dai_voice_ops,
2234},
Steve Sakomancc175572008-10-30 21:35:26 -07002235};
2236EXPORT_SYMBOL_GPL(twl4030_dai);
2237
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002238static int twl4030_soc_suspend(struct platform_device *pdev, pm_message_t state)
Steve Sakomancc175572008-10-30 21:35:26 -07002239{
2240 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002241 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002242
2243 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2244
2245 return 0;
2246}
2247
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002248static int twl4030_soc_resume(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002249{
2250 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002251 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002252
2253 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Steve Sakomancc175572008-10-30 21:35:26 -07002254 return 0;
2255}
2256
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002257static struct snd_soc_codec *twl4030_codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002258
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002259static int twl4030_soc_probe(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002260{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002261 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002262 struct snd_soc_codec *codec;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002263 int ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002264
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002265 BUG_ON(!twl4030_codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002266
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002267 codec = twl4030_codec;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002268 socdev->card->codec = codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002269
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03002270 twl4030_init_chip(pdev);
Peter Ujfalusi9da28c72009-05-22 10:13:15 +03002271
Steve Sakomancc175572008-10-30 21:35:26 -07002272 /* register pcms */
2273 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
2274 if (ret < 0) {
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002275 dev_err(&pdev->dev, "failed to create pcms\n");
2276 return ret;
Steve Sakomancc175572008-10-30 21:35:26 -07002277 }
2278
Ian Molton3e8e1952009-01-09 00:23:21 +00002279 snd_soc_add_controls(codec, twl4030_snd_controls,
2280 ARRAY_SIZE(twl4030_snd_controls));
Steve Sakomancc175572008-10-30 21:35:26 -07002281 twl4030_add_widgets(codec);
2282
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002283 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002284}
2285
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002286static int twl4030_soc_remove(struct platform_device *pdev)
Steve Sakomancc175572008-10-30 21:35:26 -07002287{
2288 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
Mark Brown6627a652009-01-23 22:55:23 +00002289 struct snd_soc_codec *codec = socdev->card->codec;
Steve Sakomancc175572008-10-30 21:35:26 -07002290
Peter Ujfalusia3a29b52010-05-26 11:38:21 +03002291 /* Reset registers to their chip default before leaving */
2292 twl4030_reset_registers(codec);
Peter Ujfalusi73939582009-01-29 14:57:50 +02002293 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusic6d1662b2009-01-08 15:52:43 +02002294 snd_soc_free_pcms(socdev);
2295 snd_soc_dapm_free(socdev);
Steve Sakomancc175572008-10-30 21:35:26 -07002296
2297 return 0;
2298}
2299
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002300static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2301{
2302 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2303 struct snd_soc_codec *codec;
2304 struct twl4030_priv *twl4030;
2305 int ret;
2306
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002307 if (!pdata) {
2308 dev_err(&pdev->dev, "platform_data is missing\n");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002309 return -EINVAL;
2310 }
2311
2312 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2313 if (twl4030 == NULL) {
2314 dev_err(&pdev->dev, "Can not allocate memroy\n");
2315 return -ENOMEM;
2316 }
2317
2318 codec = &twl4030->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09002319 snd_soc_codec_set_drvdata(codec, twl4030);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002320 codec->dev = &pdev->dev;
2321 twl4030_dai[0].dev = &pdev->dev;
2322 twl4030_dai[1].dev = &pdev->dev;
2323
2324 mutex_init(&codec->mutex);
2325 INIT_LIST_HEAD(&codec->dapm_widgets);
2326 INIT_LIST_HEAD(&codec->dapm_paths);
2327
2328 codec->name = "twl4030";
2329 codec->owner = THIS_MODULE;
2330 codec->read = twl4030_read_reg_cache;
2331 codec->write = twl4030_write;
2332 codec->set_bias_level = twl4030_set_bias_level;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002333 codec->idle_bias_off = 1;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002334 codec->dai = twl4030_dai;
Peter Ujfalusifd63df22010-01-13 12:37:49 +02002335 codec->num_dai = ARRAY_SIZE(twl4030_dai);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002336 codec->reg_cache_size = sizeof(twl4030_reg);
2337 codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
2338 GFP_KERNEL);
2339 if (codec->reg_cache == NULL) {
2340 ret = -ENOMEM;
2341 goto error_cache;
2342 }
2343
2344 platform_set_drvdata(pdev, twl4030);
2345 twl4030_codec = codec;
2346
2347 /* Set the defaults, and power up the codec */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002348 twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
Peter Ujfalusib3f5a272009-11-02 14:34:54 +02002349 codec->bias_level = SND_SOC_BIAS_OFF;
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002350
2351 ret = snd_soc_register_codec(codec);
2352 if (ret != 0) {
2353 dev_err(codec->dev, "Failed to register codec: %d\n", ret);
2354 goto error_codec;
2355 }
2356
2357 ret = snd_soc_register_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2358 if (ret != 0) {
2359 dev_err(codec->dev, "Failed to register DAIs: %d\n", ret);
2360 snd_soc_unregister_codec(codec);
2361 goto error_codec;
2362 }
2363
2364 return 0;
2365
2366error_codec:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03002367 twl4030_codec_enable(codec, 0);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002368 kfree(codec->reg_cache);
2369error_cache:
2370 kfree(twl4030);
2371 return ret;
2372}
2373
2374static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2375{
2376 struct twl4030_priv *twl4030 = platform_get_drvdata(pdev);
2377
Peter Ujfalusicb672862010-02-04 09:10:10 +02002378 snd_soc_unregister_dais(&twl4030_dai[0], ARRAY_SIZE(twl4030_dai));
2379 snd_soc_unregister_codec(&twl4030->codec);
2380 kfree(twl4030->codec.reg_cache);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002381 kfree(twl4030);
2382
2383 twl4030_codec = NULL;
2384 return 0;
2385}
2386
2387MODULE_ALIAS("platform:twl4030_codec_audio");
2388
2389static struct platform_driver twl4030_codec_driver = {
2390 .probe = twl4030_codec_probe,
2391 .remove = __devexit_p(twl4030_codec_remove),
2392 .driver = {
2393 .name = "twl4030_codec_audio",
2394 .owner = THIS_MODULE,
2395 },
Steve Sakomancc175572008-10-30 21:35:26 -07002396};
Steve Sakomancc175572008-10-30 21:35:26 -07002397
Takashi Iwai24e07db2008-12-10 07:40:24 +01002398static int __init twl4030_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +00002399{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002400 return platform_driver_register(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002401}
Takashi Iwai24e07db2008-12-10 07:40:24 +01002402module_init(twl4030_modinit);
Mark Brown64089b82008-12-08 19:17:58 +00002403
2404static void __exit twl4030_exit(void)
2405{
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002406 platform_driver_unregister(&twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002407}
2408module_exit(twl4030_exit);
2409
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002410struct snd_soc_codec_device soc_codec_dev_twl4030 = {
2411 .probe = twl4030_soc_probe,
2412 .remove = twl4030_soc_remove,
2413 .suspend = twl4030_soc_suspend,
2414 .resume = twl4030_soc_resume,
2415};
2416EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
2417
Steve Sakomancc175572008-10-30 21:35:26 -07002418MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2419MODULE_AUTHOR("Steve Sakoman");
2420MODULE_LICENSE("GPL");