blob: a47327fe162c1c6da7fea7bfdcb9d6e41de2f63f [file] [log] [blame]
Erich Chen1c57e862006-07-12 08:59:32 -07001/*
2*******************************************************************************
3** O.S : Linux
4** FILE NAME : arcmsr_hba.c
NickCheng97b99122011-01-06 17:32:41 +08005** BY : Nick Cheng
Erich Chen1c57e862006-07-12 08:59:32 -07006** Description: SCSI RAID Device Driver for
7** ARECA RAID Host adapter
8*******************************************************************************
9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10**
11** Web site: www.areca.com.tw
Nick Cheng1a4f5502007-09-13 17:26:40 +080012** E-mail: support@areca.com.tw
Erich Chen1c57e862006-07-12 08:59:32 -070013**
14** This program is free software; you can redistribute it and/or modify
15** it under the terms of the GNU General Public License version 2 as
16** published by the Free Software Foundation.
17** This program is distributed in the hope that it will be useful,
18** but WITHOUT ANY WARRANTY; without even the implied warranty of
19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20** GNU General Public License for more details.
21*******************************************************************************
22** Redistribution and use in source and binary forms, with or without
23** modification, are permitted provided that the following conditions
24** are met:
25** 1. Redistributions of source code must retain the above copyright
26** notice, this list of conditions and the following disclaimer.
27** 2. Redistributions in binary form must reproduce the above copyright
28** notice, this list of conditions and the following disclaimer in the
29** documentation and/or other materials provided with the distribution.
30** 3. The name of the author may not be used to endorse or promote products
31** derived from this software without specific prior written permission.
32**
33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43*******************************************************************************
44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46*******************************************************************************
47*/
48#include <linux/module.h>
49#include <linux/reboot.h>
50#include <linux/spinlock.h>
51#include <linux/pci_ids.h>
52#include <linux/interrupt.h>
53#include <linux/moduleparam.h>
54#include <linux/errno.h>
55#include <linux/types.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/timer.h>
David Millera7c89622010-08-16 21:20:07 -070059#include <linux/slab.h>
Erich Chen1c57e862006-07-12 08:59:32 -070060#include <linux/pci.h>
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +080061#include <linux/aer.h>
Erich Chen1c57e862006-07-12 08:59:32 -070062#include <asm/dma.h>
63#include <asm/io.h>
64#include <asm/system.h>
65#include <asm/uaccess.h>
66#include <scsi/scsi_host.h>
67#include <scsi/scsi.h>
68#include <scsi/scsi_cmnd.h>
69#include <scsi/scsi_tcq.h>
70#include <scsi/scsi_device.h>
71#include <scsi/scsi_transport.h>
72#include <scsi/scsicam.h>
73#include "arcmsr.h"
Nick Chengae52e7f2010-06-18 15:39:12 +080074MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
Nick Chengcdd3cb12010-07-13 20:03:04 +080075MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
Erich Chen1c57e862006-07-12 08:59:32 -070076MODULE_LICENSE("Dual BSD/GPL");
77MODULE_VERSION(ARCMSR_DRIVER_VERSION);
Tomas Henzl8b7eb862011-04-29 16:28:24 +020078
79#define ARCMSR_SLEEPTIME 10
80#define ARCMSR_RETRYCOUNT 12
81
Nick Chengae52e7f2010-06-18 15:39:12 +080082wait_queue_head_t wait_q;
Nick Cheng1a4f5502007-09-13 17:26:40 +080083static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
84 struct scsi_cmnd *cmd);
85static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070086static int arcmsr_abort(struct scsi_cmnd *);
87static int arcmsr_bus_reset(struct scsi_cmnd *);
88static int arcmsr_bios_param(struct scsi_device *sdev,
Nick Cheng1a4f5502007-09-13 17:26:40 +080089 struct block_device *bdev, sector_t capacity, int *info);
Jeff Garzikf2812332010-11-16 02:10:29 -050090static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
Erich Chen1c57e862006-07-12 08:59:32 -070091static int arcmsr_probe(struct pci_dev *pdev,
92 const struct pci_device_id *id);
93static void arcmsr_remove(struct pci_dev *pdev);
94static void arcmsr_shutdown(struct pci_dev *pdev);
95static void arcmsr_iop_init(struct AdapterControlBlock *acb);
96static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080097static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070098static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080099static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
100static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800101static void arcmsr_request_device_map(unsigned long pacb);
102static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
103static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800104static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800105static void arcmsr_message_isr_bh_fn(struct work_struct *work);
Nick Chengae52e7f2010-06-18 15:39:12 +0800106static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800107static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800108static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
109static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700110static const char *arcmsr_info(struct Scsi_Host *);
111static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800112static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
Mike Christiee881a172009-10-15 17:46:39 -0700113 int queue_depth, int reason)
Erich Chen1c57e862006-07-12 08:59:32 -0700114{
Mike Christiee881a172009-10-15 17:46:39 -0700115 if (reason != SCSI_QDEPTH_DEFAULT)
116 return -EOPNOTSUPP;
117
Erich Chen1c57e862006-07-12 08:59:32 -0700118 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
119 queue_depth = ARCMSR_MAX_CMD_PERLUN;
120 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
121 return queue_depth;
122}
123
124static struct scsi_host_template arcmsr_scsi_host_template = {
125 .module = THIS_MODULE,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800126 .name = "ARCMSR ARECA SATA/SAS RAID Controller"
127 ARCMSR_DRIVER_VERSION,
Erich Chen1c57e862006-07-12 08:59:32 -0700128 .info = arcmsr_info,
129 .queuecommand = arcmsr_queue_command,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800130 .eh_abort_handler = arcmsr_abort,
Erich Chen1c57e862006-07-12 08:59:32 -0700131 .eh_bus_reset_handler = arcmsr_bus_reset,
132 .bios_param = arcmsr_bios_param,
133 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
Nick Chengae52e7f2010-06-18 15:39:12 +0800134 .can_queue = ARCMSR_MAX_FREECCB_NUM,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800135 .this_id = ARCMSR_SCSI_INITIATOR_ID,
136 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
137 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
Erich Chen1c57e862006-07-12 08:59:32 -0700138 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
139 .use_clustering = ENABLE_CLUSTERING,
140 .shost_attrs = arcmsr_host_attrs,
141};
Erich Chen1c57e862006-07-12 08:59:32 -0700142static struct pci_device_id arcmsr_device_id_table[] = {
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
Nick Cheng1a4f5502007-09-13 17:26:40 +0800148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
Erich Chen1c57e862006-07-12 08:59:32 -0700151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
Nick Chengae52e7f2010-06-18 15:39:12 +0800161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
Erich Chen1c57e862006-07-12 08:59:32 -0700162 {0, 0}, /* Terminating entry */
163};
164MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
165static struct pci_driver arcmsr_pci_driver = {
166 .name = "arcmsr",
Nick Chengcdd3cb12010-07-13 20:03:04 +0800167 .id_table = arcmsr_device_id_table,
Erich Chen1c57e862006-07-12 08:59:32 -0700168 .probe = arcmsr_probe,
169 .remove = arcmsr_remove,
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +0800170 .shutdown = arcmsr_shutdown,
Erich Chen1c57e862006-07-12 08:59:32 -0700171};
Nick Chengcdd3cb12010-07-13 20:03:04 +0800172/*
173****************************************************************************
174****************************************************************************
175*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800176
177static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
Nick Chengae52e7f2010-06-18 15:39:12 +0800178{
179 switch (acb->adapter_type) {
180 case ACB_ADAPTER_TYPE_A:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800181 case ACB_ADAPTER_TYPE_C:
Nick Chengae52e7f2010-06-18 15:39:12 +0800182 break;
183 case ACB_ADAPTER_TYPE_B:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800184 dma_free_coherent(&acb->pdev->dev,
185 sizeof(struct MessageUnit_B),
186 acb->pmuB, acb->dma_coherent_handle_hbb_mu);
Nick Chengae52e7f2010-06-18 15:39:12 +0800187 }
188 }
189}
190
191static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
192{
193 struct pci_dev *pdev = acb->pdev;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800194 switch (acb->adapter_type){
Nick Chengae52e7f2010-06-18 15:39:12 +0800195 case ACB_ADAPTER_TYPE_A:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800196 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
Nick Chengae52e7f2010-06-18 15:39:12 +0800197 if (!acb->pmuA) {
198 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
199 return false;
200 }
201 break;
202 }
203 case ACB_ADAPTER_TYPE_B:{
204 void __iomem *mem_base0, *mem_base1;
205 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
206 if (!mem_base0) {
207 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
208 return false;
209 }
210 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
211 if (!mem_base1) {
212 iounmap(mem_base0);
213 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
214 return false;
215 }
216 acb->mem_base0 = mem_base0;
217 acb->mem_base1 = mem_base1;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800218 break;
219 }
220 case ACB_ADAPTER_TYPE_C:{
221 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
222 if (!acb->pmuC) {
223 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
224 return false;
225 }
226 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
227 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
228 return true;
229 }
230 break;
Nick Chengae52e7f2010-06-18 15:39:12 +0800231 }
232 }
233 return true;
234}
235
236static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
237{
238 switch (acb->adapter_type) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800239 case ACB_ADAPTER_TYPE_A:{
240 iounmap(acb->pmuA);
241 }
242 break;
243 case ACB_ADAPTER_TYPE_B:{
244 iounmap(acb->mem_base0);
245 iounmap(acb->mem_base1);
246 }
247
248 break;
249 case ACB_ADAPTER_TYPE_C:{
250 iounmap(acb->pmuC);
251 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800252 }
253}
254
David Howells7d12e782006-10-05 14:55:46 +0100255static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
Erich Chen1c57e862006-07-12 08:59:32 -0700256{
257 irqreturn_t handle_state;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800258 struct AdapterControlBlock *acb = dev_id;
Erich Chen1c57e862006-07-12 08:59:32 -0700259
Erich Chen1c57e862006-07-12 08:59:32 -0700260 handle_state = arcmsr_interrupt(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700261 return handle_state;
262}
263
264static int arcmsr_bios_param(struct scsi_device *sdev,
265 struct block_device *bdev, sector_t capacity, int *geom)
266{
267 int ret, heads, sectors, cylinders, total_capacity;
268 unsigned char *buffer;/* return copy of block device's partition table */
269
270 buffer = scsi_bios_ptable(bdev);
271 if (buffer) {
272 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
273 kfree(buffer);
274 if (ret != -1)
275 return ret;
276 }
277 total_capacity = capacity;
278 heads = 64;
279 sectors = 32;
280 cylinders = total_capacity / (heads * sectors);
281 if (cylinders > 1024) {
282 heads = 255;
283 sectors = 63;
284 cylinders = total_capacity / (heads * sectors);
285 }
286 geom[0] = heads;
287 geom[1] = sectors;
288 geom[2] = cylinders;
289 return 0;
290}
291
Nick Cheng1a4f5502007-09-13 17:26:40 +0800292static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -0700293{
294 struct pci_dev *pdev = acb->pdev;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800295 u16 dev_id;
296 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
Nick Chengae52e7f2010-06-18 15:39:12 +0800297 acb->dev_id = dev_id;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800298 switch (dev_id) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800299 case 0x1880: {
300 acb->adapter_type = ACB_ADAPTER_TYPE_C;
301 }
302 break;
303 case 0x1201: {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800304 acb->adapter_type = ACB_ADAPTER_TYPE_B;
305 }
306 break;
Erich Chen1c57e862006-07-12 08:59:32 -0700307
Nick Chengcdd3cb12010-07-13 20:03:04 +0800308 default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800309 }
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200310}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800311
Nick Chengae52e7f2010-06-18 15:39:12 +0800312static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800313{
Nick Chengae52e7f2010-06-18 15:39:12 +0800314 struct MessageUnit_A __iomem *reg = acb->pmuA;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200315 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800316
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200317 for (i = 0; i < 2000; i++) {
318 if (readl(&reg->outbound_intstatus) &
319 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
320 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
321 &reg->outbound_intstatus);
322 return true;
323 }
324 msleep(10);
325 } /* max 20 seconds */
326
Nick Chengcdd3cb12010-07-13 20:03:04 +0800327 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800328}
329
330static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
331{
332 struct MessageUnit_B *reg = acb->pmuB;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200333 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +0800334
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200335 for (i = 0; i < 2000; i++) {
336 if (readl(reg->iop2drv_doorbell)
337 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
338 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
339 reg->iop2drv_doorbell);
340 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
341 reg->drv2iop_doorbell);
342 return true;
343 }
344 msleep(10);
345 } /* max 20 seconds */
346
Nick Chengcdd3cb12010-07-13 20:03:04 +0800347 return false;
Nick Chengae52e7f2010-06-18 15:39:12 +0800348}
349
Nick Chengcdd3cb12010-07-13 20:03:04 +0800350static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
351{
352 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200353 int i;
354
355 for (i = 0; i < 2000; i++) {
356 if (readl(&phbcmu->outbound_doorbell)
357 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
358 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
359 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
360 return true;
361 }
362 msleep(10);
363 } /* max 20 seconds */
364
Nick Chengcdd3cb12010-07-13 20:03:04 +0800365 return false;
366}
Tomas Henzl8b7eb862011-04-29 16:28:24 +0200367
Nick Chengae52e7f2010-06-18 15:39:12 +0800368static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
369{
370 struct MessageUnit_A __iomem *reg = acb->pmuA;
371 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800372 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
373 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800374 if (arcmsr_hba_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800375 break;
376 else {
377 retry_count--;
378 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
379 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
380 }
381 } while (retry_count != 0);
382}
383
384static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
385{
386 struct MessageUnit_B *reg = acb->pmuB;
387 int retry_count = 30;
Nick Chengae52e7f2010-06-18 15:39:12 +0800388 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
389 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800390 if (arcmsr_hbb_wait_msgint_ready(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800391 break;
392 else {
393 retry_count--;
394 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
395 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
396 }
397 } while (retry_count != 0);
398}
399
Nick Chengcdd3cb12010-07-13 20:03:04 +0800400static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
401{
402 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
403 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
404 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
405 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
406 do {
407 if (arcmsr_hbc_wait_msgint_ready(pACB)) {
408 break;
409 } else {
410 retry_count--;
411 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
412 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
413 }
414 } while (retry_count != 0);
415 return;
416}
Nick Chengae52e7f2010-06-18 15:39:12 +0800417static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
418{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800419 switch (acb->adapter_type) {
420
421 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800422 arcmsr_flush_hba_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800423 }
424 break;
425
426 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +0800427 arcmsr_flush_hbb_cache(acb);
428 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800429 break;
430 case ACB_ADAPTER_TYPE_C: {
431 arcmsr_flush_hbc_cache(acb);
432 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800433 }
434}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800435
Nick Chengae52e7f2010-06-18 15:39:12 +0800436static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
437{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800438 struct pci_dev *pdev = acb->pdev;
439 void *dma_coherent;
440 dma_addr_t dma_coherent_handle;
441 struct CommandControlBlock *ccb_tmp;
442 int i = 0, j = 0;
443 dma_addr_t cdb_phyaddr;
444 unsigned long roundup_ccbsize = 0, offset;
445 unsigned long max_xfer_len;
446 unsigned long max_sg_entrys;
447 uint32_t firm_config_version;
448 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
449 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
450 acb->devstate[i][j] = ARECA_RAID_GONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800451
Nick Chengcdd3cb12010-07-13 20:03:04 +0800452 max_xfer_len = ARCMSR_MAX_XFER_LEN;
453 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
454 firm_config_version = acb->firm_cfg_version;
455 if((firm_config_version & 0xFF) >= 3){
456 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
457 max_sg_entrys = (max_xfer_len/4096);
458 }
459 acb->host->max_sectors = max_xfer_len/512;
460 acb->host->sg_tablesize = max_sg_entrys;
461 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
462 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32;
463 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
464 if(!dma_coherent){
465 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no);
466 return -ENOMEM;
467 }
468 acb->dma_coherent = dma_coherent;
469 acb->dma_coherent_handle = dma_coherent_handle;
470 memset(dma_coherent, 0, acb->uncache_size);
471 offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent;
472 dma_coherent_handle = dma_coherent_handle + offset;
473 dma_coherent = (struct CommandControlBlock *)dma_coherent + offset;
474 ccb_tmp = dma_coherent;
475 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
476 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
477 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
478 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
479 acb->pccb_pool[i] = ccb_tmp;
480 ccb_tmp->acb = acb;
481 INIT_LIST_HEAD(&ccb_tmp->list);
482 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
483 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
484 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
Erich Chen1c57e862006-07-12 08:59:32 -0700485 }
Erich Chen1c57e862006-07-12 08:59:32 -0700486 return 0;
487}
Nick Cheng36b83de2010-05-17 11:22:42 +0800488
Nick Chengcdd3cb12010-07-13 20:03:04 +0800489static void arcmsr_message_isr_bh_fn(struct work_struct *work)
490{
491 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +0800492 switch (acb->adapter_type) {
493 case ACB_ADAPTER_TYPE_A: {
494
495 struct MessageUnit_A __iomem *reg = acb->pmuA;
496 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800497 uint32_t __iomem *signature = (uint32_t __iomem*) (&reg->message_rwbuffer[0]);
498 char __iomem *devicemap = (char __iomem*) (&reg->message_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800499 int target, lun;
500 struct scsi_device *psdev;
501 char diff;
502
503 atomic_inc(&acb->rq_map_token);
504 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800505 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800506 diff = (*acb_dev_map)^readb(devicemap);
507 if (diff != 0) {
508 char temp;
509 *acb_dev_map = readb(devicemap);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800510 temp =*acb_dev_map;
511 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
512 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800513 scsi_add_device(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800514 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800515 psdev = scsi_device_lookup(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800516 if (psdev != NULL ) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800517 scsi_remove_device(psdev);
518 scsi_device_put(psdev);
519 }
520 }
521 temp >>= 1;
522 diff >>= 1;
523 }
524 }
525 devicemap++;
526 acb_dev_map++;
527 }
528 }
529 break;
530 }
531
532 case ACB_ADAPTER_TYPE_B: {
533 struct MessageUnit_B *reg = acb->pmuB;
534 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800535 uint32_t __iomem *signature = (uint32_t __iomem*)(&reg->message_rwbuffer[0]);
536 char __iomem *devicemap = (char __iomem*)(&reg->message_rwbuffer[21]);
537 int target, lun;
538 struct scsi_device *psdev;
539 char diff;
540
541 atomic_inc(&acb->rq_map_token);
542 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
543 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
544 diff = (*acb_dev_map)^readb(devicemap);
545 if (diff != 0) {
546 char temp;
547 *acb_dev_map = readb(devicemap);
548 temp =*acb_dev_map;
549 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
550 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
551 scsi_add_device(acb->host, 0, target, lun);
552 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
553 psdev = scsi_device_lookup(acb->host, 0, target, lun);
554 if (psdev != NULL ) {
555 scsi_remove_device(psdev);
556 scsi_device_put(psdev);
557 }
558 }
559 temp >>= 1;
560 diff >>= 1;
561 }
562 }
563 devicemap++;
564 acb_dev_map++;
565 }
566 }
567 }
568 break;
569 case ACB_ADAPTER_TYPE_C: {
570 struct MessageUnit_C *reg = acb->pmuC;
571 char *acb_dev_map = (char *)acb->device_map;
572 uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
573 char __iomem *devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800574 int target, lun;
575 struct scsi_device *psdev;
576 char diff;
577
578 atomic_inc(&acb->rq_map_token);
579 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
580 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
581 diff = (*acb_dev_map)^readb(devicemap);
582 if (diff != 0) {
583 char temp;
584 *acb_dev_map = readb(devicemap);
585 temp = *acb_dev_map;
586 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
587 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
588 scsi_add_device(acb->host, 0, target, lun);
589 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
590 psdev = scsi_device_lookup(acb->host, 0, target, lun);
591 if (psdev != NULL) {
592 scsi_remove_device(psdev);
593 scsi_device_put(psdev);
594 }
595 }
596 temp >>= 1;
597 diff >>= 1;
598 }
599 }
600 devicemap++;
601 acb_dev_map++;
602 }
603 }
604 }
605 }
606}
Erich Chen1c57e862006-07-12 08:59:32 -0700607
Nick Chengae52e7f2010-06-18 15:39:12 +0800608static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
Erich Chen1c57e862006-07-12 08:59:32 -0700609{
610 struct Scsi_Host *host;
611 struct AdapterControlBlock *acb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800612 uint8_t bus,dev_fun;
Erich Chen1c57e862006-07-12 08:59:32 -0700613 int error;
Erich Chen1c57e862006-07-12 08:59:32 -0700614 error = pci_enable_device(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800615 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800616 return -ENODEV;
Erich Chen1c57e862006-07-12 08:59:32 -0700617 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800618 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800619 if(!host){
620 goto pci_disable_dev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800621 }
Yang Hongyang6a355282009-04-06 19:01:13 -0700622 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800623 if(error){
Yang Hongyang284901a2009-04-06 19:01:15 -0700624 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800625 if(error){
Erich Chen1c57e862006-07-12 08:59:32 -0700626 printk(KERN_WARNING
627 "scsi%d: No suitable DMA mask available\n",
628 host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +0800629 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700630 }
631 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800632 init_waitqueue_head(&wait_q);
Erich Chen1c57e862006-07-12 08:59:32 -0700633 bus = pdev->bus->number;
634 dev_fun = pdev->devfn;
Nick Chengae52e7f2010-06-18 15:39:12 +0800635 acb = (struct AdapterControlBlock *) host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800636 memset(acb,0,sizeof(struct AdapterControlBlock));
Erich Chen1c57e862006-07-12 08:59:32 -0700637 acb->pdev = pdev;
Nick Chengae52e7f2010-06-18 15:39:12 +0800638 acb->host = host;
Erich Chen1c57e862006-07-12 08:59:32 -0700639 host->max_lun = ARCMSR_MAX_TARGETLUN;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800640 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
641 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
642 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
643 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
Erich Chen1c57e862006-07-12 08:59:32 -0700644 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
645 host->unique_id = (bus << 8) | dev_fun;
Nick Chengae52e7f2010-06-18 15:39:12 +0800646 pci_set_drvdata(pdev, host);
647 pci_set_master(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -0700648 error = pci_request_regions(pdev, "arcmsr");
Nick Chengcdd3cb12010-07-13 20:03:04 +0800649 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800650 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700651 }
Nick Chengae52e7f2010-06-18 15:39:12 +0800652 spin_lock_init(&acb->eh_lock);
653 spin_lock_init(&acb->ccblist_lock);
Erich Chen1c57e862006-07-12 08:59:32 -0700654 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
Nick Chengcdd3cb12010-07-13 20:03:04 +0800655 ACB_F_MESSAGE_RQBUFFER_CLEARED |
656 ACB_F_MESSAGE_WQBUFFER_READED);
Erich Chen1c57e862006-07-12 08:59:32 -0700657 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
658 INIT_LIST_HEAD(&acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +0800659 arcmsr_define_adapter_type(acb);
660 error = arcmsr_remap_pciregion(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800661 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800662 goto pci_release_regs;
663 }
664 error = arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800665 if(!error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800666 goto unmap_pci_region;
667 }
Erich Chen1c57e862006-07-12 08:59:32 -0700668 error = arcmsr_alloc_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800669 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800670 goto free_hbb_mu;
671 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800672 arcmsr_iop_init(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700673 error = scsi_add_host(host, &pdev->dev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800674 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800675 goto RAID_controller_stop;
676 }
677 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800678 if(error){
Nick Chengae52e7f2010-06-18 15:39:12 +0800679 goto scsi_host_remove;
680 }
681 host->irq = pdev->irq;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800682 scsi_scan_host(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800683 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
Nick Cheng36b83de2010-05-17 11:22:42 +0800684 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +0800685 atomic_set(&acb->ante_token_value, 16);
686 acb->fw_flag = FW_NORMAL;
Nick Cheng36b83de2010-05-17 11:22:42 +0800687 init_timer(&acb->eternal_timer);
Nick Chengae52e7f2010-06-18 15:39:12 +0800688 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
Nick Cheng36b83de2010-05-17 11:22:42 +0800689 acb->eternal_timer.data = (unsigned long) acb;
690 acb->eternal_timer.function = &arcmsr_request_device_map;
691 add_timer(&acb->eternal_timer);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800692 if(arcmsr_alloc_sysfs_attr(acb))
Nick Chengae52e7f2010-06-18 15:39:12 +0800693 goto out_free_sysfs;
Erich Chen1c57e862006-07-12 08:59:32 -0700694 return 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800695out_free_sysfs:
Nick Chengae52e7f2010-06-18 15:39:12 +0800696scsi_host_remove:
697 scsi_remove_host(host);
698RAID_controller_stop:
699 arcmsr_stop_adapter_bgrb(acb);
700 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700701 arcmsr_free_ccb_pool(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800702free_hbb_mu:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800703 arcmsr_free_hbb_mu(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800704unmap_pci_region:
705 arcmsr_unmap_pciregion(acb);
706pci_release_regs:
Erich Chen1c57e862006-07-12 08:59:32 -0700707 pci_release_regions(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800708scsi_host_release:
Erich Chen1c57e862006-07-12 08:59:32 -0700709 scsi_host_put(host);
Nick Chengae52e7f2010-06-18 15:39:12 +0800710pci_disable_dev:
Erich Chen1c57e862006-07-12 08:59:32 -0700711 pci_disable_device(pdev);
Nick Chengae52e7f2010-06-18 15:39:12 +0800712 return -ENODEV;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800713}
714
Nick Cheng36b83de2010-05-17 11:22:42 +0800715static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800716{
Al Viro80da1ad2007-10-29 05:08:28 +0000717 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -0700718 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800719 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Erich Chen1c57e862006-07-12 08:59:32 -0700720 printk(KERN_NOTICE
721 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
722 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800723 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800724 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800725 return true;
Erich Chen1c57e862006-07-12 08:59:32 -0700726}
727
Nick Cheng36b83de2010-05-17 11:22:42 +0800728static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800729{
Al Viro80da1ad2007-10-29 05:08:28 +0000730 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800731
Nick Chengae52e7f2010-06-18 15:39:12 +0800732 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800733 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800734 printk(KERN_NOTICE
735 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
736 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800737 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800738 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800739 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800740}
Nick Chengcdd3cb12010-07-13 20:03:04 +0800741static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
742{
743 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
744 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
745 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
746 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
747 printk(KERN_NOTICE
748 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
749 , pACB->host->host_no);
750 return false;
751 }
752 return true;
753}
Nick Cheng36b83de2010-05-17 11:22:42 +0800754static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800755{
Nick Cheng36b83de2010-05-17 11:22:42 +0800756 uint8_t rtnval = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800757 switch (acb->adapter_type) {
758 case ACB_ADAPTER_TYPE_A: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800759 rtnval = arcmsr_abort_hba_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800760 }
761 break;
762
763 case ACB_ADAPTER_TYPE_B: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800764 rtnval = arcmsr_abort_hbb_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800765 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800766 break;
767
768 case ACB_ADAPTER_TYPE_C: {
769 rtnval = arcmsr_abort_hbc_allcmd(acb);
770 }
Nick Cheng1a4f5502007-09-13 17:26:40 +0800771 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800772 return rtnval;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800773}
774
Nick Chengae52e7f2010-06-18 15:39:12 +0800775static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
776{
777 struct MessageUnit_B *reg = pacb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +0800778 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800779 if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +0800780 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
781 return false;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800782 }
783 return true;
Nick Chengae52e7f2010-06-18 15:39:12 +0800784}
785
Erich Chen1c57e862006-07-12 08:59:32 -0700786static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
787{
Erich Chen1c57e862006-07-12 08:59:32 -0700788 struct scsi_cmnd *pcmd = ccb->pcmd;
789
FUJITA Tomonorideff2622007-05-14 19:25:56 +0900790 scsi_dma_unmap(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800791}
Erich Chen1c57e862006-07-12 08:59:32 -0700792
Nick Chengae52e7f2010-06-18 15:39:12 +0800793static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
Erich Chen1c57e862006-07-12 08:59:32 -0700794{
795 struct AdapterControlBlock *acb = ccb->acb;
796 struct scsi_cmnd *pcmd = ccb->pcmd;
Nick Chengae52e7f2010-06-18 15:39:12 +0800797 unsigned long flags;
Nick Chengae52e7f2010-06-18 15:39:12 +0800798 atomic_dec(&acb->ccboutstandingcount);
Erich Chen1c57e862006-07-12 08:59:32 -0700799 arcmsr_pci_unmap_dma(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -0700800 ccb->startdone = ARCMSR_CCB_DONE;
Nick Chengae52e7f2010-06-18 15:39:12 +0800801 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700802 list_add_tail(&ccb->list, &acb->ccb_free_list);
Nick Chengae52e7f2010-06-18 15:39:12 +0800803 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700804 pcmd->scsi_done(pcmd);
805}
806
Nick Cheng1a4f5502007-09-13 17:26:40 +0800807static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
808{
809
810 struct scsi_cmnd *pcmd = ccb->pcmd;
811 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800812 pcmd->result = DID_OK << 16;
813 if (sensebuffer) {
814 int sense_data_length =
FUJITA Tomonorib80ca4f2008-01-13 15:46:13 +0900815 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
816 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
817 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800818 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
819 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
820 sensebuffer->Valid = 1;
821 }
822}
823
824static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
825{
826 u32 orig_mask = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800827 switch (acb->adapter_type) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800828 case ACB_ADAPTER_TYPE_A : {
Al Viro80da1ad2007-10-29 05:08:28 +0000829 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +0800830 orig_mask = readl(&reg->outbound_intmask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800831 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
832 &reg->outbound_intmask);
833 }
834 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800835 case ACB_ADAPTER_TYPE_B : {
Al Viro80da1ad2007-10-29 05:08:28 +0000836 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +0800837 orig_mask = readl(reg->iop2drv_doorbell_mask);
838 writel(0, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800839 }
840 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800841 case ACB_ADAPTER_TYPE_C:{
842 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
843 /* disable all outbound interrupt */
844 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
845 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
846 }
847 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800848 }
849 return orig_mask;
850}
851
Nick Chengcdd3cb12010-07-13 20:03:04 +0800852static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
853 struct CommandControlBlock *ccb, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800854{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800855 uint8_t id, lun;
856 id = ccb->pcmd->device->id;
857 lun = ccb->pcmd->device->lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800858 if (!error) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800859 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
860 acb->devstate[id][lun] = ARECA_RAID_GOOD;
Julia Lawall7968f192010-08-05 22:19:36 +0200861 ccb->pcmd->result = DID_OK << 16;
862 arcmsr_ccb_complete(ccb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800863 }else{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800864 switch (ccb->arcmsr_cdb.DeviceStatus) {
865 case ARCMSR_DEV_SELECT_TIMEOUT: {
866 acb->devstate[id][lun] = ARECA_RAID_GONE;
867 ccb->pcmd->result = DID_NO_CONNECT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800868 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800869 }
870 break;
871
872 case ARCMSR_DEV_ABORTED:
873
874 case ARCMSR_DEV_INIT_FAIL: {
875 acb->devstate[id][lun] = ARECA_RAID_GONE;
876 ccb->pcmd->result = DID_BAD_TARGET << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +0800877 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800878 }
879 break;
880
881 case ARCMSR_DEV_CHECK_CONDITION: {
882 acb->devstate[id][lun] = ARECA_RAID_GOOD;
883 arcmsr_report_sense_info(ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +0800884 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800885 }
886 break;
887
888 default:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800889 printk(KERN_NOTICE
890 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
891 but got unknown DeviceStatus = 0x%x \n"
892 , acb->host->host_no
893 , id
894 , lun
895 , ccb->arcmsr_cdb.DeviceStatus);
896 acb->devstate[id][lun] = ARECA_RAID_GONE;
897 ccb->pcmd->result = DID_NO_CONNECT << 16;
898 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800899 break;
900 }
901 }
902}
903
Nick Chengcdd3cb12010-07-13 20:03:04 +0800904static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800905{
Nick Chengae52e7f2010-06-18 15:39:12 +0800906 int id, lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800907 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
908 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
909 struct scsi_cmnd *abortcmd = pCCB->pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800910 if (abortcmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +0800911 id = abortcmd->device->id;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800912 lun = abortcmd->device->lun;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800913 abortcmd->result |= DID_ABORT << 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800914 arcmsr_ccb_complete(pCCB);
915 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
916 acb->host->host_no, pCCB);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800917 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800918 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800919 }
920 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
921 done acb = '0x%p'"
922 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
923 " ccboutstandingcount = %d \n"
924 , acb->host->host_no
925 , acb
Nick Chengcdd3cb12010-07-13 20:03:04 +0800926 , pCCB
927 , pCCB->acb
928 , pCCB->startdone
Nick Cheng1a4f5502007-09-13 17:26:40 +0800929 , atomic_read(&acb->ccboutstandingcount));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800930 return;
NickCheng97b99122011-01-06 17:32:41 +0800931 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800932 arcmsr_report_ccb_state(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800933}
934
935static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
936{
937 int i = 0;
938 uint32_t flag_ccb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800939 struct ARCMSR_CDB *pARCMSR_CDB;
940 bool error;
941 struct CommandControlBlock *pCCB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800942 switch (acb->adapter_type) {
943
944 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +0000945 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800946 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +0000947 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Cheng1a4f5502007-09-13 17:26:40 +0800948 acb->outbound_int_enable;
949 /*clear and abort all outbound posted Q*/
950 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800951 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800952 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800953 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
954 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
955 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
956 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800957 }
958 }
959 break;
960
961 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +0000962 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800963 /*clear all outbound posted Q*/
NickCheng97b99122011-01-06 17:32:41 +0800964 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
Nick Cheng1a4f5502007-09-13 17:26:40 +0800965 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
966 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
967 writel(0, &reg->done_qbuffer[i]);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800968 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
969 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
970 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
971 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800972 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800973 reg->post_qbuffer[i] = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800974 }
975 reg->doneq_index = 0;
976 reg->postq_index = 0;
977 }
978 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800979 case ACB_ADAPTER_TYPE_C: {
980 struct MessageUnit_C *reg = acb->pmuC;
981 struct ARCMSR_CDB *pARCMSR_CDB;
982 uint32_t flag_ccb, ccb_cdb_phy;
983 bool error;
984 struct CommandControlBlock *pCCB;
985 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
986 /*need to do*/
987 flag_ccb = readl(&reg->outbound_queueport_low);
988 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
989 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
990 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
991 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
992 arcmsr_drain_donequeue(acb, pCCB, error);
993 }
994 }
Nick Cheng1a4f5502007-09-13 17:26:40 +0800995 }
996}
Erich Chen1c57e862006-07-12 08:59:32 -0700997static void arcmsr_remove(struct pci_dev *pdev)
998{
999 struct Scsi_Host *host = pci_get_drvdata(pdev);
1000 struct AdapterControlBlock *acb =
1001 (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07001002 int poll_count = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001003 arcmsr_free_sysfs_attr(acb);
1004 scsi_remove_host(host);
Tejun Heoa684b8d2011-01-24 14:57:28 +01001005 flush_work_sync(&acb->arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +08001006 del_timer_sync(&acb->eternal_timer);
1007 arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001008 arcmsr_stop_adapter_bgrb(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001009 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001010 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1011 acb->acb_flags &= ~ACB_F_IOP_INITED;
1012
Nick Chengcdd3cb12010-07-13 20:03:04 +08001013 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
Erich Chen1c57e862006-07-12 08:59:32 -07001014 if (!atomic_read(&acb->ccboutstandingcount))
1015 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001016 arcmsr_interrupt(acb);/* FIXME: need spinlock */
Erich Chen1c57e862006-07-12 08:59:32 -07001017 msleep(25);
1018 }
1019
1020 if (atomic_read(&acb->ccboutstandingcount)) {
1021 int i;
1022
1023 arcmsr_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001024 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001025 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1026 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1027 if (ccb->startdone == ARCMSR_CCB_START) {
1028 ccb->startdone = ARCMSR_CCB_ABORTED;
1029 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08001030 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07001031 }
1032 }
1033 }
Erich Chen1c57e862006-07-12 08:59:32 -07001034 free_irq(pdev->irq, acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001035 arcmsr_free_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001036 arcmsr_free_hbb_mu(acb);
1037 arcmsr_unmap_pciregion(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001038 pci_release_regions(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001039 scsi_host_put(host);
Erich Chen1c57e862006-07-12 08:59:32 -07001040 pci_disable_device(pdev);
1041 pci_set_drvdata(pdev, NULL);
1042}
1043
1044static void arcmsr_shutdown(struct pci_dev *pdev)
1045{
1046 struct Scsi_Host *host = pci_get_drvdata(pdev);
1047 struct AdapterControlBlock *acb =
1048 (struct AdapterControlBlock *)host->hostdata;
Nick Cheng36b83de2010-05-17 11:22:42 +08001049 del_timer_sync(&acb->eternal_timer);
1050 arcmsr_disable_outbound_ints(acb);
Tejun Heoa684b8d2011-01-24 14:57:28 +01001051 flush_work_sync(&acb->arcmsr_do_message_isr_bh);
Erich Chen1c57e862006-07-12 08:59:32 -07001052 arcmsr_stop_adapter_bgrb(acb);
1053 arcmsr_flush_adapter_cache(acb);
1054}
1055
1056static int arcmsr_module_init(void)
1057{
1058 int error = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001059 error = pci_register_driver(&arcmsr_pci_driver);
1060 return error;
1061}
1062
1063static void arcmsr_module_exit(void)
1064{
1065 pci_unregister_driver(&arcmsr_pci_driver);
1066}
1067module_init(arcmsr_module_init);
1068module_exit(arcmsr_module_exit);
1069
Nick Cheng36b83de2010-05-17 11:22:42 +08001070static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001071 u32 intmask_org)
Erich Chen1c57e862006-07-12 08:59:32 -07001072{
Erich Chen1c57e862006-07-12 08:59:32 -07001073 u32 mask;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001074 switch (acb->adapter_type) {
1075
Nick Chengcdd3cb12010-07-13 20:03:04 +08001076 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001077 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001078 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
Nick Cheng36b83de2010-05-17 11:22:42 +08001079 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1080 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001081 writel(mask, &reg->outbound_intmask);
1082 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1083 }
1084 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001085
Nick Chengcdd3cb12010-07-13 20:03:04 +08001086 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001087 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +08001088 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1089 ARCMSR_IOP2DRV_DATA_READ_OK |
1090 ARCMSR_IOP2DRV_CDB_DONE |
1091 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
Nick Chengae52e7f2010-06-18 15:39:12 +08001092 writel(mask, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001093 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1094 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001095 break;
1096 case ACB_ADAPTER_TYPE_C: {
1097 struct MessageUnit_C *reg = acb->pmuC;
1098 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1099 writel(intmask_org & mask, &reg->host_int_mask);
1100 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1101 }
Erich Chen1c57e862006-07-12 08:59:32 -07001102 }
1103}
1104
Nick Cheng76d78302008-02-04 23:53:24 -08001105static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07001106 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1107{
1108 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1109 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
Al Viro80da1ad2007-10-29 05:08:28 +00001110 __le32 address_lo, address_hi;
Erich Chen1c57e862006-07-12 08:59:32 -07001111 int arccdbsize = 0x30;
Nick Chengae52e7f2010-06-18 15:39:12 +08001112 __le32 length = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001113 int i;
Nick Chengae52e7f2010-06-18 15:39:12 +08001114 struct scatterlist *sg;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001115 int nseg;
Erich Chen1c57e862006-07-12 08:59:32 -07001116 ccb->pcmd = pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001117 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
Erich Chen1c57e862006-07-12 08:59:32 -07001118 arcmsr_cdb->TargetID = pcmd->device->id;
1119 arcmsr_cdb->LUN = pcmd->device->lun;
1120 arcmsr_cdb->Function = 1;
Nick Chengae52e7f2010-06-18 15:39:12 +08001121 arcmsr_cdb->Context = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001122 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
Erich Chen1c57e862006-07-12 08:59:32 -07001123
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001124 nseg = scsi_dma_map(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001125 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
Nick Cheng76d78302008-02-04 23:53:24 -08001126 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001127 scsi_for_each_sg(pcmd, sg, nseg, i) {
1128 /* Get the physical address of the current data pointer */
1129 length = cpu_to_le32(sg_dma_len(sg));
1130 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1131 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1132 if (address_hi == 0) {
1133 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001134
Nick Chengcdd3cb12010-07-13 20:03:04 +08001135 pdma_sg->address = address_lo;
1136 pdma_sg->length = length;
1137 psge += sizeof (struct SG32ENTRY);
1138 arccdbsize += sizeof (struct SG32ENTRY);
1139 } else {
1140 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001141
Nick Chengcdd3cb12010-07-13 20:03:04 +08001142 pdma_sg->addresshigh = address_hi;
1143 pdma_sg->address = address_lo;
1144 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1145 psge += sizeof (struct SG64ENTRY);
1146 arccdbsize += sizeof (struct SG64ENTRY);
Erich Chen1c57e862006-07-12 08:59:32 -07001147 }
Erich Chen1c57e862006-07-12 08:59:32 -07001148 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001149 arcmsr_cdb->sgcount = (uint8_t)nseg;
1150 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1151 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1152 if ( arccdbsize > 256)
1153 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
roel kluinc32e0612011-01-01 19:40:23 +01001154 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001155 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001156 ccb->arc_cdb_size = arccdbsize;
Nick Cheng76d78302008-02-04 23:53:24 -08001157 return SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07001158}
1159
1160static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1161{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001162 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
Erich Chen1c57e862006-07-12 08:59:32 -07001163 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07001164 atomic_inc(&acb->ccboutstandingcount);
1165 ccb->startdone = ARCMSR_CCB_START;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001166 switch (acb->adapter_type) {
1167 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001168 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001169
1170 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001171 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
Erich Chen1c57e862006-07-12 08:59:32 -07001172 &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001173 else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001174 writel(cdb_phyaddr_pattern, &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001175 }
1176 }
1177 break;
1178
1179 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001180 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001181 uint32_t ending_index, index = reg->postq_index;
1182
1183 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1184 writel(0, &reg->post_qbuffer[ending_index]);
1185 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001186 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
Nick Cheng1a4f5502007-09-13 17:26:40 +08001187 &reg->post_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001188 } else {
1189 writel(cdb_phyaddr_pattern, &reg->post_qbuffer[index]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001190 }
1191 index++;
1192 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1193 reg->postq_index = index;
Nick Chengae52e7f2010-06-18 15:39:12 +08001194 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001195 }
1196 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001197 case ACB_ADAPTER_TYPE_C: {
1198 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1199 uint32_t ccb_post_stamp, arc_cdb_size;
1200
1201 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1202 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
1203 if (acb->cdb_phyaddr_hi32) {
1204 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1205 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1206 } else {
1207 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1208 }
1209 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001210 }
Erich Chen1c57e862006-07-12 08:59:32 -07001211}
1212
Nick Cheng1a4f5502007-09-13 17:26:40 +08001213static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001214{
Al Viro80da1ad2007-10-29 05:08:28 +00001215 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001216 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1217 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001218 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001219 printk(KERN_NOTICE
1220 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1221 , acb->host->host_no);
1222 }
1223}
1224
1225static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1226{
Al Viro80da1ad2007-10-29 05:08:28 +00001227 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001228 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001229 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001230
Nick Chengcdd3cb12010-07-13 20:03:04 +08001231 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001232 printk(KERN_NOTICE
1233 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1234 , acb->host->host_no);
Erich Chen1c57e862006-07-12 08:59:32 -07001235 }
1236}
1237
Nick Chengcdd3cb12010-07-13 20:03:04 +08001238static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
1239{
1240 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1241 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1242 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1243 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1244 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
1245 printk(KERN_NOTICE
1246 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1247 , pACB->host->host_no);
1248 }
1249 return;
1250}
Erich Chen1c57e862006-07-12 08:59:32 -07001251static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1252{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001253 switch (acb->adapter_type) {
1254 case ACB_ADAPTER_TYPE_A: {
1255 arcmsr_stop_hba_bgrb(acb);
1256 }
1257 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001258
Nick Cheng1a4f5502007-09-13 17:26:40 +08001259 case ACB_ADAPTER_TYPE_B: {
1260 arcmsr_stop_hbb_bgrb(acb);
1261 }
1262 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001263 case ACB_ADAPTER_TYPE_C: {
1264 arcmsr_stop_hbc_bgrb(acb);
1265 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001266 }
Erich Chen1c57e862006-07-12 08:59:32 -07001267}
1268
1269static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1270{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001271 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
Erich Chen1c57e862006-07-12 08:59:32 -07001272}
1273
Nick Cheng1a4f5502007-09-13 17:26:40 +08001274void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001275{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001276 switch (acb->adapter_type) {
1277 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001278 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001279 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1280 }
1281 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001282
Nick Cheng1a4f5502007-09-13 17:26:40 +08001283 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001284 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001285 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001286 }
1287 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001288 case ACB_ADAPTER_TYPE_C: {
1289 struct MessageUnit_C __iomem *reg = acb->pmuC;
1290 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1291 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001292 }
1293}
1294
1295static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1296{
1297 switch (acb->adapter_type) {
1298 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001299 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001300 /*
1301 ** push inbound doorbell tell iop, driver data write ok
1302 ** and wait reply on next hwinterrupt for next Qbuffer post
1303 */
1304 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1305 }
1306 break;
1307
1308 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001309 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001310 /*
1311 ** push inbound doorbell tell iop, driver data write ok
1312 ** and wait reply on next hwinterrupt for next Qbuffer post
1313 */
Nick Chengae52e7f2010-06-18 15:39:12 +08001314 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001315 }
1316 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001317 case ACB_ADAPTER_TYPE_C: {
1318 struct MessageUnit_C __iomem *reg = acb->pmuC;
1319 /*
1320 ** push inbound doorbell tell iop, driver data write ok
1321 ** and wait reply on next hwinterrupt for next Qbuffer post
1322 */
1323 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1324 }
1325 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001326 }
1327}
1328
Al Viro80da1ad2007-10-29 05:08:28 +00001329struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001330{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001331 struct QBUFFER __iomem *qbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001332 switch (acb->adapter_type) {
1333
1334 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001335 struct MessageUnit_A __iomem *reg = acb->pmuA;
1336 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001337 }
1338 break;
1339
1340 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001341 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001342 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001343 }
1344 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001345 case ACB_ADAPTER_TYPE_C: {
1346 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1347 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1348 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001349 }
1350 return qbuffer;
1351}
1352
Al Viro80da1ad2007-10-29 05:08:28 +00001353static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001354{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001355 struct QBUFFER __iomem *pqbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001356 switch (acb->adapter_type) {
1357
1358 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001359 struct MessageUnit_A __iomem *reg = acb->pmuA;
1360 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001361 }
1362 break;
1363
1364 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001365 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001366 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001367 }
1368 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001369 case ACB_ADAPTER_TYPE_C: {
1370 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
1371 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1372 }
1373
Nick Cheng1a4f5502007-09-13 17:26:40 +08001374 }
1375 return pqbuffer;
1376}
1377
1378static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1379{
Al Viro80da1ad2007-10-29 05:08:28 +00001380 struct QBUFFER __iomem *prbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001381 struct QBUFFER *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001382 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001383 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001384 rqbuf_lastindex = acb->rqbuf_lastindex;
1385 rqbuf_firstindex = acb->rqbuf_firstindex;
1386 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001387 iop_data = (uint8_t __iomem *)prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001388 iop_len = prbuffer->data_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001389 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001390
1391 if (my_empty_len >= iop_len)
1392 {
1393 while (iop_len > 0) {
1394 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
Nick Chengcdd3cb12010-07-13 20:03:04 +08001395 memcpy(pQbuffer, iop_data, 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001396 rqbuf_lastindex++;
1397 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1398 iop_data++;
1399 iop_len--;
1400 }
1401 acb->rqbuf_lastindex = rqbuf_lastindex;
1402 arcmsr_iop_message_read(acb);
1403 }
1404
1405 else {
1406 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1407 }
1408}
1409
1410static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1411{
1412 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1413 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1414 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001415 struct QBUFFER __iomem *pwbuffer;
1416 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001417 int32_t allxfer_len = 0;
1418
1419 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1420 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1421 iop_data = (uint8_t __iomem *)pwbuffer->data;
1422
1423 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1424 (allxfer_len < 124)) {
1425 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1426 memcpy(iop_data, pQbuffer, 1);
1427 acb->wqbuf_firstindex++;
1428 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1429 iop_data++;
1430 allxfer_len++;
1431 }
1432 pwbuffer->data_len = allxfer_len;
1433
1434 arcmsr_iop_message_wrote(acb);
1435 }
1436
1437 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1438 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1439 }
1440}
1441
1442static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1443{
1444 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001445 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001446 outbound_doorbell = readl(&reg->outbound_doorbell);
1447 writel(outbound_doorbell, &reg->outbound_doorbell);
1448 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1449 arcmsr_iop2drv_data_wrote_handle(acb);
1450 }
1451
Nick Chengcdd3cb12010-07-13 20:03:04 +08001452 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001453 arcmsr_iop2drv_data_read_handle(acb);
1454 }
1455}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001456static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
1457{
1458 uint32_t outbound_doorbell;
1459 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1460 /*
1461 *******************************************************************
1462 ** Maybe here we need to check wrqbuffer_lock is lock or not
1463 ** DOORBELL: din! don!
1464 ** check if there are any mail need to pack from firmware
1465 *******************************************************************
1466 */
1467 outbound_doorbell = readl(&reg->outbound_doorbell);
1468 writel(outbound_doorbell, &reg->outbound_doorbell_clear);/*clear interrupt*/
1469 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
1470 arcmsr_iop2drv_data_wrote_handle(pACB);
1471 }
1472 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1473 arcmsr_iop2drv_data_read_handle(pACB);
1474 }
1475 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1476 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */
1477 }
1478 return;
1479}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001480static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1481{
1482 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001483 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001484 struct ARCMSR_CDB *pARCMSR_CDB;
1485 struct CommandControlBlock *pCCB;
1486 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001487 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001488 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1489 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1490 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1491 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001492 }
1493}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001494static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1495{
1496 uint32_t index;
1497 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001498 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001499 struct ARCMSR_CDB *pARCMSR_CDB;
1500 struct CommandControlBlock *pCCB;
1501 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001502 index = reg->doneq_index;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001503 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1504 writel(0, &reg->done_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001505 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1506 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1507 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1508 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001509 index++;
1510 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1511 reg->doneq_index = index;
1512 }
1513}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001514
1515static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1516{
1517 struct MessageUnit_C *phbcmu;
1518 struct ARCMSR_CDB *arcmsr_cdb;
1519 struct CommandControlBlock *ccb;
1520 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1521 int error;
1522
1523 phbcmu = (struct MessageUnit_C *)acb->pmuC;
1524 /* areca cdb command done */
1525 /* Use correct offset and size for syncing */
1526
1527 while (readl(&phbcmu->host_int_status) &
1528 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
1529 /* check if command done with no error*/
1530 flag_ccb = readl(&phbcmu->outbound_queueport_low);
1531 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/
1532 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1533 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
1534 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1535 /* check if command done with no error */
1536 arcmsr_drain_donequeue(acb, ccb, error);
1537 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1538 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
1539 break;
1540 }
1541 throttling++;
1542 }
1543}
Nick Cheng36b83de2010-05-17 11:22:42 +08001544/*
1545**********************************************************************************
1546** Handle a message interrupt
1547**
Nick Chengcdd3cb12010-07-13 20:03:04 +08001548** The only message interrupt we expect is in response to a query for the current adapter config.
Nick Cheng36b83de2010-05-17 11:22:42 +08001549** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1550**********************************************************************************
1551*/
1552static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
1553{
1554 struct MessageUnit_A *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001555 /*clear interrupt and message state*/
1556 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
1557 schedule_work(&acb->arcmsr_do_message_isr_bh);
1558}
1559static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1560{
1561 struct MessageUnit_B *reg = acb->pmuB;
1562
1563 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08001564 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001565 schedule_work(&acb->arcmsr_do_message_isr_bh);
1566}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001567/*
1568**********************************************************************************
1569** Handle a message interrupt
1570**
1571** The only message interrupt we expect is in response to a query for the
1572** current adapter config.
1573** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1574**********************************************************************************
1575*/
1576static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
1577{
1578 struct MessageUnit_C *reg = acb->pmuC;
1579 /*clear interrupt and message state*/
1580 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
1581 schedule_work(&acb->arcmsr_do_message_isr_bh);
1582}
1583
Nick Cheng1a4f5502007-09-13 17:26:40 +08001584static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1585{
1586 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00001587 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001588 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001589 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001590 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1591 return 1;
1592 }
Erich Chen1c57e862006-07-12 08:59:32 -07001593 writel(outbound_intstatus, &reg->outbound_intstatus);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001594 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1595 arcmsr_hba_doorbell_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001596 }
1597 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001598 arcmsr_hba_postqueue_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001599 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001600 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001601 /* messenger of "driver to iop commands" */
1602 arcmsr_hba_message_isr(acb);
1603 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001604 return 0;
1605}
1606
1607static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1608{
1609 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001610 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08001611 outbound_doorbell = readl(reg->iop2drv_doorbell) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001612 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001613 if (!outbound_doorbell)
1614 return 1;
1615
Nick Chengae52e7f2010-06-18 15:39:12 +08001616 writel(~outbound_doorbell, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001617 /*in case the last action of doorbell interrupt clearance is cached,
1618 this action can push HW to write down the clear bit*/
Nick Chengae52e7f2010-06-18 15:39:12 +08001619 readl(reg->iop2drv_doorbell);
1620 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001621 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001622 arcmsr_iop2drv_data_wrote_handle(acb);
1623 }
1624 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1625 arcmsr_iop2drv_data_read_handle(acb);
1626 }
1627 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1628 arcmsr_hbb_postqueue_isr(acb);
1629 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001630 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001631 /* messenger of "driver to iop commands" */
1632 arcmsr_hbb_message_isr(acb);
1633 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001634 return 0;
1635}
1636
Nick Chengcdd3cb12010-07-13 20:03:04 +08001637static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
1638{
1639 uint32_t host_interrupt_status;
1640 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
1641 /*
1642 *********************************************
1643 ** check outbound intstatus
1644 *********************************************
1645 */
1646 host_interrupt_status = readl(&phbcmu->host_int_status);
1647 if (!host_interrupt_status) {
1648 /*it must be share irq*/
1649 return 1;
1650 }
1651 /* MU ioctl transfer doorbell interrupts*/
1652 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1653 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */
1654 }
1655 /* MU post queue interrupts*/
1656 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1657 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */
1658 }
1659 return 0;
1660}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001661static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1662{
1663 switch (acb->adapter_type) {
1664 case ACB_ADAPTER_TYPE_A: {
1665 if (arcmsr_handle_hba_isr(acb)) {
1666 return IRQ_NONE;
1667 }
1668 }
1669 break;
1670
1671 case ACB_ADAPTER_TYPE_B: {
1672 if (arcmsr_handle_hbb_isr(acb)) {
1673 return IRQ_NONE;
1674 }
1675 }
1676 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001677 case ACB_ADAPTER_TYPE_C: {
1678 if (arcmsr_handle_hbc_isr(acb)) {
1679 return IRQ_NONE;
1680 }
1681 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001682 }
Erich Chen1c57e862006-07-12 08:59:32 -07001683 return IRQ_HANDLED;
1684}
1685
1686static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1687{
1688 if (acb) {
1689 /* stop adapter background rebuild */
1690 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001691 uint32_t intmask_org;
Erich Chen1c57e862006-07-12 08:59:32 -07001692 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001693 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001694 arcmsr_stop_adapter_bgrb(acb);
1695 arcmsr_flush_adapter_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001696 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07001697 }
1698 }
1699}
1700
Nick Cheng1a4f5502007-09-13 17:26:40 +08001701void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001702{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001703 int32_t wqbuf_firstindex, wqbuf_lastindex;
1704 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001705 struct QBUFFER __iomem *pwbuffer;
1706 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001707 int32_t allxfer_len = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001708 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1709 iop_data = (uint8_t __iomem *)pwbuffer->data;
1710 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1711 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1712 wqbuf_firstindex = acb->wqbuf_firstindex;
1713 wqbuf_lastindex = acb->wqbuf_lastindex;
1714 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1715 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1716 memcpy(iop_data, pQbuffer, 1);
1717 wqbuf_firstindex++;
1718 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1719 iop_data++;
1720 allxfer_len++;
1721 }
1722 acb->wqbuf_firstindex = wqbuf_firstindex;
1723 pwbuffer->data_len = allxfer_len;
1724 arcmsr_iop_message_wrote(acb);
1725 }
1726}
1727
Nick Cheng36b83de2010-05-17 11:22:42 +08001728static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001729 struct scsi_cmnd *cmd)
1730{
Erich Chen1c57e862006-07-12 08:59:32 -07001731 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1732 int retvalue = 0, transfer_len = 0;
1733 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001734 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07001735 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1736 (uint32_t ) cmd->cmnd[6] << 16 |
1737 (uint32_t ) cmd->cmnd[7] << 8 |
1738 (uint32_t ) cmd->cmnd[8];
Nick Cheng1a4f5502007-09-13 17:26:40 +08001739 /* 4 bytes: Areca io control code */
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001740 sg = scsi_sglist(cmd);
Jens Axboe45711f12007-10-22 21:19:53 +02001741 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001742 if (scsi_sg_count(cmd) > 1) {
1743 retvalue = ARCMSR_MESSAGE_FAIL;
1744 goto message_out;
Erich Chen1c57e862006-07-12 08:59:32 -07001745 }
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001746 transfer_len += sg->length;
1747
Erich Chen1c57e862006-07-12 08:59:32 -07001748 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1749 retvalue = ARCMSR_MESSAGE_FAIL;
1750 goto message_out;
1751 }
1752 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1753 switch(controlcode) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001754
Erich Chen1c57e862006-07-12 08:59:32 -07001755 case ARCMSR_MESSAGE_READ_RQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001756 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001757 uint8_t *pQbuffer, *ptmpQbuffer;
1758 int32_t allxfer_len = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001759
Daniel Drake69e562c2008-02-20 13:29:05 +00001760 ver_addr = kmalloc(1032, GFP_ATOMIC);
1761 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001762 retvalue = ARCMSR_MESSAGE_FAIL;
1763 goto message_out;
1764 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001765
Daniel Drake69e562c2008-02-20 13:29:05 +00001766 ptmpQbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001767 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1768 && (allxfer_len < 1031)) {
1769 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1770 memcpy(ptmpQbuffer, pQbuffer, 1);
1771 acb->rqbuf_firstindex++;
1772 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1773 ptmpQbuffer++;
1774 allxfer_len++;
1775 }
1776 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
Erich Chen1c57e862006-07-12 08:59:32 -07001777
Al Viro80da1ad2007-10-29 05:08:28 +00001778 struct QBUFFER __iomem *prbuffer;
1779 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001780 int32_t iop_len;
1781
1782 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1783 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001784 iop_data = prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001785 iop_len = readl(&prbuffer->data_len);
1786 while (iop_len > 0) {
1787 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1788 acb->rqbuf_lastindex++;
1789 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1790 iop_data++;
1791 iop_len--;
Erich Chen1c57e862006-07-12 08:59:32 -07001792 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001793 arcmsr_iop_message_read(acb);
1794 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001795 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001796 pcmdmessagefld->cmdmessage.Length = allxfer_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001797 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001798 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001799 }else{
1800 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Chengae52e7f2010-06-18 15:39:12 +08001801 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001802 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001803 }
1804 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001805
Nick Cheng1a4f5502007-09-13 17:26:40 +08001806 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001807 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001808 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1809 uint8_t *pQbuffer, *ptmpuserbuffer;
1810
Daniel Drake69e562c2008-02-20 13:29:05 +00001811 ver_addr = kmalloc(1032, GFP_ATOMIC);
1812 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001813 retvalue = ARCMSR_MESSAGE_FAIL;
1814 goto message_out;
1815 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001816 if(acb->fw_flag == FW_DEADLOCK) {
1817 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Cheng36b83de2010-05-17 11:22:42 +08001818 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001819 }else{
1820 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Chengae52e7f2010-06-18 15:39:12 +08001821 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001822 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001823 ptmpuserbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001824 user_len = pcmdmessagefld->cmdmessage.Length;
1825 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1826 wqbuf_lastindex = acb->wqbuf_lastindex;
1827 wqbuf_firstindex = acb->wqbuf_firstindex;
1828 if (wqbuf_lastindex != wqbuf_firstindex) {
1829 struct SENSE_DATA *sensebuffer =
1830 (struct SENSE_DATA *)cmd->sense_buffer;
1831 arcmsr_post_ioctldata2iop(acb);
1832 /* has error report sensedata */
1833 sensebuffer->ErrorCode = 0x70;
1834 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1835 sensebuffer->AdditionalSenseLength = 0x0A;
1836 sensebuffer->AdditionalSenseCode = 0x20;
1837 sensebuffer->Valid = 1;
1838 retvalue = ARCMSR_MESSAGE_FAIL;
1839 } else {
1840 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1841 &(ARCMSR_MAX_QBUFFER - 1);
1842 if (my_empty_len >= user_len) {
1843 while (user_len > 0) {
1844 pQbuffer =
1845 &acb->wqbuffer[acb->wqbuf_lastindex];
1846 memcpy(pQbuffer, ptmpuserbuffer, 1);
1847 acb->wqbuf_lastindex++;
1848 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1849 ptmpuserbuffer++;
1850 user_len--;
1851 }
1852 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1853 acb->acb_flags &=
1854 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1855 arcmsr_post_ioctldata2iop(acb);
1856 }
1857 } else {
1858 /* has error report sensedata */
Erich Chen1c57e862006-07-12 08:59:32 -07001859 struct SENSE_DATA *sensebuffer =
1860 (struct SENSE_DATA *)cmd->sense_buffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001861 sensebuffer->ErrorCode = 0x70;
1862 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1863 sensebuffer->AdditionalSenseLength = 0x0A;
1864 sensebuffer->AdditionalSenseCode = 0x20;
1865 sensebuffer->Valid = 1;
1866 retvalue = ARCMSR_MESSAGE_FAIL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001867 }
Erich Chen1c57e862006-07-12 08:59:32 -07001868 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001869 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001870 }
1871 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001872
Erich Chen1c57e862006-07-12 08:59:32 -07001873 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001874 uint8_t *pQbuffer = acb->rqbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001875 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1876 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1877 arcmsr_iop_message_read(acb);
1878 }
1879 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1880 acb->rqbuf_firstindex = 0;
1881 acb->rqbuf_lastindex = 0;
1882 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001883 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001884 pcmdmessagefld->cmdmessage.ReturnCode =
1885 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001886 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001887 pcmdmessagefld->cmdmessage.ReturnCode =
1888 ARCMSR_MESSAGE_RETURNCODE_OK;
1889 }
Erich Chen1c57e862006-07-12 08:59:32 -07001890 }
1891 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001892
Erich Chen1c57e862006-07-12 08:59:32 -07001893 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001894 uint8_t *pQbuffer = acb->wqbuffer;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001895 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001896 pcmdmessagefld->cmdmessage.ReturnCode =
1897 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001898 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001899 pcmdmessagefld->cmdmessage.ReturnCode =
1900 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001901 }
Erich Chen1c57e862006-07-12 08:59:32 -07001902
Nick Cheng1a4f5502007-09-13 17:26:40 +08001903 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1904 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1905 arcmsr_iop_message_read(acb);
1906 }
1907 acb->acb_flags |=
1908 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1909 ACB_F_MESSAGE_WQBUFFER_READED);
1910 acb->wqbuf_firstindex = 0;
1911 acb->wqbuf_lastindex = 0;
1912 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Erich Chen1c57e862006-07-12 08:59:32 -07001913 }
1914 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001915
Erich Chen1c57e862006-07-12 08:59:32 -07001916 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001917 uint8_t *pQbuffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001918
Nick Cheng1a4f5502007-09-13 17:26:40 +08001919 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1920 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1921 arcmsr_iop_message_read(acb);
1922 }
1923 acb->acb_flags |=
1924 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1925 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1926 | ACB_F_MESSAGE_WQBUFFER_READED);
1927 acb->rqbuf_firstindex = 0;
1928 acb->rqbuf_lastindex = 0;
1929 acb->wqbuf_firstindex = 0;
1930 acb->wqbuf_lastindex = 0;
1931 pQbuffer = acb->rqbuffer;
1932 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1933 pQbuffer = acb->wqbuffer;
1934 memset(pQbuffer, 0, sizeof(struct QBUFFER));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001935 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f2010-06-18 15:39:12 +08001936 pcmdmessagefld->cmdmessage.ReturnCode =
1937 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001938 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001939 pcmdmessagefld->cmdmessage.ReturnCode =
1940 ARCMSR_MESSAGE_RETURNCODE_OK;
1941 }
Erich Chen1c57e862006-07-12 08:59:32 -07001942 }
1943 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001944
Erich Chen1c57e862006-07-12 08:59:32 -07001945 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001946 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001947 pcmdmessagefld->cmdmessage.ReturnCode =
1948 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001949 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001950 pcmdmessagefld->cmdmessage.ReturnCode =
1951 ARCMSR_MESSAGE_RETURNCODE_3F;
Erich Chen1c57e862006-07-12 08:59:32 -07001952 }
1953 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08001954 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001955 case ARCMSR_MESSAGE_SAY_HELLO: {
1956 int8_t *hello_string = "Hello! I am ARCMSR";
Nick Chengcdd3cb12010-07-13 20:03:04 +08001957 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001958 pcmdmessagefld->cmdmessage.ReturnCode =
1959 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001960 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08001961 pcmdmessagefld->cmdmessage.ReturnCode =
1962 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001963 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001964 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1965 , (int16_t)strlen(hello_string));
Erich Chen1c57e862006-07-12 08:59:32 -07001966 }
1967 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001968
Erich Chen1c57e862006-07-12 08:59:32 -07001969 case ARCMSR_MESSAGE_SAY_GOODBYE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001970 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001971 pcmdmessagefld->cmdmessage.ReturnCode =
1972 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08001973 }
Erich Chen1c57e862006-07-12 08:59:32 -07001974 arcmsr_iop_parking(acb);
1975 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001976
Erich Chen1c57e862006-07-12 08:59:32 -07001977 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001978 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001979 pcmdmessagefld->cmdmessage.ReturnCode =
1980 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08001981 }
Erich Chen1c57e862006-07-12 08:59:32 -07001982 arcmsr_flush_adapter_cache(acb);
1983 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001984
Erich Chen1c57e862006-07-12 08:59:32 -07001985 default:
1986 retvalue = ARCMSR_MESSAGE_FAIL;
1987 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001988 message_out:
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001989 sg = scsi_sglist(cmd);
1990 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
Erich Chen1c57e862006-07-12 08:59:32 -07001991 return retvalue;
1992}
1993
1994static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
1995{
1996 struct list_head *head = &acb->ccb_free_list;
1997 struct CommandControlBlock *ccb = NULL;
Nick Chengae52e7f2010-06-18 15:39:12 +08001998 unsigned long flags;
1999 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002000 if (!list_empty(head)) {
2001 ccb = list_entry(head->next, struct CommandControlBlock, list);
Nick Chengae52e7f2010-06-18 15:39:12 +08002002 list_del_init(&ccb->list);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002003 }else{
Nick Chengae52e7f2010-06-18 15:39:12 +08002004 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2005 return 0;
Erich Chen1c57e862006-07-12 08:59:32 -07002006 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002007 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002008 return ccb;
2009}
2010
2011static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2012 struct scsi_cmnd *cmd)
2013{
2014 switch (cmd->cmnd[0]) {
2015 case INQUIRY: {
2016 unsigned char inqdata[36];
2017 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002018 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07002019
2020 if (cmd->device->lun) {
2021 cmd->result = (DID_TIME_OUT << 16);
2022 cmd->scsi_done(cmd);
2023 return;
2024 }
2025 inqdata[0] = TYPE_PROCESSOR;
2026 /* Periph Qualifier & Periph Dev Type */
2027 inqdata[1] = 0;
2028 /* rem media bit & Dev Type Modifier */
2029 inqdata[2] = 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002030 /* ISO, ECMA, & ANSI versions */
Erich Chen1c57e862006-07-12 08:59:32 -07002031 inqdata[4] = 31;
2032 /* length of additional data */
2033 strncpy(&inqdata[8], "Areca ", 8);
2034 /* Vendor Identification */
2035 strncpy(&inqdata[16], "RAID controller ", 16);
2036 /* Product Identification */
2037 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
Erich Chen1c57e862006-07-12 08:59:32 -07002038
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002039 sg = scsi_sglist(cmd);
Jens Axboe45711f12007-10-22 21:19:53 +02002040 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002041
Erich Chen1c57e862006-07-12 08:59:32 -07002042 memcpy(buffer, inqdata, sizeof(inqdata));
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002043 sg = scsi_sglist(cmd);
2044 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
Erich Chen1c57e862006-07-12 08:59:32 -07002045
Erich Chen1c57e862006-07-12 08:59:32 -07002046 cmd->scsi_done(cmd);
2047 }
2048 break;
2049 case WRITE_BUFFER:
2050 case READ_BUFFER: {
2051 if (arcmsr_iop_message_xfer(acb, cmd))
2052 cmd->result = (DID_ERROR << 16);
2053 cmd->scsi_done(cmd);
2054 }
2055 break;
2056 default:
2057 cmd->scsi_done(cmd);
2058 }
2059}
2060
Jeff Garzikf2812332010-11-16 02:10:29 -05002061static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
Erich Chen1c57e862006-07-12 08:59:32 -07002062 void (* done)(struct scsi_cmnd *))
2063{
2064 struct Scsi_Host *host = cmd->device->host;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002065 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07002066 struct CommandControlBlock *ccb;
2067 int target = cmd->device->id;
2068 int lun = cmd->device->lun;
Nick Cheng36b83de2010-05-17 11:22:42 +08002069 uint8_t scsicmd = cmd->cmnd[0];
Erich Chen1c57e862006-07-12 08:59:32 -07002070 cmd->scsi_done = done;
2071 cmd->host_scribble = NULL;
2072 cmd->result = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002073 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2074 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2075 cmd->result = (DID_NO_CONNECT << 16);
Nick Cheng36b83de2010-05-17 11:22:42 +08002076 }
2077 cmd->scsi_done(cmd);
2078 return 0;
2079 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002080 if (target == 16) {
Erich Chen1c57e862006-07-12 08:59:32 -07002081 /* virtual device for iop message transfer */
2082 arcmsr_handle_virtual_command(acb, cmd);
2083 return 0;
2084 }
Erich Chen1c57e862006-07-12 08:59:32 -07002085 if (atomic_read(&acb->ccboutstandingcount) >=
2086 ARCMSR_MAX_OUTSTANDING_CMD)
2087 return SCSI_MLQUEUE_HOST_BUSY;
Erich Chen1c57e862006-07-12 08:59:32 -07002088 ccb = arcmsr_get_freeccb(acb);
2089 if (!ccb)
2090 return SCSI_MLQUEUE_HOST_BUSY;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002091 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
Nick Cheng76d78302008-02-04 23:53:24 -08002092 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2093 cmd->scsi_done(cmd);
2094 return 0;
2095 }
Erich Chen1c57e862006-07-12 08:59:32 -07002096 arcmsr_post_ccb(acb, ccb);
2097 return 0;
2098}
2099
Jeff Garzikf2812332010-11-16 02:10:29 -05002100static DEF_SCSI_QCMD(arcmsr_queue_command)
2101
Nick Chengae52e7f2010-06-18 15:39:12 +08002102static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002103{
Al Viro80da1ad2007-10-29 05:08:28 +00002104 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002105 char *acb_firm_model = acb->firm_model;
2106 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002107 char *acb_device_map = acb->device_map;
Al Viro80da1ad2007-10-29 05:08:28 +00002108 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2109 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002110 char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
Erich Chen1c57e862006-07-12 08:59:32 -07002111 int count;
Erich Chen1c57e862006-07-12 08:59:32 -07002112 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002113 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002114 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2115 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002116 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002117 }
Erich Chen1c57e862006-07-12 08:59:32 -07002118 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002119 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002120 *acb_firm_model = readb(iop_firm_model);
2121 acb_firm_model++;
2122 iop_firm_model++;
2123 count--;
2124 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002125
Erich Chen1c57e862006-07-12 08:59:32 -07002126 count = 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002127 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002128 *acb_firm_version = readb(iop_firm_version);
2129 acb_firm_version++;
2130 iop_firm_version++;
2131 count--;
2132 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002133
Nick Chengcdd3cb12010-07-13 20:03:04 +08002134 count=16;
2135 while(count){
2136 *acb_device_map = readb(iop_device_map);
2137 acb_device_map++;
2138 iop_device_map++;
2139 count--;
2140 }
2141 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengae52e7f2010-06-18 15:39:12 +08002142 acb->host->host_no,
2143 acb->firm_version,
2144 acb->firm_model);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002145 acb->signature = readl(&reg->message_rwbuffer[0]);
Erich Chen1c57e862006-07-12 08:59:32 -07002146 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2147 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2148 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2149 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002150 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2151 return true;
Erich Chen1c57e862006-07-12 08:59:32 -07002152}
Nick Chengae52e7f2010-06-18 15:39:12 +08002153static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002154{
Al Viro80da1ad2007-10-29 05:08:28 +00002155 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002156 struct pci_dev *pdev = acb->pdev;
2157 void *dma_coherent;
2158 dma_addr_t dma_coherent_handle;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002159 char *acb_firm_model = acb->firm_model;
2160 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002161 char *acb_device_map = acb->device_map;
Nick Chengae52e7f2010-06-18 15:39:12 +08002162 char __iomem *iop_firm_model;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002163 /*firm_model,15,60-67*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002164 char __iomem *iop_firm_version;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002165 /*firm_version,17,68-83*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002166 char __iomem *iop_device_map;
Nick Cheng36b83de2010-05-17 11:22:42 +08002167 /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002168 int count;
Nick Chengae52e7f2010-06-18 15:39:12 +08002169 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002170 if (!dma_coherent){
Nick Chengae52e7f2010-06-18 15:39:12 +08002171 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
2172 return false;
2173 }
2174 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
2175 reg = (struct MessageUnit_B *)dma_coherent;
2176 acb->pmuB = reg;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002177 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
Nick Chengae52e7f2010-06-18 15:39:12 +08002178 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2179 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2180 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2181 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2182 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2183 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2184 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
2185 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
2186 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002187
Nick Chengae52e7f2010-06-18 15:39:12 +08002188 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002189 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002190 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2191 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002192 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002193 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002194 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002195 while (count){
2196 *acb_firm_model = readb(iop_firm_model);
2197 acb_firm_model++;
2198 iop_firm_model++;
2199 count--;
2200 }
2201 count = 16;
2202 while (count){
2203 *acb_firm_version = readb(iop_firm_version);
2204 acb_firm_version++;
2205 iop_firm_version++;
2206 count--;
2207 }
2208
2209 count = 16;
2210 while(count){
2211 *acb_device_map = readb(iop_device_map);
2212 acb_device_map++;
2213 iop_device_map++;
2214 count--;
2215 }
2216
2217 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2218 acb->host->host_no,
2219 acb->firm_version,
2220 acb->firm_model);
2221
2222 acb->signature = readl(&reg->message_rwbuffer[1]);
2223 /*firm_signature,1,00-03*/
2224 acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2225 /*firm_request_len,1,04-07*/
2226 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2227 /*firm_numbers_queue,2,08-11*/
2228 acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2229 /*firm_sdram_size,3,12-15*/
2230 acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2231 /*firm_ide_channels,4,16-19*/
2232 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2233 /*firm_ide_channels,4,16-19*/
2234 return true;
2235}
2236
2237static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
2238{
2239 uint32_t intmask_org, Index, firmware_state = 0;
2240 struct MessageUnit_C *reg = pACB->pmuC;
2241 char *acb_firm_model = pACB->firm_model;
2242 char *acb_firm_version = pACB->firm_version;
2243 char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2244 char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
2245 int count;
2246 /* disable all outbound interrupt */
2247 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2248 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2249 /* wait firmware ready */
2250 do {
2251 firmware_state = readl(&reg->outbound_msgaddr1);
2252 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2253 /* post "get config" instruction */
2254 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2255 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2256 /* wait message ready */
2257 for (Index = 0; Index < 2000; Index++) {
2258 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2259 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2260 break;
2261 }
2262 udelay(10);
2263 } /*max 1 seconds*/
2264 if (Index >= 2000) {
2265 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2266 miscellaneous data' timeout \n", pACB->host->host_no);
2267 return false;
2268 }
2269 count = 8;
Nick Chengae52e7f2010-06-18 15:39:12 +08002270 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002271 *acb_firm_model = readb(iop_firm_model);
2272 acb_firm_model++;
2273 iop_firm_model++;
2274 count--;
2275 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002276 count = 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002277 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002278 *acb_firm_version = readb(iop_firm_version);
2279 acb_firm_version++;
2280 iop_firm_version++;
2281 count--;
2282 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002283 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengcdd3cb12010-07-13 20:03:04 +08002284 pACB->host->host_no,
2285 pACB->firm_version,
2286 pACB->firm_model);
2287 pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
2288 pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2289 pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
2290 pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
2291 pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2292 /*all interrupt service will be enable at arcmsr_iop_init*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002293 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002294}
Nick Chengae52e7f2010-06-18 15:39:12 +08002295static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002296{
Nick Chengae52e7f2010-06-18 15:39:12 +08002297 if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
2298 return arcmsr_get_hba_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002299 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
Nick Chengae52e7f2010-06-18 15:39:12 +08002300 return arcmsr_get_hbb_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002301 else
2302 return arcmsr_get_hbc_config(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002303}
2304
Nick Chengae52e7f2010-06-18 15:39:12 +08002305static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07002306 struct CommandControlBlock *poll_ccb)
2307{
Al Viro80da1ad2007-10-29 05:08:28 +00002308 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002309 struct CommandControlBlock *ccb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002310 struct ARCMSR_CDB *arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07002311 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002312 int rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002313 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002314 polling_hba_ccb_retry:
Erich Chen1c57e862006-07-12 08:59:32 -07002315 poll_count++;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002316 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
Erich Chen1c57e862006-07-12 08:59:32 -07002317 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2318 while (1) {
2319 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002320 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002321 rtn = SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07002322 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002323 }else {
2324 msleep(25);
2325 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002326 rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07002327 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002328 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002329 goto polling_hba_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002330 }
2331 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002332 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2333 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002334 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2335 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2336 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2337 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
Erich Chen1c57e862006-07-12 08:59:32 -07002338 " poll command abort successfully \n"
2339 , acb->host->host_no
2340 , ccb->pcmd->device->id
2341 , ccb->pcmd->device->lun
2342 , ccb);
2343 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002344 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002345 continue;
2346 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002347 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2348 " command done ccb = '0x%p'"
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002349 "ccboutstandingcount = %d \n"
Erich Chen1c57e862006-07-12 08:59:32 -07002350 , acb->host->host_no
2351 , ccb
2352 , atomic_read(&acb->ccboutstandingcount));
2353 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002354 }
2355 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2356 arcmsr_report_ccb_state(acb, ccb, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002357 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002358 return rtn;
2359}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002360
Nick Chengae52e7f2010-06-18 15:39:12 +08002361static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002362 struct CommandControlBlock *poll_ccb)
2363{
Nick Chengcdd3cb12010-07-13 20:03:04 +08002364 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002365 struct ARCMSR_CDB *arcmsr_cdb;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002366 struct CommandControlBlock *ccb;
2367 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002368 int index, rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002369 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002370 polling_hbb_ccb_retry:
NickCheng97b99122011-01-06 17:32:41 +08002371
Nick Chengcdd3cb12010-07-13 20:03:04 +08002372 poll_count++;
2373 /* clear doorbell interrupt */
Nick Chengae52e7f2010-06-18 15:39:12 +08002374 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002375 while(1){
2376 index = reg->doneq_index;
2377 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
2378 if (poll_ccb_done){
Nick Chengae52e7f2010-06-18 15:39:12 +08002379 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002380 break;
2381 }else {
2382 msleep(25);
2383 if (poll_count > 100){
Nick Chengae52e7f2010-06-18 15:39:12 +08002384 rtn = FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002385 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08002386 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002387 goto polling_hbb_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002388 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002389 }
2390 writel(0, &reg->done_qbuffer[index]);
2391 index++;
2392 /*if last index number set it to 0 */
2393 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2394 reg->doneq_index = index;
2395 /* check if command done with no error*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002396 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2397 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002398 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2399 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2400 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002401 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2402 " poll command abort successfully \n"
Nick Chengcdd3cb12010-07-13 20:03:04 +08002403 ,acb->host->host_no
2404 ,ccb->pcmd->device->id
2405 ,ccb->pcmd->device->lun
2406 ,ccb);
2407 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f2010-06-18 15:39:12 +08002408 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002409 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002410 }
2411 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2412 " command done ccb = '0x%p'"
2413 "ccboutstandingcount = %d \n"
2414 , acb->host->host_no
2415 , ccb
2416 , atomic_read(&acb->ccboutstandingcount));
2417 continue;
2418 }
2419 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2420 arcmsr_report_ccb_state(acb, ccb, error);
2421 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002422 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002423}
2424
Nick Chengcdd3cb12010-07-13 20:03:04 +08002425static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
2426{
2427 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2428 uint32_t flag_ccb, ccb_cdb_phy;
2429 struct ARCMSR_CDB *arcmsr_cdb;
2430 bool error;
2431 struct CommandControlBlock *pCCB;
2432 uint32_t poll_ccb_done = 0, poll_count = 0;
2433 int rtn;
2434polling_hbc_ccb_retry:
2435 poll_count++;
2436 while (1) {
2437 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
2438 if (poll_ccb_done) {
2439 rtn = SUCCESS;
2440 break;
2441 } else {
2442 msleep(25);
2443 if (poll_count > 100) {
2444 rtn = FAILED;
2445 break;
2446 }
2447 goto polling_hbc_ccb_retry;
2448 }
2449 }
2450 flag_ccb = readl(&reg->outbound_queueport_low);
2451 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2452 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
2453 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2454 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
2455 /* check ifcommand done with no error*/
2456 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
2457 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
2458 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2459 " poll command abort successfully \n"
2460 , acb->host->host_no
2461 , pCCB->pcmd->device->id
2462 , pCCB->pcmd->device->lun
2463 , pCCB);
2464 pCCB->pcmd->result = DID_ABORT << 16;
2465 arcmsr_ccb_complete(pCCB);
2466 continue;
2467 }
2468 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2469 " command done ccb = '0x%p'"
2470 "ccboutstandingcount = %d \n"
2471 , acb->host->host_no
2472 , pCCB
2473 , atomic_read(&acb->ccboutstandingcount));
2474 continue;
2475 }
2476 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2477 arcmsr_report_ccb_state(acb, pCCB, error);
2478 }
2479 return rtn;
2480}
Nick Chengae52e7f2010-06-18 15:39:12 +08002481static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002482 struct CommandControlBlock *poll_ccb)
2483{
Nick Chengae52e7f2010-06-18 15:39:12 +08002484 int rtn = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002485 switch (acb->adapter_type) {
2486
2487 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002488 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002489 }
2490 break;
2491
2492 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002493 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002494 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002495 break;
2496 case ACB_ADAPTER_TYPE_C: {
2497 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
2498 }
Erich Chen1c57e862006-07-12 08:59:32 -07002499 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002500 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07002501}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002502
2503static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002504{
Nick Chengae52e7f2010-06-18 15:39:12 +08002505 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002506 dma_addr_t dma_coherent_handle;
2507 /*
2508 ********************************************************************
2509 ** here we need to tell iop 331 our freeccb.HighPart
2510 ** if freeccb.HighPart is not zero
2511 ********************************************************************
2512 */
2513 dma_coherent_handle = acb->dma_coherent_handle;
2514 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
Nick Chengae52e7f2010-06-18 15:39:12 +08002515 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002516 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002517 /*
2518 ***********************************************************************
2519 ** if adapter type B, set window of "post command Q"
2520 ***********************************************************************
2521 */
2522 switch (acb->adapter_type) {
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002523
Nick Cheng1a4f5502007-09-13 17:26:40 +08002524 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f2010-06-18 15:39:12 +08002525 if (cdb_phyaddr_hi32 != 0) {
Al Viro80da1ad2007-10-29 05:08:28 +00002526 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002527 uint32_t intmask_org;
2528 intmask_org = arcmsr_disable_outbound_ints(acb);
2529 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2530 &reg->message_rwbuffer[0]);
Nick Chengae52e7f2010-06-18 15:39:12 +08002531 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002532 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2533 &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002534 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002535 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
2536 part physical address timeout\n",
2537 acb->host->host_no);
2538 return 1;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002539 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002540 arcmsr_enable_outbound_ints(acb, intmask_org);
2541 }
2542 }
2543 break;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002544
Nick Cheng1a4f5502007-09-13 17:26:40 +08002545 case ACB_ADAPTER_TYPE_B: {
2546 unsigned long post_queue_phyaddr;
Al Viro80da1ad2007-10-29 05:08:28 +00002547 uint32_t __iomem *rwbuffer;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002548
Al Viro80da1ad2007-10-29 05:08:28 +00002549 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002550 uint32_t intmask_org;
2551 intmask_org = arcmsr_disable_outbound_ints(acb);
2552 reg->postq_index = 0;
2553 reg->doneq_index = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08002554 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002555 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002556 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2557 acb->host->host_no);
2558 return 1;
2559 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002560 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2561 rwbuffer = reg->message_rwbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002562 /* driver "set config" signature */
2563 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2564 /* normal should be zero */
Nick Chengae52e7f2010-06-18 15:39:12 +08002565 writel(cdb_phyaddr_hi32, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002566 /* postQ size (256 + 8)*4 */
2567 writel(post_queue_phyaddr, rwbuffer++);
2568 /* doneQ size (256 + 8)*4 */
2569 writel(post_queue_phyaddr + 1056, rwbuffer++);
2570 /* ccb maxQ size must be --> [(256 + 8)*4]*/
2571 writel(1056, rwbuffer);
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002572
Nick Chengae52e7f2010-06-18 15:39:12 +08002573 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002574 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002575 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2576 timeout \n",acb->host->host_no);
2577 return 1;
2578 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002579 arcmsr_hbb_enable_driver_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002580 arcmsr_enable_outbound_ints(acb, intmask_org);
2581 }
2582 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002583 case ACB_ADAPTER_TYPE_C: {
2584 if (cdb_phyaddr_hi32 != 0) {
2585 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2586
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002587 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
2588 acb->adapter_index, cdb_phyaddr_hi32);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002589 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
2590 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
2591 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
2592 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2593 if (!arcmsr_hbc_wait_msgint_ready(acb)) {
2594 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2595 timeout \n", acb->host->host_no);
2596 return 1;
2597 }
2598 }
2599 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002600 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002601 return 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002602}
2603
Nick Cheng1a4f5502007-09-13 17:26:40 +08002604static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2605{
2606 uint32_t firmware_state = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002607 switch (acb->adapter_type) {
2608
2609 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002610 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002611 do {
2612 firmware_state = readl(&reg->outbound_msgaddr1);
2613 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2614 }
2615 break;
2616
2617 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002618 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002619 do {
Nick Chengae52e7f2010-06-18 15:39:12 +08002620 firmware_state = readl(reg->iop2drv_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002621 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
Nick Chengae52e7f2010-06-18 15:39:12 +08002622 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002623 }
2624 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002625 case ACB_ADAPTER_TYPE_C: {
2626 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2627 do {
2628 firmware_state = readl(&reg->outbound_msgaddr1);
2629 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2630 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002631 }
2632}
2633
Nick Cheng36b83de2010-05-17 11:22:42 +08002634static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2635{
2636 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002637 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002638 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002639 return;
2640 } else {
2641 acb->fw_flag = FW_NORMAL;
2642 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
2643 atomic_set(&acb->rq_map_token, 16);
2644 }
2645 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002646 if (atomic_dec_and_test(&acb->rq_map_token)) {
2647 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002648 return;
NickCheng97b99122011-01-06 17:32:41 +08002649 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002650 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2651 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2652 }
2653 return;
2654}
2655
2656static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2657{
2658 struct MessageUnit_B __iomem *reg = acb->pmuB;
2659 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002660 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002661 return;
2662 } else {
2663 acb->fw_flag = FW_NORMAL;
2664 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
NickCheng97b99122011-01-06 17:32:41 +08002665 atomic_set(&acb->rq_map_token, 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002666 }
2667 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002668 if (atomic_dec_and_test(&acb->rq_map_token)) {
2669 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002670 return;
NickCheng97b99122011-01-06 17:32:41 +08002671 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002672 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2673 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2674 }
2675 return;
2676}
2677
2678static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
2679{
2680 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengae52e7f2010-06-18 15:39:12 +08002681 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
NickCheng97b99122011-01-06 17:32:41 +08002682 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002683 return;
Nick Cheng36b83de2010-05-17 11:22:42 +08002684 } else {
Nick Chengae52e7f2010-06-18 15:39:12 +08002685 acb->fw_flag = FW_NORMAL;
2686 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002687 atomic_set(&acb->rq_map_token, 16);
2688 }
Nick Chengae52e7f2010-06-18 15:39:12 +08002689 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002690 if (atomic_dec_and_test(&acb->rq_map_token)) {
2691 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002692 return;
NickCheng97b99122011-01-06 17:32:41 +08002693 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002694 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002695 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2696 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Cheng36b83de2010-05-17 11:22:42 +08002697 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002698 return;
2699}
2700
2701static void arcmsr_request_device_map(unsigned long pacb)
2702{
2703 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
Nick Cheng36b83de2010-05-17 11:22:42 +08002704 switch (acb->adapter_type) {
2705 case ACB_ADAPTER_TYPE_A: {
2706 arcmsr_request_hba_device_map(acb);
2707 }
2708 break;
2709 case ACB_ADAPTER_TYPE_B: {
2710 arcmsr_request_hbb_device_map(acb);
2711 }
2712 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002713 case ACB_ADAPTER_TYPE_C: {
2714 arcmsr_request_hbc_device_map(acb);
2715 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002716 }
2717}
2718
Nick Cheng1a4f5502007-09-13 17:26:40 +08002719static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2720{
Al Viro80da1ad2007-10-29 05:08:28 +00002721 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002722 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2723 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002724 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002725 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2726 rebulid' timeout \n", acb->host->host_no);
2727 }
2728}
2729
2730static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2731{
Al Viro80da1ad2007-10-29 05:08:28 +00002732 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002733 acb->acb_flags |= ACB_F_MSG_START_BGRB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002734 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002735 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002736 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2737 rebulid' timeout \n",acb->host->host_no);
2738 }
2739}
2740
Nick Chengcdd3cb12010-07-13 20:03:04 +08002741static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
2742{
2743 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
2744 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2745 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2746 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
2747 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
2748 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2749 rebulid' timeout \n", pACB->host->host_no);
2750 }
2751 return;
2752}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002753static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2754{
2755 switch (acb->adapter_type) {
2756 case ACB_ADAPTER_TYPE_A:
2757 arcmsr_start_hba_bgrb(acb);
2758 break;
2759 case ACB_ADAPTER_TYPE_B:
2760 arcmsr_start_hbb_bgrb(acb);
2761 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002762 case ACB_ADAPTER_TYPE_C:
2763 arcmsr_start_hbc_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002764 }
2765}
2766
2767static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2768{
2769 switch (acb->adapter_type) {
2770 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002771 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002772 uint32_t outbound_doorbell;
2773 /* empty doorbell Qbuffer if door bell ringed */
2774 outbound_doorbell = readl(&reg->outbound_doorbell);
2775 /*clear doorbell interrupt */
2776 writel(outbound_doorbell, &reg->outbound_doorbell);
2777 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2778 }
2779 break;
2780
2781 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002782 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002783 /*clear interrupt and message state*/
Nick Chengae52e7f2010-06-18 15:39:12 +08002784 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2785 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002786 /* let IOP know data has been read */
2787 }
2788 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002789 case ACB_ADAPTER_TYPE_C: {
2790 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2791 uint32_t outbound_doorbell;
2792 /* empty doorbell Qbuffer if door bell ringed */
2793 outbound_doorbell = readl(&reg->outbound_doorbell);
2794 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2795 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2796 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002797 }
2798}
Erich Chen1c57e862006-07-12 08:59:32 -07002799
Nick Cheng76d78302008-02-04 23:53:24 -08002800static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2801{
2802 switch (acb->adapter_type) {
2803 case ACB_ADAPTER_TYPE_A:
2804 return;
2805 case ACB_ADAPTER_TYPE_B:
2806 {
2807 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f2010-06-18 15:39:12 +08002808 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002809 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng76d78302008-02-04 23:53:24 -08002810 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2811 return;
2812 }
2813 }
2814 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002815 case ACB_ADAPTER_TYPE_C:
2816 return;
Nick Cheng76d78302008-02-04 23:53:24 -08002817 }
2818 return;
2819}
2820
Nick Cheng36b83de2010-05-17 11:22:42 +08002821static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2822{
2823 uint8_t value[64];
Nick Chengcdd3cb12010-07-13 20:03:04 +08002824 int i, count = 0;
2825 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
2826 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
2827 u32 temp = 0;
Nick Cheng36b83de2010-05-17 11:22:42 +08002828 /* backup pci config data */
Nick Chengcdd3cb12010-07-13 20:03:04 +08002829 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
Nick Cheng36b83de2010-05-17 11:22:42 +08002830 for (i = 0; i < 64; i++) {
2831 pci_read_config_byte(acb->pdev, i, &value[i]);
2832 }
2833 /* hardware reset signal */
Nick Chengae52e7f2010-06-18 15:39:12 +08002834 if ((acb->dev_id == 0x1680)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002835 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
2836 } else if ((acb->dev_id == 0x1880)) {
2837 do {
2838 count++;
2839 writel(0xF, &pmuC->write_sequence);
2840 writel(0x4, &pmuC->write_sequence);
2841 writel(0xB, &pmuC->write_sequence);
2842 writel(0x2, &pmuC->write_sequence);
2843 writel(0x7, &pmuC->write_sequence);
2844 writel(0xD, &pmuC->write_sequence);
2845 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
2846 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
Nick Chengae52e7f2010-06-18 15:39:12 +08002847 } else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002848 pci_write_config_byte(acb->pdev, 0x84, 0x20);
Nick Chengae52e7f2010-06-18 15:39:12 +08002849 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002850 msleep(2000);
Nick Cheng36b83de2010-05-17 11:22:42 +08002851 /* write back pci config data */
2852 for (i = 0; i < 64; i++) {
2853 pci_write_config_byte(acb->pdev, i, value[i]);
2854 }
2855 msleep(1000);
2856 return;
2857}
Erich Chen1c57e862006-07-12 08:59:32 -07002858static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2859{
Nick Cheng1a4f5502007-09-13 17:26:40 +08002860 uint32_t intmask_org;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002861 /* disable all outbound interrupt */
2862 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002863 arcmsr_wait_firmware_ready(acb);
2864 arcmsr_iop_confirm(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002865 /*start background rebuild*/
2866 arcmsr_start_adapter_bgrb(acb);
2867 /* empty doorbell Qbuffer if door bell ringed */
2868 arcmsr_clear_doorbell_queue_buffer(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002869 arcmsr_enable_eoi_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002870 /* enable outbound Post Queue,outbound doorbell Interrupt */
2871 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07002872 acb->acb_flags |= ACB_F_IOP_INITED;
2873}
2874
Nick Cheng36b83de2010-05-17 11:22:42 +08002875static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002876{
Erich Chen1c57e862006-07-12 08:59:32 -07002877 struct CommandControlBlock *ccb;
2878 uint32_t intmask_org;
Nick Cheng36b83de2010-05-17 11:22:42 +08002879 uint8_t rtnval = 0x00;
Erich Chen1c57e862006-07-12 08:59:32 -07002880 int i = 0;
NickCheng97b99122011-01-06 17:32:41 +08002881 unsigned long flags;
2882
Erich Chen1c57e862006-07-12 08:59:32 -07002883 if (atomic_read(&acb->ccboutstandingcount) != 0) {
Erich Chen1c57e862006-07-12 08:59:32 -07002884 /* disable all outbound interrupt */
2885 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08002886 /* talk to iop 331 outstanding command aborted */
2887 rtnval = arcmsr_abort_allcmd(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002888 /* clear all outbound posted Q */
Nick Cheng1a4f5502007-09-13 17:26:40 +08002889 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002890 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2891 ccb = acb->pccb_pool[i];
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002892 if (ccb->startdone == ARCMSR_CCB_START) {
NickCheng97b99122011-01-06 17:32:41 +08002893 scsi_dma_unmap(ccb->pcmd);
2894 ccb->startdone = ARCMSR_CCB_DONE;
2895 ccb->ccb_flags = 0;
2896 spin_lock_irqsave(&acb->ccblist_lock, flags);
2897 list_add_tail(&ccb->list, &acb->ccb_free_list);
2898 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002899 }
2900 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002901 atomic_set(&acb->ccboutstandingcount, 0);
Erich Chen1c57e862006-07-12 08:59:32 -07002902 /* enable all outbound interrupt */
2903 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Cheng36b83de2010-05-17 11:22:42 +08002904 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002905 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002906 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002907}
2908
2909static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2910{
NickCheng97b99122011-01-06 17:32:41 +08002911 struct AdapterControlBlock *acb;
Nick Chengae52e7f2010-06-18 15:39:12 +08002912 uint32_t intmask_org, outbound_doorbell;
2913 int retry_count = 0;
2914 int rtn = FAILED;
Nick Chengae52e7f2010-06-18 15:39:12 +08002915 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002916 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
Nick Cheng36b83de2010-05-17 11:22:42 +08002917 acb->num_resets++;
Nick Cheng36b83de2010-05-17 11:22:42 +08002918
Nick Chengcdd3cb12010-07-13 20:03:04 +08002919 switch(acb->adapter_type){
2920 case ACB_ADAPTER_TYPE_A:{
2921 if (acb->acb_flags & ACB_F_BUS_RESET){
Nick Chengae52e7f2010-06-18 15:39:12 +08002922 long timeout;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002923 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2924 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
Nick Chengae52e7f2010-06-18 15:39:12 +08002925 if (timeout) {
2926 return SUCCESS;
2927 }
2928 }
2929 acb->acb_flags |= ACB_F_BUS_RESET;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002930 if (!arcmsr_iop_reset(acb)) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002931 struct MessageUnit_A __iomem *reg;
2932 reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002933 arcmsr_hardware_reset(acb);
2934 acb->acb_flags &= ~ACB_F_IOP_INITED;
Nick Cheng36b83de2010-05-17 11:22:42 +08002935sleep_again:
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002936 ssleep(ARCMSR_SLEEPTIME);
Nick Chengae52e7f2010-06-18 15:39:12 +08002937 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002938 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
2939 if (retry_count > ARCMSR_RETRYCOUNT) {
Nick Chengae52e7f2010-06-18 15:39:12 +08002940 acb->fw_flag = FW_DEADLOCK;
Tomas Henzl8b7eb862011-04-29 16:28:24 +02002941 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
Nick Chengae52e7f2010-06-18 15:39:12 +08002942 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002943 }
2944 retry_count++;
2945 goto sleep_again;
2946 }
2947 acb->acb_flags |= ACB_F_IOP_INITED;
2948 /* disable all outbound interrupt */
2949 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Chengae52e7f2010-06-18 15:39:12 +08002950 arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002951 arcmsr_start_adapter_bgrb(acb);
2952 /* clear Qbuffer if door bell ringed */
2953 outbound_doorbell = readl(&reg->outbound_doorbell);
2954 writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
2955 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2956 /* enable outbound Post Queue,outbound doorbell Interrupt */
2957 arcmsr_enable_outbound_ints(acb, intmask_org);
2958 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f2010-06-18 15:39:12 +08002959 atomic_set(&acb->ante_token_value, 16);
2960 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08002961 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002962 acb->acb_flags &= ~ACB_F_BUS_RESET;
2963 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002964 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
Nick Chengae52e7f2010-06-18 15:39:12 +08002965 } else {
2966 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08002967 atomic_set(&acb->rq_map_token, 16);
2968 atomic_set(&acb->ante_token_value, 16);
2969 acb->fw_flag = FW_NORMAL;
2970 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengae52e7f2010-06-18 15:39:12 +08002971 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002972 }
2973 break;
2974 }
2975 case ACB_ADAPTER_TYPE_B:{
2976 acb->acb_flags |= ACB_F_BUS_RESET;
2977 if (!arcmsr_iop_reset(acb)) {
2978 acb->acb_flags &= ~ACB_F_BUS_RESET;
2979 rtn = FAILED;
2980 } else {
2981 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08002982 atomic_set(&acb->rq_map_token, 16);
2983 atomic_set(&acb->ante_token_value, 16);
2984 acb->fw_flag = FW_NORMAL;
2985 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002986 rtn = SUCCESS;
2987 }
2988 break;
2989 }
2990 case ACB_ADAPTER_TYPE_C:{
2991 if (acb->acb_flags & ACB_F_BUS_RESET) {
2992 long timeout;
2993 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2994 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
2995 if (timeout) {
2996 return SUCCESS;
2997 }
2998 }
2999 acb->acb_flags |= ACB_F_BUS_RESET;
3000 if (!arcmsr_iop_reset(acb)) {
3001 struct MessageUnit_C __iomem *reg;
3002 reg = acb->pmuC;
3003 arcmsr_hardware_reset(acb);
3004 acb->acb_flags &= ~ACB_F_IOP_INITED;
3005sleep:
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003006 ssleep(ARCMSR_SLEEPTIME);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003007 if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003008 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3009 if (retry_count > ARCMSR_RETRYCOUNT) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08003010 acb->fw_flag = FW_DEADLOCK;
Tomas Henzl8b7eb862011-04-29 16:28:24 +02003011 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +08003012 return FAILED;
3013 }
3014 retry_count++;
3015 goto sleep;
3016 }
3017 acb->acb_flags |= ACB_F_IOP_INITED;
3018 /* disable all outbound interrupt */
3019 intmask_org = arcmsr_disable_outbound_ints(acb);
3020 arcmsr_get_firmware_spec(acb);
3021 arcmsr_start_adapter_bgrb(acb);
3022 /* clear Qbuffer if door bell ringed */
3023 outbound_doorbell = readl(&reg->outbound_doorbell);
3024 writel(outbound_doorbell, &reg->outbound_doorbell_clear); /*clear interrupt */
3025 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
3026 /* enable outbound Post Queue,outbound doorbell Interrupt */
3027 arcmsr_enable_outbound_ints(acb, intmask_org);
3028 atomic_set(&acb->rq_map_token, 16);
3029 atomic_set(&acb->ante_token_value, 16);
3030 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08003031 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003032 acb->acb_flags &= ~ACB_F_BUS_RESET;
3033 rtn = SUCCESS;
3034 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3035 } else {
3036 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08003037 atomic_set(&acb->rq_map_token, 16);
3038 atomic_set(&acb->ante_token_value, 16);
3039 acb->fw_flag = FW_NORMAL;
3040 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003041 rtn = SUCCESS;
3042 }
3043 break;
Nick Chengae52e7f2010-06-18 15:39:12 +08003044 }
3045 }
3046 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003047}
3048
Nick Chengae52e7f2010-06-18 15:39:12 +08003049static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07003050 struct CommandControlBlock *ccb)
3051{
Nick Chengae52e7f2010-06-18 15:39:12 +08003052 int rtn;
Nick Chengae52e7f2010-06-18 15:39:12 +08003053 rtn = arcmsr_polling_ccbdone(acb, ccb);
Nick Chengae52e7f2010-06-18 15:39:12 +08003054 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003055}
3056
3057static int arcmsr_abort(struct scsi_cmnd *cmd)
3058{
3059 struct AdapterControlBlock *acb =
3060 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3061 int i = 0;
Nick Chengae52e7f2010-06-18 15:39:12 +08003062 int rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07003063 printk(KERN_NOTICE
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003064 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
Erich Chen1c57e862006-07-12 08:59:32 -07003065 acb->host->host_no, cmd->device->id, cmd->device->lun);
Nick Chengae52e7f2010-06-18 15:39:12 +08003066 acb->acb_flags |= ACB_F_ABORT;
Erich Chen1c57e862006-07-12 08:59:32 -07003067 acb->num_aborts++;
Erich Chen1c57e862006-07-12 08:59:32 -07003068 /*
3069 ************************************************
3070 ** the all interrupt service routine is locked
3071 ** we need to handle it as soon as possible and exit
3072 ************************************************
3073 */
3074 if (!atomic_read(&acb->ccboutstandingcount))
Nick Chengae52e7f2010-06-18 15:39:12 +08003075 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003076
3077 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3078 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3079 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
Nick Chengae52e7f2010-06-18 15:39:12 +08003080 ccb->startdone = ARCMSR_CCB_ABORTED;
3081 rtn = arcmsr_abort_one_cmd(acb, ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07003082 break;
3083 }
3084 }
Nick Chengae52e7f2010-06-18 15:39:12 +08003085 acb->acb_flags &= ~ACB_F_ABORT;
3086 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003087}
3088
3089static const char *arcmsr_info(struct Scsi_Host *host)
3090{
3091 struct AdapterControlBlock *acb =
3092 (struct AdapterControlBlock *) host->hostdata;
3093 static char buf[256];
3094 char *type;
3095 int raid6 = 1;
Erich Chen1c57e862006-07-12 08:59:32 -07003096 switch (acb->pdev->device) {
3097 case PCI_DEVICE_ID_ARECA_1110:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003098 case PCI_DEVICE_ID_ARECA_1200:
3099 case PCI_DEVICE_ID_ARECA_1202:
Erich Chen1c57e862006-07-12 08:59:32 -07003100 case PCI_DEVICE_ID_ARECA_1210:
3101 raid6 = 0;
3102 /*FALLTHRU*/
3103 case PCI_DEVICE_ID_ARECA_1120:
3104 case PCI_DEVICE_ID_ARECA_1130:
3105 case PCI_DEVICE_ID_ARECA_1160:
3106 case PCI_DEVICE_ID_ARECA_1170:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003107 case PCI_DEVICE_ID_ARECA_1201:
Erich Chen1c57e862006-07-12 08:59:32 -07003108 case PCI_DEVICE_ID_ARECA_1220:
3109 case PCI_DEVICE_ID_ARECA_1230:
3110 case PCI_DEVICE_ID_ARECA_1260:
3111 case PCI_DEVICE_ID_ARECA_1270:
3112 case PCI_DEVICE_ID_ARECA_1280:
3113 type = "SATA";
3114 break;
3115 case PCI_DEVICE_ID_ARECA_1380:
3116 case PCI_DEVICE_ID_ARECA_1381:
3117 case PCI_DEVICE_ID_ARECA_1680:
3118 case PCI_DEVICE_ID_ARECA_1681:
Nick Chengcdd3cb12010-07-13 20:03:04 +08003119 case PCI_DEVICE_ID_ARECA_1880:
Erich Chen1c57e862006-07-12 08:59:32 -07003120 type = "SAS";
3121 break;
3122 default:
3123 type = "X-TYPE";
3124 break;
3125 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003126 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
Erich Chen1c57e862006-07-12 08:59:32 -07003127 type, raid6 ? "( RAID6 capable)" : "",
3128 ARCMSR_DRIVER_VERSION);
3129 return buf;
3130}