Tony Lindgren | 8b8b091 | 2012-07-10 02:05:46 -0700 | [diff] [blame^] | 1 | One-register-per-pin type device tree based pinctrl driver |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : "pinctrl-single" |
| 5 | |
| 6 | - reg : offset and length of the register set for the mux registers |
| 7 | |
| 8 | - pinctrl-single,register-width : pinmux register access width in bits |
| 9 | |
| 10 | - pinctrl-single,function-mask : mask of allowed pinmux function bits |
| 11 | in the pinmux register |
| 12 | |
| 13 | Optional properties: |
| 14 | - pinctrl-single,function-off : function off mode for disabled state if |
| 15 | available and same for all registers; if not specified, disabling of |
| 16 | pin functions is ignored |
| 17 | |
| 18 | This driver assumes that there is only one register for each pin, |
| 19 | and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt |
| 20 | document in this directory. |
| 21 | |
| 22 | The pin configuration nodes for pinctrl-single are specified as pinctrl |
| 23 | register offset and value pairs using pinctrl-single,pins. Only the bits |
| 24 | specified in pinctrl-single,function-mask are updated. For example, setting |
| 25 | a pin for a device could be done with: |
| 26 | |
| 27 | pinctrl-single,pins = <0xdc 0x118>; |
| 28 | |
| 29 | Where 0xdc is the offset from the pinctrl register base address for the |
| 30 | device pinctrl register, and 0x118 contains the desired value of the |
| 31 | pinctrl register. See the device example and static board pins example |
| 32 | below for more information. |
| 33 | |
| 34 | Example: |
| 35 | |
| 36 | /* SoC common file */ |
| 37 | |
| 38 | /* first controller instance for pins in core domain */ |
| 39 | pmx_core: pinmux@4a100040 { |
| 40 | compatible = "pinctrl-single"; |
| 41 | reg = <0x4a100040 0x0196>; |
| 42 | #address-cells = <1>; |
| 43 | #size-cells = <0>; |
| 44 | pinctrl-single,register-width = <16>; |
| 45 | pinctrl-single,function-mask = <0xffff>; |
| 46 | }; |
| 47 | |
| 48 | /* second controller instance for pins in wkup domain */ |
| 49 | pmx_wkup: pinmux@4a31e040 { |
| 50 | compatible = "pinctrl-single; |
| 51 | reg = <0x4a31e040 0x0038>; |
| 52 | #address-cells = <1>; |
| 53 | #size-cells = <0>; |
| 54 | pinctrl-single,register-width = <16>; |
| 55 | pinctrl-single,function-mask = <0xffff>; |
| 56 | }; |
| 57 | |
| 58 | |
| 59 | /* board specific .dts file */ |
| 60 | |
| 61 | &pmx_core { |
| 62 | |
| 63 | /* |
| 64 | * map all board specific static pins enabled by the pinctrl driver |
| 65 | * itself during the boot (or just set them up in the bootloader) |
| 66 | */ |
| 67 | pinctrl-names = "default"; |
| 68 | pinctrl-0 = <&board_pins>; |
| 69 | |
| 70 | board_pins: pinmux_board_pins { |
| 71 | pinctrl-single,pins = < |
| 72 | 0x6c 0xf |
| 73 | 0x6e 0xf |
| 74 | 0x70 0xf |
| 75 | 0x72 0xf |
| 76 | >; |
| 77 | }; |
| 78 | |
| 79 | /* map uart2 pins */ |
| 80 | uart2_pins: pinmux_uart2_pins { |
| 81 | pinctrl-single,pins = < |
| 82 | 0xd8 0x118 |
| 83 | 0xda 0 |
| 84 | 0xdc 0x118 |
| 85 | 0xde 0 |
| 86 | >; |
| 87 | }; |
| 88 | }; |
| 89 | |
| 90 | &uart2 { |
| 91 | pinctrl-names = "default"; |
| 92 | pinctrl-0 = <&uart2_pins>; |
| 93 | }; |