| Chris Zankel | 5a0015d | 2005-06-23 22:01:16 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * arch/xtensa/pci-dma.c | 
 | 3 |  * | 
 | 4 |  * DMA coherent memory allocation. | 
 | 5 |  * | 
 | 6 |  * This program is free software; you can redistribute  it and/or modify it | 
 | 7 |  * under  the terms of  the GNU General  Public License as published by the | 
 | 8 |  * Free Software Foundation;  either version 2 of the  License, or (at your | 
 | 9 |  * option) any later version. | 
 | 10 |  * | 
 | 11 |  * Copyright (C) 2002 - 2005 Tensilica Inc. | 
 | 12 |  * | 
 | 13 |  * Based on version for i386. | 
 | 14 |  * | 
 | 15 |  * Chris Zankel <chris@zankel.net> | 
 | 16 |  * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com> | 
 | 17 |  */ | 
 | 18 |  | 
 | 19 | #include <linux/types.h> | 
 | 20 | #include <linux/mm.h> | 
 | 21 | #include <linux/string.h> | 
 | 22 | #include <linux/pci.h> | 
 | 23 | #include <asm/io.h> | 
 | 24 | #include <asm/cacheflush.h> | 
 | 25 |  | 
 | 26 | /* | 
 | 27 |  * Note: We assume that the full memory space is always mapped to 'kseg' | 
 | 28 |  *	 Otherwise we have to use page attributes (not implemented). | 
 | 29 |  */ | 
 | 30 |  | 
 | 31 | void * | 
| Al Viro | 5fb5cbe | 2005-10-21 03:21:48 -0400 | [diff] [blame] | 32 | dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) | 
| Chris Zankel | 5a0015d | 2005-06-23 22:01:16 -0700 | [diff] [blame] | 33 | { | 
 | 34 | 	void *ret; | 
 | 35 |  | 
 | 36 | 	/* ignore region speicifiers */ | 
 | 37 | 	gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); | 
 | 38 |  | 
 | 39 | 	if (dev == NULL || (*dev->dma_mask < 0xffffffff)) | 
 | 40 | 		gfp |= GFP_DMA; | 
 | 41 | 	ret = (void *)__get_free_pages(gfp, get_order(size)); | 
 | 42 |  | 
 | 43 | 	if (ret != NULL) { | 
 | 44 | 		memset(ret, 0, size); | 
 | 45 | 		*handle = virt_to_bus(ret); | 
 | 46 | 	} | 
 | 47 | 	return (void*) BYPASS_ADDR((unsigned long)ret); | 
 | 48 | } | 
 | 49 |  | 
 | 50 | void dma_free_coherent(struct device *hwdev, size_t size, | 
 | 51 | 			 void *vaddr, dma_addr_t dma_handle) | 
 | 52 | { | 
 | 53 | 	free_pages(CACHED_ADDR((unsigned long)vaddr), get_order(size)); | 
 | 54 | } | 
 | 55 |  | 
 | 56 |  | 
 | 57 | void consistent_sync(void *vaddr, size_t size, int direction) | 
 | 58 | { | 
 | 59 | 	switch (direction) { | 
 | 60 | 	case PCI_DMA_NONE: | 
 | 61 | 		BUG(); | 
 | 62 | 	case PCI_DMA_FROMDEVICE:        /* invalidate only */ | 
 | 63 | 		__invalidate_dcache_range((unsigned long)vaddr, | 
 | 64 | 				          (unsigned long)size); | 
 | 65 | 		break; | 
 | 66 |  | 
 | 67 | 	case PCI_DMA_TODEVICE:          /* writeback only */ | 
 | 68 | 	case PCI_DMA_BIDIRECTIONAL:     /* writeback and invalidate */ | 
 | 69 | 		__flush_invalidate_dcache_range((unsigned long)vaddr, | 
 | 70 | 				    		(unsigned long)size); | 
 | 71 | 		break; | 
 | 72 | 	} | 
 | 73 | } |