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Hans Verkuil1c1e45d2008-04-28 20:24:33 -03001/*
2 * cx18 I2C functions
3 *
4 * Derived from ivtv-i2c.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
Andy Walls1ed9dcc2008-11-22 01:37:34 -03007 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -03008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include "cx18-driver.h"
Andy Wallsb1526422008-08-30 16:03:44 -030026#include "cx18-io.h"
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030027#include "cx18-cards.h"
28#include "cx18-gpio.h"
Adrian Bunk50510992008-05-05 18:25:22 -030029#include "cx18-i2c.h"
Andy Wallsced07372008-11-02 10:59:04 -030030#include "cx18-irq.h"
Andy Walls8ca95562009-07-28 11:48:18 -030031#include <media/ir-kbd-i2c.h>
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030032
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030033#define CX18_REG_I2C_1_WR 0xf15000
34#define CX18_REG_I2C_1_RD 0xf15008
35#define CX18_REG_I2C_2_WR 0xf25100
36#define CX18_REG_I2C_2_RD 0xf25108
37
38#define SETSCL_BIT 0x0001
39#define SETSDL_BIT 0x0002
40#define GETSCL_BIT 0x0004
41#define GETSDL_BIT 0x0008
42
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030043#define CX18_CS5345_I2C_ADDR 0x4c
Andy Walls8ca95562009-07-28 11:48:18 -030044#define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70
45#define CX18_Z8F0811_IR_RX_I2C_ADDR 0x71
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030046
47/* This array should match the CX18_HW_ defines */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030048static const u8 hw_addrs[] = {
Andy Walls8ca95562009-07-28 11:48:18 -030049 0, /* CX18_HW_TUNER */
50 0, /* CX18_HW_TVEEPROM */
51 CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
52 0, /* CX18_HW_DVB */
53 0, /* CX18_HW_418_AV */
54 0, /* CX18_HW_GPIO_MUX */
55 0, /* CX18_HW_GPIO_RESET_CTRL */
56 CX18_Z8F0811_IR_TX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_TX_HAUP */
57 CX18_Z8F0811_IR_RX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_RX_HAUP */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030058};
59
60/* This array should match the CX18_HW_ defines */
61/* This might well become a card-specific array */
62static const u8 hw_bus[] = {
Andy Wallsff2a2002009-02-20 23:52:13 -030063 1, /* CX18_HW_TUNER */
64 0, /* CX18_HW_TVEEPROM */
65 0, /* CX18_HW_CS5345 */
66 0, /* CX18_HW_DVB */
67 0, /* CX18_HW_418_AV */
Andy Wallseefe1012009-02-21 18:42:49 -030068 0, /* CX18_HW_GPIO_MUX */
69 0, /* CX18_HW_GPIO_RESET_CTRL */
Andy Walls8ca95562009-07-28 11:48:18 -030070 0, /* CX18_HW_Z8F0811_IR_TX_HAUP */
71 0, /* CX18_HW_Z8F0811_IR_RX_HAUP */
Andy Wallsff2a2002009-02-20 23:52:13 -030072};
73
74/* This array should match the CX18_HW_ defines */
75static const char * const hw_modules[] = {
76 "tuner", /* CX18_HW_TUNER */
77 NULL, /* CX18_HW_TVEEPROM */
78 "cs5345", /* CX18_HW_CS5345 */
79 NULL, /* CX18_HW_DVB */
80 NULL, /* CX18_HW_418_AV */
Andy Wallseefe1012009-02-21 18:42:49 -030081 NULL, /* CX18_HW_GPIO_MUX */
82 NULL, /* CX18_HW_GPIO_RESET_CTRL */
Andy Walls8ca95562009-07-28 11:48:18 -030083 NULL, /* CX18_HW_Z8F0811_IR_TX_HAUP */
84 NULL, /* CX18_HW_Z8F0811_IR_RX_HAUP */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030085};
86
87/* This array should match the CX18_HW_ defines */
Jean Delvareaf294862008-05-18 20:49:40 +020088static const char * const hw_devicenames[] = {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030089 "tuner",
90 "tveeprom",
91 "cs5345",
Andy Wallsff2a2002009-02-20 23:52:13 -030092 "cx23418_DTV",
93 "cx23418_AV",
Andy Wallseefe1012009-02-21 18:42:49 -030094 "gpio_mux",
95 "gpio_reset_ctrl",
Andy Walls8ca95562009-07-28 11:48:18 -030096 "ir_tx_z8f0811_haup",
97 "ir_rx_z8f0811_haup",
Hans Verkuil1c1e45d2008-04-28 20:24:33 -030098};
99
Andy Walls8ca95562009-07-28 11:48:18 -0300100static int cx18_i2c_new_ir(struct i2c_adapter *adap, u32 hw, const char *type,
101 u8 addr)
102{
103 struct i2c_board_info info;
104 struct IR_i2c_init_data ir_init_data;
105 unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
106
107 memset(&info, 0, sizeof(struct i2c_board_info));
108 strlcpy(info.type, type, I2C_NAME_SIZE);
109
110 /* Our default information for ir-kbd-i2c.c to use */
111 switch (hw) {
112 case CX18_HW_Z8F0811_IR_RX_HAUP:
113 memset(&ir_init_data, 0, sizeof(struct IR_i2c_init_data));
114 ir_init_data.ir_codes = ir_codes_hauppauge_new;
115 ir_init_data.internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
116 ir_init_data.type = IR_TYPE_RC5;
117 ir_init_data.name = "CX23418 Z8F0811 Hauppauge";
118 info.platform_data = &ir_init_data;
119 break;
120 default:
121 break;
122 }
123
124 return i2c_new_probed_device(adap, &info, addr_list) == NULL ? -1 : 0;
125}
126
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300127int cx18_i2c_register(struct cx18 *cx, unsigned idx)
128{
Andy Wallsff2a2002009-02-20 23:52:13 -0300129 struct v4l2_subdev *sd;
130 int bus = hw_bus[idx];
131 struct i2c_adapter *adap = &cx->i2c_adap[bus];
132 const char *mod = hw_modules[idx];
133 const char *type = hw_devicenames[idx];
134 u32 hw = 1 << idx;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300135
Andy Wallsff2a2002009-02-20 23:52:13 -0300136 if (idx >= ARRAY_SIZE(hw_addrs))
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300137 return -1;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300138
Andy Wallsff2a2002009-02-20 23:52:13 -0300139 if (hw == CX18_HW_TUNER) {
140 /* special tuner group handling */
Hans Verkuile6574f22009-04-01 03:57:53 -0300141 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
142 adap, mod, type, cx->card_i2c->radio);
Andy Wallsff2a2002009-02-20 23:52:13 -0300143 if (sd != NULL)
144 sd->grp_id = hw;
Hans Verkuile6574f22009-04-01 03:57:53 -0300145 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
146 adap, mod, type, cx->card_i2c->demod);
Andy Wallsff2a2002009-02-20 23:52:13 -0300147 if (sd != NULL)
148 sd->grp_id = hw;
Hans Verkuile6574f22009-04-01 03:57:53 -0300149 sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
150 adap, mod, type, cx->card_i2c->tv);
Andy Wallsff2a2002009-02-20 23:52:13 -0300151 if (sd != NULL)
152 sd->grp_id = hw;
153 return sd != NULL ? 0 : -1;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300154 }
155
Andy Walls8ca95562009-07-28 11:48:18 -0300156 if (hw & CX18_HW_Z8F0811_IR_HAUP)
157 return cx18_i2c_new_ir(adap, hw, type, hw_addrs[idx]);
158
Andy Wallsff2a2002009-02-20 23:52:13 -0300159 /* Is it not an I2C device or one we do not wish to register? */
160 if (!hw_addrs[idx])
161 return -1;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300162
Andy Walls8ca95562009-07-28 11:48:18 -0300163 /* It's an I2C device other than an analog tuner or IR chip */
Hans Verkuile6574f22009-04-01 03:57:53 -0300164 sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx]);
Andy Wallsff2a2002009-02-20 23:52:13 -0300165 if (sd != NULL)
166 sd->grp_id = hw;
167 return sd != NULL ? 0 : -1;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300168}
169
Andy Wallsff2a2002009-02-20 23:52:13 -0300170/* Find the first member of the subdev group id in hw */
171struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300172{
Andy Wallsff2a2002009-02-20 23:52:13 -0300173 struct v4l2_subdev *result = NULL;
174 struct v4l2_subdev *sd;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300175
Andy Wallsff2a2002009-02-20 23:52:13 -0300176 spin_lock(&cx->v4l2_dev.lock);
177 v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
178 if (sd->grp_id == hw) {
179 result = sd;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300180 break;
181 }
182 }
Andy Wallsff2a2002009-02-20 23:52:13 -0300183 spin_unlock(&cx->v4l2_dev.lock);
184 return result;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300185}
186
187static void cx18_setscl(void *data, int state)
188{
189 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
190 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
191 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
Andy Wallsb1526422008-08-30 16:03:44 -0300192 u32 r = cx18_read_reg(cx, addr);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300193
194 if (state)
Andy Walls3f75c612008-11-16 23:33:41 -0300195 cx18_write_reg(cx, r | SETSCL_BIT, addr);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300196 else
Andy Walls3f75c612008-11-16 23:33:41 -0300197 cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300198}
199
200static void cx18_setsda(void *data, int state)
201{
202 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
203 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
204 u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
Andy Wallsb1526422008-08-30 16:03:44 -0300205 u32 r = cx18_read_reg(cx, addr);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300206
207 if (state)
Andy Walls3f75c612008-11-16 23:33:41 -0300208 cx18_write_reg(cx, r | SETSDL_BIT, addr);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300209 else
Andy Walls3f75c612008-11-16 23:33:41 -0300210 cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300211}
212
213static int cx18_getscl(void *data)
214{
215 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
216 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
217 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
218
Andy Wallsb1526422008-08-30 16:03:44 -0300219 return cx18_read_reg(cx, addr) & GETSCL_BIT;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300220}
221
222static int cx18_getsda(void *data)
223{
224 struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
225 int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
226 u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
227
Andy Wallsb1526422008-08-30 16:03:44 -0300228 return cx18_read_reg(cx, addr) & GETSDL_BIT;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300229}
230
231/* template for i2c-bit-algo */
232static struct i2c_adapter cx18_i2c_adap_template = {
233 .name = "cx18 i2c driver",
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300234 .algo = NULL, /* set by i2c-algo-bit */
235 .algo_data = NULL, /* filled from template */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300236 .owner = THIS_MODULE,
237};
238
239#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
240#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
241
242static struct i2c_algo_bit_data cx18_i2c_algo_template = {
243 .setsda = cx18_setsda,
244 .setscl = cx18_setscl,
245 .getsda = cx18_getsda,
246 .getscl = cx18_getscl,
247 .udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
248 .timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
249};
250
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300251/* init + register i2c algo-bit adapter */
252int init_cx18_i2c(struct cx18 *cx)
253{
Jean Delvare272aa392009-04-17 10:56:51 -0300254 int i, err;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300255 CX18_DEBUG_I2C("i2c init\n");
256
257 for (i = 0; i < 2; i++) {
Andy Wallsff2a2002009-02-20 23:52:13 -0300258 /* Setup algorithm for adapter */
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300259 memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
260 sizeof(struct i2c_algo_bit_data));
261 cx->i2c_algo_cb_data[i].cx = cx;
262 cx->i2c_algo_cb_data[i].bus_index = i;
263 cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300264
Andy Wallsff2a2002009-02-20 23:52:13 -0300265 /* Setup adapter */
266 memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
267 sizeof(struct i2c_adapter));
268 cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300269 sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
Andy Walls5811cf92009-02-14 17:08:37 -0300270 " #%d-%d", cx->instance, i);
Andy Wallsff2a2002009-02-20 23:52:13 -0300271 i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
Andy Walls3d059132009-01-10 21:54:39 -0300272 cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300273 }
274
Andy Wallsb1526422008-08-30 16:03:44 -0300275 if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300276 /* Reset/Unreset I2C hardware block */
Andy Wallsb1526422008-08-30 16:03:44 -0300277 /* Clock select 220MHz */
Andy Wallsced07372008-11-02 10:59:04 -0300278 cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
279 0x00000000, 0x10001000);
Andy Wallsb1526422008-08-30 16:03:44 -0300280 /* Clock Enable */
Andy Wallsced07372008-11-02 10:59:04 -0300281 cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
282 0x00001000, 0x10001000);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300283 }
284 /* courtesy of Steven Toth <stoth@hauppauge.com> */
Andy Wallsced07372008-11-02 10:59:04 -0300285 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300286 mdelay(10);
Andy Wallsced07372008-11-02 10:59:04 -0300287 cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300288 mdelay(10);
Andy Wallsced07372008-11-02 10:59:04 -0300289 cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
Andy Walls53ad02e2008-07-06 19:36:52 -0300290 mdelay(10);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300291
Andy Wallsb1526422008-08-30 16:03:44 -0300292 /* Set to edge-triggered intrs. */
Andy Wallsced07372008-11-02 10:59:04 -0300293 cx18_write_reg(cx, 0x00c00000, 0xc730c8);
Andy Wallsb1526422008-08-30 16:03:44 -0300294 /* Clear any stale intrs */
Andy Wallsced07372008-11-02 10:59:04 -0300295 cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
296 ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300297
298 /* Hw I2C1 Clock Freq ~100kHz */
Andy Walls3f75c612008-11-16 23:33:41 -0300299 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300300 cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
301 cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
302
303 /* Hw I2C2 Clock Freq ~100kHz */
Andy Walls3f75c612008-11-16 23:33:41 -0300304 cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300305 cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
306 cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
307
Andy Wallseefe1012009-02-21 18:42:49 -0300308 cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
309 core, reset, (u32) CX18_GPIO_RESET_I2C);
Andy Walls1f09e8a2008-06-22 01:27:00 -0300310
Jean Delvare272aa392009-04-17 10:56:51 -0300311 err = i2c_bit_add_bus(&cx->i2c_adap[0]);
312 if (err)
313 goto err;
314 err = i2c_bit_add_bus(&cx->i2c_adap[1]);
315 if (err)
316 goto err_del_bus_0;
317 return 0;
318
319 err_del_bus_0:
320 i2c_del_adapter(&cx->i2c_adap[0]);
321 err:
322 return err;
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300323}
324
325void exit_cx18_i2c(struct cx18 *cx)
326{
327 int i;
328 CX18_DEBUG_I2C("i2c exit\n");
Andy Wallsb1526422008-08-30 16:03:44 -0300329 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
330 CX18_REG_I2C_1_WR);
331 cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
332 CX18_REG_I2C_2_WR);
Hans Verkuil1c1e45d2008-04-28 20:24:33 -0300333
334 for (i = 0; i < 2; i++) {
335 i2c_del_adapter(&cx->i2c_adap[i]);
336 }
337}
338
339/*
340 Hauppauge HVR1600 should have:
341 32 cx24227
342 98 unknown
343 a0 eeprom
344 c2 tuner
345 e? zilog ir
346 */