| Sascha Hauer | cb07625 | 2011-01-03 10:33:01 +0100 | [diff] [blame] | 1 | /* | 
|  | 2 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | 
|  | 3 | * Copyright (C) 2010 Freescale Semiconductor, Inc. | 
|  | 4 | * | 
|  | 5 | * This program is free software; you can redistribute it and/or modify it | 
|  | 6 | * under the terms of the GNU General Public License as published by the | 
|  | 7 | * Free Software Foundation; either version 2 of the License, or (at your | 
|  | 8 | * option) any later version. | 
|  | 9 | * | 
|  | 10 | * This program is distributed in the hope that it will be useful, but | 
|  | 11 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | 
|  | 12 | * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License | 
|  | 13 | * for more details. | 
|  | 14 | */ | 
|  | 15 |  | 
|  | 16 | #include <linux/platform_device.h> | 
|  | 17 | #include <linux/io.h> | 
|  | 18 |  | 
|  | 19 | #include <mach/hardware.h> | 
| Arnd Bergmann | 82906b1 | 2012-08-24 15:14:29 +0200 | [diff] [blame] | 20 | #include <linux/platform_data/usb-ehci-mxc.h> | 
| Sascha Hauer | cb07625 | 2011-01-03 10:33:01 +0100 | [diff] [blame] | 21 |  | 
|  | 22 | #define USBCTRL_OTGBASE_OFFSET	0x600 | 
|  | 23 |  | 
|  | 24 | #define MX31_OTG_SIC_SHIFT	29 | 
|  | 25 | #define MX31_OTG_SIC_MASK	(0x3 << MX31_OTG_SIC_SHIFT) | 
|  | 26 | #define MX31_OTG_PM_BIT		(1 << 24) | 
|  | 27 |  | 
|  | 28 | #define MX31_H2_SIC_SHIFT	21 | 
|  | 29 | #define MX31_H2_SIC_MASK	(0x3 << MX31_H2_SIC_SHIFT) | 
|  | 30 | #define MX31_H2_PM_BIT		(1 << 16) | 
|  | 31 | #define MX31_H2_DT_BIT		(1 << 5) | 
|  | 32 |  | 
|  | 33 | #define MX31_H1_SIC_SHIFT	13 | 
|  | 34 | #define MX31_H1_SIC_MASK	(0x3 << MX31_H1_SIC_SHIFT) | 
|  | 35 | #define MX31_H1_PM_BIT		(1 << 8) | 
|  | 36 | #define MX31_H1_DT_BIT		(1 << 4) | 
|  | 37 |  | 
|  | 38 | int mx31_initialize_usb_hw(int port, unsigned int flags) | 
|  | 39 | { | 
|  | 40 | unsigned int v; | 
|  | 41 |  | 
|  | 42 | v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); | 
|  | 43 |  | 
|  | 44 | switch (port) { | 
|  | 45 | case 0:	/* OTG port */ | 
|  | 46 | v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT); | 
|  | 47 | v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT; | 
|  | 48 |  | 
|  | 49 | if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) | 
|  | 50 | v |= MX31_OTG_PM_BIT; | 
|  | 51 |  | 
|  | 52 | break; | 
|  | 53 | case 1: /* H1 port */ | 
|  | 54 | v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT); | 
|  | 55 | v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT; | 
|  | 56 |  | 
|  | 57 | if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) | 
|  | 58 | v |= MX31_H1_PM_BIT; | 
|  | 59 |  | 
|  | 60 | if (!(flags & MXC_EHCI_TTL_ENABLED)) | 
|  | 61 | v |= MX31_H1_DT_BIT; | 
|  | 62 |  | 
|  | 63 | break; | 
|  | 64 | case 2:	/* H2 port */ | 
|  | 65 | v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT); | 
|  | 66 | v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT; | 
|  | 67 |  | 
|  | 68 | if (!(flags & MXC_EHCI_POWER_PINS_ENABLED)) | 
|  | 69 | v |= MX31_H2_PM_BIT; | 
|  | 70 |  | 
|  | 71 | if (!(flags & MXC_EHCI_TTL_ENABLED)) | 
|  | 72 | v |= MX31_H2_DT_BIT; | 
|  | 73 |  | 
|  | 74 | break; | 
|  | 75 | default: | 
|  | 76 | return -EINVAL; | 
|  | 77 | } | 
|  | 78 |  | 
|  | 79 | writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); | 
|  | 80 |  | 
|  | 81 | return 0; | 
|  | 82 | } |