blob: 26a3bc834fea79f6b59690b9555b022dfd8700ba [file] [log] [blame]
Rong Wang161e7732011-11-17 23:17:04 +08001/*
2 * Driver for CSR SiRFprimaII onboard UARTs.
3 *
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include <linux/module.h>
10#include <linux/ioport.h>
11#include <linux/platform_device.h>
12#include <linux/init.h>
13#include <linux/sysrq.h>
14#include <linux/console.h>
15#include <linux/tty.h>
16#include <linux/tty_flip.h>
17#include <linux/serial_core.h>
18#include <linux/serial.h>
19#include <linux/clk.h>
20#include <linux/of.h>
21#include <linux/slab.h>
22#include <linux/io.h>
23#include <asm/irq.h>
24#include <asm/mach/irq.h>
Linus Walleij5c9bdc32012-02-16 19:36:21 +010025#include <linux/pinctrl/consumer.h>
Rong Wang161e7732011-11-17 23:17:04 +080026
27#include "sirfsoc_uart.h"
28
29static unsigned int
30sirfsoc_uart_pio_tx_chars(struct sirfsoc_uart_port *sirfport, int count);
31static unsigned int
32sirfsoc_uart_pio_rx_chars(struct uart_port *port, unsigned int max_rx_count);
33static struct uart_driver sirfsoc_uart_drv;
34
35static const struct sirfsoc_baudrate_to_regv baudrate_to_regv[] = {
36 {4000000, 2359296},
37 {3500000, 1310721},
38 {3000000, 1572865},
39 {2500000, 1245186},
40 {2000000, 1572866},
41 {1500000, 1245188},
42 {1152000, 1638404},
43 {1000000, 1572869},
44 {921600, 1114120},
45 {576000, 1245196},
46 {500000, 1245198},
47 {460800, 1572876},
48 {230400, 1310750},
49 {115200, 1310781},
50 {57600, 1310843},
51 {38400, 1114328},
52 {19200, 1114545},
53 {9600, 1114979},
54};
55
56static struct sirfsoc_uart_port sirfsoc_uart_ports[SIRFSOC_UART_NR] = {
57 [0] = {
58 .port = {
59 .iotype = UPIO_MEM,
60 .flags = UPF_BOOT_AUTOCONF,
61 .line = 0,
62 },
63 },
64 [1] = {
65 .port = {
66 .iotype = UPIO_MEM,
67 .flags = UPF_BOOT_AUTOCONF,
68 .line = 1,
69 },
70 },
71 [2] = {
72 .port = {
73 .iotype = UPIO_MEM,
74 .flags = UPF_BOOT_AUTOCONF,
75 .line = 2,
76 },
77 },
Barry Song5425e032012-12-25 17:32:04 +080078 [3] = {
79 .port = {
80 .iotype = UPIO_MEM,
81 .flags = UPF_BOOT_AUTOCONF,
82 .line = 3,
83 },
84 },
85 [4] = {
86 .port = {
87 .iotype = UPIO_MEM,
88 .flags = UPF_BOOT_AUTOCONF,
89 .line = 4,
90 },
91 },
Rong Wang161e7732011-11-17 23:17:04 +080092};
93
94static inline struct sirfsoc_uart_port *to_sirfport(struct uart_port *port)
95{
96 return container_of(port, struct sirfsoc_uart_port, port);
97}
98
99static inline unsigned int sirfsoc_uart_tx_empty(struct uart_port *port)
100{
101 unsigned long reg;
102 reg = rd_regl(port, SIRFUART_TX_FIFO_STATUS);
103 if (reg & SIRFUART_FIFOEMPTY_MASK(port))
104 return TIOCSER_TEMT;
105 else
106 return 0;
107}
108
109static unsigned int sirfsoc_uart_get_mctrl(struct uart_port *port)
110{
111 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
112 if (!(sirfport->ms_enabled)) {
113 goto cts_asserted;
114 } else if (sirfport->hw_flow_ctrl) {
115 if (!(rd_regl(port, SIRFUART_AFC_CTRL) &
116 SIRFUART_CTS_IN_STATUS))
117 goto cts_asserted;
118 else
119 goto cts_deasserted;
120 }
121cts_deasserted:
122 return TIOCM_CAR | TIOCM_DSR;
123cts_asserted:
124 return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
125}
126
127static void sirfsoc_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
128{
129 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
130 unsigned int assert = mctrl & TIOCM_RTS;
131 unsigned int val = assert ? SIRFUART_AFC_CTRL_RX_THD : 0x0;
132 unsigned int current_val;
133 if (sirfport->hw_flow_ctrl) {
134 current_val = rd_regl(port, SIRFUART_AFC_CTRL) & ~0xFF;
135 val |= current_val;
136 wr_regl(port, SIRFUART_AFC_CTRL, val);
137 }
138}
139
140static void sirfsoc_uart_stop_tx(struct uart_port *port)
141{
Barry Song909102d2013-08-07 13:35:38 +0800142 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
Rong Wang161e7732011-11-17 23:17:04 +0800143 unsigned int regv;
Barry Song909102d2013-08-07 13:35:38 +0800144
145 if (!sirfport->is_marco) {
146 regv = rd_regl(port, SIRFUART_INT_EN);
147 wr_regl(port, SIRFUART_INT_EN, regv & ~SIRFUART_TX_INT_EN);
148 } else {
149 wr_regl(port, SIRFUART_INT_EN_CLR, SIRFUART_TX_INT_EN);
150 }
Rong Wang161e7732011-11-17 23:17:04 +0800151}
152
153void sirfsoc_uart_start_tx(struct uart_port *port)
154{
155 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
156 unsigned long regv;
Barry Song909102d2013-08-07 13:35:38 +0800157
Rong Wang161e7732011-11-17 23:17:04 +0800158 sirfsoc_uart_pio_tx_chars(sirfport, 1);
159 wr_regl(port, SIRFUART_TX_FIFO_OP, SIRFUART_TX_FIFO_START);
Barry Song909102d2013-08-07 13:35:38 +0800160
161 if (!sirfport->is_marco) {
162 regv = rd_regl(port, SIRFUART_INT_EN);
163 wr_regl(port, SIRFUART_INT_EN, regv | SIRFUART_TX_INT_EN);
164 } else {
165 wr_regl(port, SIRFUART_INT_EN, SIRFUART_TX_INT_EN);
166 }
Rong Wang161e7732011-11-17 23:17:04 +0800167}
168
169static void sirfsoc_uart_stop_rx(struct uart_port *port)
170{
Barry Song909102d2013-08-07 13:35:38 +0800171 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
Rong Wang161e7732011-11-17 23:17:04 +0800172 unsigned long regv;
Barry Song909102d2013-08-07 13:35:38 +0800173
Rong Wang161e7732011-11-17 23:17:04 +0800174 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
Barry Song909102d2013-08-07 13:35:38 +0800175
176 if (!sirfport->is_marco) {
177 regv = rd_regl(port, SIRFUART_INT_EN);
178 wr_regl(port, SIRFUART_INT_EN, regv & ~SIRFUART_RX_IO_INT_EN);
179 } else {
180 wr_regl(port, SIRFUART_INT_EN_CLR, SIRFUART_RX_IO_INT_EN);
181 }
Rong Wang161e7732011-11-17 23:17:04 +0800182}
183
184static void sirfsoc_uart_disable_ms(struct uart_port *port)
185{
186 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
187 unsigned long reg;
Barry Song909102d2013-08-07 13:35:38 +0800188
Rong Wang161e7732011-11-17 23:17:04 +0800189 sirfport->ms_enabled = 0;
190 if (!sirfport->hw_flow_ctrl)
191 return;
Barry Song909102d2013-08-07 13:35:38 +0800192
Rong Wang161e7732011-11-17 23:17:04 +0800193 reg = rd_regl(port, SIRFUART_AFC_CTRL);
194 wr_regl(port, SIRFUART_AFC_CTRL, reg & ~0x3FF);
Barry Song909102d2013-08-07 13:35:38 +0800195
196 if (!sirfport->is_marco) {
197 reg = rd_regl(port, SIRFUART_INT_EN);
198 wr_regl(port, SIRFUART_INT_EN, reg & ~SIRFUART_CTS_INT_EN);
199 } else {
200 wr_regl(port, SIRFUART_INT_EN_CLR, SIRFUART_CTS_INT_EN);
201 }
Rong Wang161e7732011-11-17 23:17:04 +0800202}
203
204static void sirfsoc_uart_enable_ms(struct uart_port *port)
205{
206 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
207 unsigned long reg;
208 unsigned long flg;
Barry Song909102d2013-08-07 13:35:38 +0800209
Rong Wang161e7732011-11-17 23:17:04 +0800210 if (!sirfport->hw_flow_ctrl)
211 return;
212 flg = SIRFUART_AFC_RX_EN | SIRFUART_AFC_TX_EN;
213 reg = rd_regl(port, SIRFUART_AFC_CTRL);
214 wr_regl(port, SIRFUART_AFC_CTRL, reg | flg);
Barry Song909102d2013-08-07 13:35:38 +0800215
216 if (!sirfport->is_marco) {
217 reg = rd_regl(port, SIRFUART_INT_EN);
218 wr_regl(port, SIRFUART_INT_EN, reg | SIRFUART_CTS_INT_EN);
219 } else {
220 wr_regl(port, SIRFUART_INT_EN, SIRFUART_CTS_INT_EN);
221 }
222
Rong Wang161e7732011-11-17 23:17:04 +0800223 uart_handle_cts_change(port,
224 !(rd_regl(port, SIRFUART_AFC_CTRL) & SIRFUART_CTS_IN_STATUS));
225 sirfport->ms_enabled = 1;
226}
227
228static void sirfsoc_uart_break_ctl(struct uart_port *port, int break_state)
229{
230 unsigned long ulcon = rd_regl(port, SIRFUART_LINE_CTRL);
231 if (break_state)
232 ulcon |= SIRFUART_SET_BREAK;
233 else
234 ulcon &= ~SIRFUART_SET_BREAK;
235 wr_regl(port, SIRFUART_LINE_CTRL, ulcon);
236}
237
238static unsigned int
239sirfsoc_uart_pio_rx_chars(struct uart_port *port, unsigned int max_rx_count)
240{
241 unsigned int ch, rx_count = 0;
Rong Wang161e7732011-11-17 23:17:04 +0800242
243 while (!(rd_regl(port, SIRFUART_RX_FIFO_STATUS) &
244 SIRFUART_FIFOEMPTY_MASK(port))) {
245 ch = rd_regl(port, SIRFUART_RX_FIFO_DATA) | SIRFUART_DUMMY_READ;
246 if (unlikely(uart_handle_sysrq_char(port, ch)))
247 continue;
248 uart_insert_char(port, 0, 0, ch, TTY_NORMAL);
249 rx_count++;
250 if (rx_count >= max_rx_count)
251 break;
252 }
253
254 port->icount.rx += rx_count;
Jiri Slaby2e124b42013-01-03 15:53:06 +0100255 tty_flip_buffer_push(&port->state->port);
Rong Wang161e7732011-11-17 23:17:04 +0800256
257 return rx_count;
258}
259
260static unsigned int
261sirfsoc_uart_pio_tx_chars(struct sirfsoc_uart_port *sirfport, int count)
262{
263 struct uart_port *port = &sirfport->port;
264 struct circ_buf *xmit = &port->state->xmit;
265 unsigned int num_tx = 0;
266 while (!uart_circ_empty(xmit) &&
267 !(rd_regl(port, SIRFUART_TX_FIFO_STATUS) &
268 SIRFUART_FIFOFULL_MASK(port)) &&
269 count--) {
270 wr_regl(port, SIRFUART_TX_FIFO_DATA, xmit->buf[xmit->tail]);
271 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
272 port->icount.tx++;
273 num_tx++;
274 }
275 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
276 uart_write_wakeup(port);
277 return num_tx;
278}
279
280static irqreturn_t sirfsoc_uart_isr(int irq, void *dev_id)
281{
282 unsigned long intr_status;
283 unsigned long cts_status;
284 unsigned long flag = TTY_NORMAL;
285 struct sirfsoc_uart_port *sirfport = (struct sirfsoc_uart_port *)dev_id;
286 struct uart_port *port = &sirfport->port;
287 struct uart_state *state = port->state;
288 struct circ_buf *xmit = &port->state->xmit;
Barry Song5425e032012-12-25 17:32:04 +0800289 spin_lock(&port->lock);
Rong Wang161e7732011-11-17 23:17:04 +0800290 intr_status = rd_regl(port, SIRFUART_INT_STATUS);
291 wr_regl(port, SIRFUART_INT_STATUS, intr_status);
292 intr_status &= rd_regl(port, SIRFUART_INT_EN);
293 if (unlikely(intr_status & (SIRFUART_ERR_INT_STAT))) {
294 if (intr_status & SIRFUART_RXD_BREAK) {
295 if (uart_handle_break(port))
296 goto recv_char;
297 uart_insert_char(port, intr_status,
298 SIRFUART_RX_OFLOW, 0, TTY_BREAK);
Barry Song5425e032012-12-25 17:32:04 +0800299 spin_unlock(&port->lock);
Rong Wang161e7732011-11-17 23:17:04 +0800300 return IRQ_HANDLED;
301 }
302 if (intr_status & SIRFUART_RX_OFLOW)
303 port->icount.overrun++;
304 if (intr_status & SIRFUART_FRM_ERR) {
305 port->icount.frame++;
306 flag = TTY_FRAME;
307 }
308 if (intr_status & SIRFUART_PARITY_ERR)
309 flag = TTY_PARITY;
310 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_RESET);
311 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
312 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_START);
313 intr_status &= port->read_status_mask;
314 uart_insert_char(port, intr_status,
315 SIRFUART_RX_OFLOW_INT, 0, flag);
316 }
317recv_char:
318 if (intr_status & SIRFUART_CTS_INT_EN) {
319 cts_status = !(rd_regl(port, SIRFUART_AFC_CTRL) &
320 SIRFUART_CTS_IN_STATUS);
321 if (cts_status != 0) {
322 uart_handle_cts_change(port, 1);
323 } else {
324 uart_handle_cts_change(port, 0);
325 wake_up_interruptible(&state->port.delta_msr_wait);
326 }
327 }
328 if (intr_status & SIRFUART_RX_IO_INT_EN)
329 sirfsoc_uart_pio_rx_chars(port, SIRFSOC_UART_IO_RX_MAX_CNT);
330 if (intr_status & SIRFUART_TX_INT_EN) {
331 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
Barry Song5425e032012-12-25 17:32:04 +0800332 spin_unlock(&port->lock);
Rong Wang161e7732011-11-17 23:17:04 +0800333 return IRQ_HANDLED;
334 } else {
335 sirfsoc_uart_pio_tx_chars(sirfport,
336 SIRFSOC_UART_IO_TX_REASONABLE_CNT);
337 if ((uart_circ_empty(xmit)) &&
338 (rd_regl(port, SIRFUART_TX_FIFO_STATUS) &
339 SIRFUART_FIFOEMPTY_MASK(port)))
340 sirfsoc_uart_stop_tx(port);
341 }
342 }
Barry Song5425e032012-12-25 17:32:04 +0800343 spin_unlock(&port->lock);
Rong Wang161e7732011-11-17 23:17:04 +0800344 return IRQ_HANDLED;
345}
346
347static void sirfsoc_uart_start_rx(struct uart_port *port)
348{
Barry Song909102d2013-08-07 13:35:38 +0800349 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
350
351 if (!sirfport->is_marco) {
352 unsigned long regv;
353 regv = rd_regl(port, SIRFUART_INT_EN);
354 wr_regl(port, SIRFUART_INT_EN, regv | SIRFUART_RX_IO_INT_EN);
355 } else {
356 wr_regl(port, SIRFUART_INT_EN, SIRFUART_RX_IO_INT_EN);
357 }
358
Rong Wang161e7732011-11-17 23:17:04 +0800359 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_RESET);
360 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
361 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_START);
362}
363
364static unsigned int
365sirfsoc_calc_sample_div(unsigned long baud_rate,
366 unsigned long ioclk_rate, unsigned long *setted_baud)
367{
368 unsigned long min_delta = ~0UL;
369 unsigned short sample_div;
370 unsigned int regv = 0;
371 unsigned long ioclk_div;
372 unsigned long baud_tmp;
373 int temp_delta;
374
375 for (sample_div = SIRF_MIN_SAMPLE_DIV;
376 sample_div <= SIRF_MAX_SAMPLE_DIV; sample_div++) {
377 ioclk_div = (ioclk_rate / (baud_rate * (sample_div + 1))) - 1;
378 if (ioclk_div > SIRF_IOCLK_DIV_MAX)
379 continue;
380 baud_tmp = ioclk_rate / ((ioclk_div + 1) * (sample_div + 1));
381 temp_delta = baud_tmp - baud_rate;
382 temp_delta = (temp_delta > 0) ? temp_delta : -temp_delta;
383 if (temp_delta < min_delta) {
384 regv = regv & (~SIRF_IOCLK_DIV_MASK);
385 regv = regv | ioclk_div;
386 regv = regv & (~SIRF_SAMPLE_DIV_MASK);
387 regv = regv | (sample_div << SIRF_SAMPLE_DIV_SHIFT);
388 min_delta = temp_delta;
389 *setted_baud = baud_tmp;
390 }
391 }
392 return regv;
393}
394
395static void sirfsoc_uart_set_termios(struct uart_port *port,
396 struct ktermios *termios,
397 struct ktermios *old)
398{
399 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
Rong Wang161e7732011-11-17 23:17:04 +0800400 unsigned long config_reg = 0;
401 unsigned long baud_rate;
402 unsigned long setted_baud;
403 unsigned long flags;
404 unsigned long ic;
405 unsigned int clk_div_reg = 0;
406 unsigned long temp_reg_val;
407 unsigned long rx_time_out;
408 int threshold_div;
409 int temp;
410
Rong Wang161e7732011-11-17 23:17:04 +0800411 switch (termios->c_cflag & CSIZE) {
412 default:
413 case CS8:
414 config_reg |= SIRFUART_DATA_BIT_LEN_8;
415 break;
416 case CS7:
417 config_reg |= SIRFUART_DATA_BIT_LEN_7;
418 break;
419 case CS6:
420 config_reg |= SIRFUART_DATA_BIT_LEN_6;
421 break;
422 case CS5:
423 config_reg |= SIRFUART_DATA_BIT_LEN_5;
424 break;
425 }
426 if (termios->c_cflag & CSTOPB)
427 config_reg |= SIRFUART_STOP_BIT_LEN_2;
428 baud_rate = uart_get_baud_rate(port, termios, old, 0, 4000000);
429 spin_lock_irqsave(&port->lock, flags);
430 port->read_status_mask = SIRFUART_RX_OFLOW_INT;
431 port->ignore_status_mask = 0;
432 /* read flags */
433 if (termios->c_iflag & INPCK)
434 port->read_status_mask |=
435 SIRFUART_FRM_ERR_INT | SIRFUART_PARITY_ERR_INT;
436 if (termios->c_iflag & (BRKINT | PARMRK))
437 port->read_status_mask |= SIRFUART_RXD_BREAK_INT;
438 /* ignore flags */
439 if (termios->c_iflag & IGNPAR)
440 port->ignore_status_mask |=
441 SIRFUART_FRM_ERR_INT | SIRFUART_PARITY_ERR_INT;
442 if ((termios->c_cflag & CREAD) == 0)
443 port->ignore_status_mask |= SIRFUART_DUMMY_READ;
444 /* enable parity if PARENB is set*/
445 if (termios->c_cflag & PARENB) {
446 if (termios->c_cflag & CMSPAR) {
447 if (termios->c_cflag & PARODD)
448 config_reg |= SIRFUART_STICK_BIT_MARK;
449 else
450 config_reg |= SIRFUART_STICK_BIT_SPACE;
451 } else if (termios->c_cflag & PARODD) {
452 config_reg |= SIRFUART_STICK_BIT_ODD;
453 } else {
454 config_reg |= SIRFUART_STICK_BIT_EVEN;
455 }
456 }
457 /* Hardware Flow Control Settings */
458 if (UART_ENABLE_MS(port, termios->c_cflag)) {
459 if (!sirfport->ms_enabled)
460 sirfsoc_uart_enable_ms(port);
461 } else {
462 if (sirfport->ms_enabled)
463 sirfsoc_uart_disable_ms(port);
464 }
465
Barry Songac4ce712013-01-16 14:49:27 +0800466 if (port->uartclk == 150000000) {
467 /* common rate: fast calculation */
468 for (ic = 0; ic < SIRF_BAUD_RATE_SUPPORT_NR; ic++)
469 if (baud_rate == baudrate_to_regv[ic].baud_rate)
470 clk_div_reg = baudrate_to_regv[ic].reg_val;
471 }
472
Rong Wang161e7732011-11-17 23:17:04 +0800473 setted_baud = baud_rate;
474 /* arbitary rate setting */
475 if (unlikely(clk_div_reg == 0))
Barry Songac4ce712013-01-16 14:49:27 +0800476 clk_div_reg = sirfsoc_calc_sample_div(baud_rate, port->uartclk,
Rong Wang161e7732011-11-17 23:17:04 +0800477 &setted_baud);
478 wr_regl(port, SIRFUART_DIVISOR, clk_div_reg);
479
480 if (tty_termios_baud_rate(termios))
481 tty_termios_encode_baud_rate(termios, setted_baud, setted_baud);
482
483 /* set receive timeout */
484 rx_time_out = SIRFSOC_UART_RX_TIMEOUT(baud_rate, 20000);
485 rx_time_out = (rx_time_out > 0xFFFF) ? 0xFFFF : rx_time_out;
486 config_reg |= SIRFUART_RECV_TIMEOUT(rx_time_out);
487 temp_reg_val = rd_regl(port, SIRFUART_TX_FIFO_OP);
488 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
489 wr_regl(port, SIRFUART_TX_FIFO_OP,
490 temp_reg_val & ~SIRFUART_TX_FIFO_START);
491 wr_regl(port, SIRFUART_TX_DMA_IO_CTRL, SIRFUART_TX_MODE_IO);
492 wr_regl(port, SIRFUART_RX_DMA_IO_CTRL, SIRFUART_RX_MODE_IO);
493 wr_regl(port, SIRFUART_LINE_CTRL, config_reg);
494
495 /* Reset Rx/Tx FIFO Threshold level for proper baudrate */
496 if (baud_rate < 1000000)
497 threshold_div = 1;
498 else
499 threshold_div = 2;
500 temp = port->line == 1 ? 16 : 64;
501 wr_regl(port, SIRFUART_TX_FIFO_CTRL, temp / threshold_div);
502 wr_regl(port, SIRFUART_RX_FIFO_CTRL, temp / threshold_div);
503 temp_reg_val |= SIRFUART_TX_FIFO_START;
504 wr_regl(port, SIRFUART_TX_FIFO_OP, temp_reg_val);
505 uart_update_timeout(port, termios->c_cflag, baud_rate);
506 sirfsoc_uart_start_rx(port);
507 wr_regl(port, SIRFUART_TX_RX_EN, SIRFUART_TX_EN | SIRFUART_RX_EN);
508 spin_unlock_irqrestore(&port->lock, flags);
509}
510
511static void startup_uart_controller(struct uart_port *port)
512{
513 unsigned long temp_regv;
514 int temp;
515 temp_regv = rd_regl(port, SIRFUART_TX_DMA_IO_CTRL);
516 wr_regl(port, SIRFUART_TX_DMA_IO_CTRL, temp_regv | SIRFUART_TX_MODE_IO);
517 temp_regv = rd_regl(port, SIRFUART_RX_DMA_IO_CTRL);
518 wr_regl(port, SIRFUART_RX_DMA_IO_CTRL, temp_regv | SIRFUART_RX_MODE_IO);
519 wr_regl(port, SIRFUART_TX_DMA_IO_LEN, 0);
520 wr_regl(port, SIRFUART_RX_DMA_IO_LEN, 0);
521 wr_regl(port, SIRFUART_TX_RX_EN, SIRFUART_RX_EN | SIRFUART_TX_EN);
522 wr_regl(port, SIRFUART_TX_FIFO_OP, SIRFUART_TX_FIFO_RESET);
523 wr_regl(port, SIRFUART_TX_FIFO_OP, 0);
524 wr_regl(port, SIRFUART_RX_FIFO_OP, SIRFUART_RX_FIFO_RESET);
525 wr_regl(port, SIRFUART_RX_FIFO_OP, 0);
526 temp = port->line == 1 ? 16 : 64;
527 wr_regl(port, SIRFUART_TX_FIFO_CTRL, temp);
528 wr_regl(port, SIRFUART_RX_FIFO_CTRL, temp);
529}
530
531static int sirfsoc_uart_startup(struct uart_port *port)
532{
533 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
534 unsigned int index = port->line;
535 int ret;
536 set_irq_flags(port->irq, IRQF_VALID | IRQF_NOAUTOEN);
537 ret = request_irq(port->irq,
538 sirfsoc_uart_isr,
539 0,
540 SIRFUART_PORT_NAME,
541 sirfport);
542 if (ret != 0) {
543 dev_err(port->dev, "UART%d request IRQ line (%d) failed.\n",
544 index, port->irq);
545 goto irq_err;
546 }
547 startup_uart_controller(port);
548 enable_irq(port->irq);
549irq_err:
550 return ret;
551}
552
553static void sirfsoc_uart_shutdown(struct uart_port *port)
554{
555 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
Barry Song909102d2013-08-07 13:35:38 +0800556
557 if (!sirfport->is_marco)
558 wr_regl(port, SIRFUART_INT_EN, 0);
559 else
560 wr_regl(port, SIRFUART_INT_EN_CLR, ~0UL);
561
Rong Wang161e7732011-11-17 23:17:04 +0800562 free_irq(port->irq, sirfport);
563 if (sirfport->ms_enabled) {
564 sirfsoc_uart_disable_ms(port);
565 sirfport->ms_enabled = 0;
566 }
567}
568
569static const char *sirfsoc_uart_type(struct uart_port *port)
570{
571 return port->type == SIRFSOC_PORT_TYPE ? SIRFUART_PORT_NAME : NULL;
572}
573
574static int sirfsoc_uart_request_port(struct uart_port *port)
575{
576 void *ret;
577 ret = request_mem_region(port->mapbase,
578 SIRFUART_MAP_SIZE, SIRFUART_PORT_NAME);
579 return ret ? 0 : -EBUSY;
580}
581
582static void sirfsoc_uart_release_port(struct uart_port *port)
583{
584 release_mem_region(port->mapbase, SIRFUART_MAP_SIZE);
585}
586
587static void sirfsoc_uart_config_port(struct uart_port *port, int flags)
588{
589 if (flags & UART_CONFIG_TYPE) {
590 port->type = SIRFSOC_PORT_TYPE;
591 sirfsoc_uart_request_port(port);
592 }
593}
594
595static struct uart_ops sirfsoc_uart_ops = {
596 .tx_empty = sirfsoc_uart_tx_empty,
597 .get_mctrl = sirfsoc_uart_get_mctrl,
598 .set_mctrl = sirfsoc_uart_set_mctrl,
599 .stop_tx = sirfsoc_uart_stop_tx,
600 .start_tx = sirfsoc_uart_start_tx,
601 .stop_rx = sirfsoc_uart_stop_rx,
602 .enable_ms = sirfsoc_uart_enable_ms,
603 .break_ctl = sirfsoc_uart_break_ctl,
604 .startup = sirfsoc_uart_startup,
605 .shutdown = sirfsoc_uart_shutdown,
606 .set_termios = sirfsoc_uart_set_termios,
607 .type = sirfsoc_uart_type,
608 .release_port = sirfsoc_uart_release_port,
609 .request_port = sirfsoc_uart_request_port,
610 .config_port = sirfsoc_uart_config_port,
611};
612
613#ifdef CONFIG_SERIAL_SIRFSOC_CONSOLE
614static int __init sirfsoc_uart_console_setup(struct console *co, char *options)
615{
616 unsigned int baud = 115200;
617 unsigned int bits = 8;
618 unsigned int parity = 'n';
619 unsigned int flow = 'n';
620 struct uart_port *port = &sirfsoc_uart_ports[co->index].port;
621
622 if (co->index < 0 || co->index >= SIRFSOC_UART_NR)
623 return -EINVAL;
624
625 if (!port->mapbase)
626 return -ENODEV;
627
628 if (options)
629 uart_parse_options(options, &baud, &parity, &bits, &flow);
630 port->cons = co;
631 return uart_set_options(port, co, baud, parity, bits, flow);
632}
633
634static void sirfsoc_uart_console_putchar(struct uart_port *port, int ch)
635{
636 while (rd_regl(port,
637 SIRFUART_TX_FIFO_STATUS) & SIRFUART_FIFOFULL_MASK(port))
638 cpu_relax();
639 wr_regb(port, SIRFUART_TX_FIFO_DATA, ch);
640}
641
642static void sirfsoc_uart_console_write(struct console *co, const char *s,
643 unsigned int count)
644{
645 struct uart_port *port = &sirfsoc_uart_ports[co->index].port;
646 uart_console_write(port, s, count, sirfsoc_uart_console_putchar);
647}
648
649static struct console sirfsoc_uart_console = {
650 .name = SIRFSOC_UART_NAME,
651 .device = uart_console_device,
652 .flags = CON_PRINTBUFFER,
653 .index = -1,
654 .write = sirfsoc_uart_console_write,
655 .setup = sirfsoc_uart_console_setup,
656 .data = &sirfsoc_uart_drv,
657};
658
659static int __init sirfsoc_uart_console_init(void)
660{
661 register_console(&sirfsoc_uart_console);
662 return 0;
663}
664console_initcall(sirfsoc_uart_console_init);
665#endif
666
667static struct uart_driver sirfsoc_uart_drv = {
668 .owner = THIS_MODULE,
669 .driver_name = SIRFUART_PORT_NAME,
670 .nr = SIRFSOC_UART_NR,
671 .dev_name = SIRFSOC_UART_NAME,
672 .major = SIRFSOC_UART_MAJOR,
673 .minor = SIRFSOC_UART_MINOR,
674#ifdef CONFIG_SERIAL_SIRFSOC_CONSOLE
675 .cons = &sirfsoc_uart_console,
676#else
677 .cons = NULL,
678#endif
679};
680
681int sirfsoc_uart_probe(struct platform_device *pdev)
682{
683 struct sirfsoc_uart_port *sirfport;
684 struct uart_port *port;
685 struct resource *res;
686 int ret;
687
688 if (of_property_read_u32(pdev->dev.of_node, "cell-index", &pdev->id)) {
689 dev_err(&pdev->dev,
690 "Unable to find cell-index in uart node.\n");
691 ret = -EFAULT;
692 goto err;
693 }
694
695 sirfport = &sirfsoc_uart_ports[pdev->id];
696 port = &sirfport->port;
697 port->dev = &pdev->dev;
698 port->private_data = sirfport;
699
Barry Song909102d2013-08-07 13:35:38 +0800700 if (of_device_is_compatible(pdev->dev.of_node, "sirf,marco-uart"))
701 sirfport->is_marco = true;
702
Rong Wang161e7732011-11-17 23:17:04 +0800703 if (of_find_property(pdev->dev.of_node, "hw_flow_ctrl", NULL))
704 sirfport->hw_flow_ctrl = 1;
705
706 if (of_property_read_u32(pdev->dev.of_node,
707 "fifosize",
708 &port->fifosize)) {
709 dev_err(&pdev->dev,
710 "Unable to find fifosize in uart node.\n");
711 ret = -EFAULT;
712 goto err;
713 }
714
715 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
716 if (res == NULL) {
717 dev_err(&pdev->dev, "Insufficient resources.\n");
718 ret = -EFAULT;
719 goto err;
720 }
721 port->mapbase = res->start;
722 port->membase = devm_ioremap(&pdev->dev, res->start, resource_size(res));
723 if (!port->membase) {
724 dev_err(&pdev->dev, "Cannot remap resource.\n");
725 ret = -ENOMEM;
726 goto err;
727 }
728 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
729 if (res == NULL) {
730 dev_err(&pdev->dev, "Insufficient resources.\n");
731 ret = -EFAULT;
Julia Lawall9250dd52012-09-01 18:33:09 +0200732 goto err;
Rong Wang161e7732011-11-17 23:17:04 +0800733 }
734 port->irq = res->start;
735
736 if (sirfport->hw_flow_ctrl) {
Stephen Warren6e5e9592012-03-02 13:05:47 -0700737 sirfport->p = pinctrl_get_select_default(&pdev->dev);
Alexey Khoroshilov9f6d20f2013-06-06 01:28:12 +0400738 if (IS_ERR(sirfport->p)) {
739 ret = PTR_ERR(sirfport->p);
Julia Lawall9250dd52012-09-01 18:33:09 +0200740 goto err;
Alexey Khoroshilov9f6d20f2013-06-06 01:28:12 +0400741 }
Rong Wang161e7732011-11-17 23:17:04 +0800742 }
743
Barry Songac4ce712013-01-16 14:49:27 +0800744 sirfport->clk = clk_get(&pdev->dev, NULL);
745 if (IS_ERR(sirfport->clk)) {
746 ret = PTR_ERR(sirfport->clk);
747 goto clk_err;
748 }
749 clk_prepare_enable(sirfport->clk);
750 port->uartclk = clk_get_rate(sirfport->clk);
751
Rong Wang161e7732011-11-17 23:17:04 +0800752 port->ops = &sirfsoc_uart_ops;
753 spin_lock_init(&port->lock);
754
755 platform_set_drvdata(pdev, sirfport);
756 ret = uart_add_one_port(&sirfsoc_uart_drv, port);
757 if (ret != 0) {
758 dev_err(&pdev->dev, "Cannot add UART port(%d).\n", pdev->id);
759 goto port_err;
760 }
761
762 return 0;
763
764port_err:
Barry Songac4ce712013-01-16 14:49:27 +0800765 clk_disable_unprepare(sirfport->clk);
766 clk_put(sirfport->clk);
767clk_err:
Stephen Warren6e5e9592012-03-02 13:05:47 -0700768 if (sirfport->hw_flow_ctrl)
Linus Walleij5c9bdc32012-02-16 19:36:21 +0100769 pinctrl_put(sirfport->p);
Rong Wang161e7732011-11-17 23:17:04 +0800770err:
771 return ret;
772}
773
774static int sirfsoc_uart_remove(struct platform_device *pdev)
775{
776 struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev);
777 struct uart_port *port = &sirfport->port;
Jingoo Han43b829b2013-06-25 10:08:49 +0900778
Stephen Warren6e5e9592012-03-02 13:05:47 -0700779 if (sirfport->hw_flow_ctrl)
Linus Walleij5c9bdc32012-02-16 19:36:21 +0100780 pinctrl_put(sirfport->p);
Barry Songac4ce712013-01-16 14:49:27 +0800781 clk_disable_unprepare(sirfport->clk);
782 clk_put(sirfport->clk);
Rong Wang161e7732011-11-17 23:17:04 +0800783 uart_remove_one_port(&sirfsoc_uart_drv, port);
784 return 0;
785}
786
787static int
788sirfsoc_uart_suspend(struct platform_device *pdev, pm_message_t state)
789{
790 struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev);
791 struct uart_port *port = &sirfport->port;
792 uart_suspend_port(&sirfsoc_uart_drv, port);
793 return 0;
794}
795
796static int sirfsoc_uart_resume(struct platform_device *pdev)
797{
798 struct sirfsoc_uart_port *sirfport = platform_get_drvdata(pdev);
799 struct uart_port *port = &sirfport->port;
800 uart_resume_port(&sirfsoc_uart_drv, port);
801 return 0;
802}
803
Bill Pembertonde88b342012-11-19 13:24:32 -0500804static struct of_device_id sirfsoc_uart_ids[] = {
Rong Wang161e7732011-11-17 23:17:04 +0800805 { .compatible = "sirf,prima2-uart", },
Barry Song5425e032012-12-25 17:32:04 +0800806 { .compatible = "sirf,marco-uart", },
Rong Wang161e7732011-11-17 23:17:04 +0800807 {}
808};
Arnd Bergmann45efcb22013-04-23 18:30:49 +0200809MODULE_DEVICE_TABLE(of, sirfsoc_uart_ids);
Rong Wang161e7732011-11-17 23:17:04 +0800810
811static struct platform_driver sirfsoc_uart_driver = {
812 .probe = sirfsoc_uart_probe,
Bill Pemberton2d47b712012-11-19 13:21:34 -0500813 .remove = sirfsoc_uart_remove,
Rong Wang161e7732011-11-17 23:17:04 +0800814 .suspend = sirfsoc_uart_suspend,
815 .resume = sirfsoc_uart_resume,
816 .driver = {
817 .name = SIRFUART_PORT_NAME,
818 .owner = THIS_MODULE,
819 .of_match_table = sirfsoc_uart_ids,
820 },
821};
822
823static int __init sirfsoc_uart_init(void)
824{
825 int ret = 0;
826
827 ret = uart_register_driver(&sirfsoc_uart_drv);
828 if (ret)
829 goto out;
830
831 ret = platform_driver_register(&sirfsoc_uart_driver);
832 if (ret)
833 uart_unregister_driver(&sirfsoc_uart_drv);
834out:
835 return ret;
836}
837module_init(sirfsoc_uart_init);
838
839static void __exit sirfsoc_uart_exit(void)
840{
841 platform_driver_unregister(&sirfsoc_uart_driver);
842 uart_unregister_driver(&sirfsoc_uart_drv);
843}
844module_exit(sirfsoc_uart_exit);
845
846MODULE_LICENSE("GPL v2");
847MODULE_AUTHOR("Bin Shi <Bin.Shi@csr.com>, Rong Wang<Rong.Wang@csr.com>");
848MODULE_DESCRIPTION("CSR SiRFprimaII Uart Driver");