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Joachim Eastwoodfe975cf2012-10-28 18:31:10 +00001/*
2 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2012 Joachim Eastwood <manabian@gmail.com>
7 *
8 * Based on at91sam9260.dtsi
9 *
10 * Licensed under GPLv2 or later.
11 */
12
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +080013#include "skeleton.dtsi"
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080014#include <dt-bindings/gpio/gpio.h>
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +000015
16/ {
17 model = "Atmel AT91RM9200 family SoC";
18 compatible = "atmel,at91rm9200";
19 interrupt-parent = <&aic>;
20
21 aliases {
22 serial0 = &dbgu;
23 serial1 = &usart0;
24 serial2 = &usart1;
25 serial3 = &usart2;
26 serial4 = &usart3;
27 gpio0 = &pioA;
28 gpio1 = &pioB;
29 gpio2 = &pioC;
30 gpio3 = &pioD;
31 tcb0 = &tcb0;
32 tcb1 = &tcb1;
Joachim Eastwood2d252102013-02-08 02:25:54 +010033 i2c0 = &i2c0;
Joachim Eastwood883a07f2012-12-04 19:10:58 +010034 ssc0 = &ssc0;
35 ssc1 = &ssc1;
36 ssc2 = &ssc2;
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +000037 };
38 cpus {
39 cpu@0 {
40 compatible = "arm,arm920t";
41 };
42 };
43
44 memory {
45 reg = <0x20000000 0x04000000>;
46 };
47
48 ahb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 apb {
55 compatible = "simple-bus";
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges;
59
60 aic: interrupt-controller@fffff000 {
61 #interrupt-cells = <3>;
62 compatible = "atmel,at91rm9200-aic";
63 interrupt-controller;
64 reg = <0xfffff000 0x200>;
65 atmel,external-irqs = <25 26 27 28 29 30 31>;
66 };
67
68 ramc0: ramc@ffffff00 {
69 compatible = "atmel,at91rm9200-sdramc";
70 reg = <0xffffff00 0x100>;
71 };
72
73 pmc: pmc@fffffc00 {
74 compatible = "atmel,at91rm9200-pmc";
75 reg = <0xfffffc00 0x100>;
76 };
77
78 st: timer@fffffd00 {
79 compatible = "atmel,at91rm9200-st";
80 reg = <0xfffffd00 0x100>;
81 interrupts = <1 4 7>;
82 };
83
84 tcb0: timer@fffa0000 {
85 compatible = "atmel,at91rm9200-tcb";
86 reg = <0xfffa0000 0x100>;
87 interrupts = <17 4 0 18 4 0 19 4 0>;
88 };
89
90 tcb1: timer@fffa4000 {
91 compatible = "atmel,at91rm9200-tcb";
92 reg = <0xfffa4000 0x100>;
93 interrupts = <20 4 0 21 4 0 22 4 0>;
94 };
95
Joachim Eastwood2d252102013-02-08 02:25:54 +010096 i2c0: i2c@fffb8000 {
97 compatible = "atmel,at91rm9200-i2c";
98 reg = <0xfffb8000 0x4000>;
99 interrupts = <12 4 6>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_twi>;
102 #address-cells = <1>;
103 #size-cells = <0>;
104 status = "disabled";
105 };
106
Joachim Eastwood4e4c9632012-12-04 19:10:57 +0100107 mmc0: mmc@fffb4000 {
108 compatible = "atmel,hsmci";
109 reg = <0xfffb4000 0x4000>;
110 interrupts = <10 4 0>;
111 #address-cells = <1>;
112 #size-cells = <0>;
113 status = "disabled";
114 };
115
Joachim Eastwood883a07f2012-12-04 19:10:58 +0100116 ssc0: ssc@fffd0000 {
117 compatible = "atmel,at91rm9200-ssc";
118 reg = <0xfffd0000 0x4000>;
119 interrupts = <14 4 5>;
120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
122 status = "disable";
123 };
124
125 ssc1: ssc@fffd4000 {
126 compatible = "atmel,at91rm9200-ssc";
127 reg = <0xfffd4000 0x4000>;
128 interrupts = <15 4 5>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
131 status = "disable";
132 };
133
134 ssc2: ssc@fffd8000 {
135 compatible = "atmel,at91rm9200-ssc";
136 reg = <0xfffd8000 0x4000>;
137 interrupts = <16 4 5>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
140 status = "disable";
141 };
142
Joachim Eastwoodce3b2632012-12-04 19:10:59 +0100143 macb0: ethernet@fffbc000 {
144 compatible = "cdns,at91rm9200-emac", "cdns,emac";
145 reg = <0xfffbc000 0x4000>;
146 interrupts = <24 4 3>;
147 phy-mode = "rmii";
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_macb_rmii>;
150 status = "disabled";
151 };
152
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +0000153 pinctrl@fffff400 {
154 #address-cells = <1>;
155 #size-cells = <1>;
156 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
157 ranges = <0xfffff400 0xfffff400 0x800>;
158
159 atmel,mux-mask = <
160 /* A B */
161 0xffffffff 0xffffffff /* pioA */
162 0xffffffff 0x083fffff /* pioB */
163 0xffff3fff 0x00000000 /* pioC */
164 0x03ff87ff 0x0fffff80 /* pioD */
165 >;
166
167 /* shared pinctrl settings */
168 dbgu {
169 pinctrl_dbgu: dbgu-0 {
170 atmel,pins =
171 <0 30 0x1 0x0 /* PA30 periph A */
172 0 31 0x1 0x1>; /* PA31 periph with pullup */
173 };
174 };
175
176 uart0 {
177 pinctrl_uart0: uart0-0 {
178 atmel,pins =
179 <0 17 0x1 0x0 /* PA17 periph A */
180 0 18 0x1 0x0>; /* PA18 periph A */
181 };
182
183 pinctrl_uart0_rts: uart0_rts-0 {
184 atmel,pins =
185 <0 20 0x1 0x0>; /* PA20 periph A */
186 };
187
188 pinctrl_uart0_cts: uart0_cts-0 {
189 atmel,pins =
190 <0 21 0x1 0x0>; /* PA21 periph A */
191 };
192 };
193
194 uart1 {
195 pinctrl_uart1: uart1-0 {
196 atmel,pins =
197 <1 20 0x1 0x1 /* PB20 periph A with pullup */
198 1 21 0x1 0x0>; /* PB21 periph A */
199 };
200
201 pinctrl_uart1_rts: uart1_rts-0 {
202 atmel,pins =
203 <1 24 0x1 0x0>; /* PB24 periph A */
204 };
205
206 pinctrl_uart1_cts: uart1_cts-0 {
207 atmel,pins =
208 <1 26 0x1 0x0>; /* PB26 periph A */
209 };
210
211 pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
212 atmel,pins =
213 <1 19 0x1 0x0 /* PB19 periph A */
214 1 25 0x1 0x0>; /* PB25 periph A */
215 };
216
217 pinctrl_uart1_dcd: uart1_dcd-0 {
218 atmel,pins =
219 <1 23 0x1 0x0>; /* PB23 periph A */
220 };
221
222 pinctrl_uart1_ri: uart1_ri-0 {
223 atmel,pins =
224 <1 18 0x1 0x0>; /* PB18 periph A */
225 };
226 };
227
228 uart2 {
229 pinctrl_uart2: uart2-0 {
230 atmel,pins =
231 <0 22 0x1 0x0 /* PA22 periph A */
232 0 23 0x1 0x1>; /* PA23 periph A with pullup */
233 };
234
235 pinctrl_uart2_rts: uart2_rts-0 {
236 atmel,pins =
237 <0 30 0x2 0x0>; /* PA30 periph B */
238 };
239
240 pinctrl_uart2_cts: uart2_cts-0 {
241 atmel,pins =
242 <0 31 0x2 0x0>; /* PA31 periph B */
243 };
244 };
245
246 uart3 {
247 pinctrl_uart3: uart3-0 {
248 atmel,pins =
249 <0 5 0x2 0x1 /* PA5 periph B with pullup */
250 0 6 0x2 0x0>; /* PA6 periph B */
251 };
252
253 pinctrl_uart3_rts: uart3_rts-0 {
254 atmel,pins =
255 <1 0 0x2 0x0>; /* PB0 periph B */
256 };
257
258 pinctrl_uart3_cts: uart3_cts-0 {
259 atmel,pins =
260 <1 1 0x2 0x0>; /* PB1 periph B */
261 };
262 };
263
264 nand {
265 pinctrl_nand: nand-0 {
266 atmel,pins =
267 <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
268 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
269 };
270 };
271
Joachim Eastwoodce3b2632012-12-04 19:10:59 +0100272 macb {
273 pinctrl_macb_rmii: macb_rmii-0 {
274 atmel,pins =
275 <0 7 0x1 0x0 /* PA7 periph A */
276 0 8 0x1 0x0 /* PA8 periph A */
277 0 9 0x1 0x0 /* PA9 periph A */
278 0 10 0x1 0x0 /* PA10 periph A */
279 0 11 0x1 0x0 /* PA11 periph A */
280 0 12 0x1 0x0 /* PA12 periph A */
281 0 13 0x1 0x0 /* PA13 periph A */
282 0 14 0x1 0x0 /* PA14 periph A */
283 0 15 0x1 0x0 /* PA15 periph A */
284 0 16 0x1 0x0>; /* PA16 periph A */
285 };
286
287 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
288 atmel,pins =
289 <1 12 0x2 0x0 /* PB12 periph B */
290 1 13 0x2 0x0 /* PB13 periph B */
291 1 14 0x2 0x0 /* PB14 periph B */
292 1 15 0x2 0x0 /* PB15 periph B */
293 1 16 0x2 0x0 /* PB16 periph B */
294 1 17 0x2 0x0 /* PB17 periph B */
295 1 18 0x2 0x0 /* PB18 periph B */
296 1 19 0x2 0x0>; /* PB19 periph B */
297 };
298 };
299
Joachim Eastwood4e4c9632012-12-04 19:10:57 +0100300 mmc0 {
301 pinctrl_mmc0_clk: mmc0_clk-0 {
302 atmel,pins =
303 <0 27 0x1 0x0>; /* PA27 periph A */
304 };
305
306 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
307 atmel,pins =
308 <0 28 0x1 0x1 /* PA28 periph A with pullup */
309 0 29 0x1 0x1>; /* PA29 periph A with pullup */
310 };
311
312 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
313 atmel,pins =
314 <1 3 0x2 0x1 /* PB3 periph B with pullup */
315 1 4 0x2 0x1 /* PB4 periph B with pullup */
316 1 5 0x2 0x1>; /* PB5 periph B with pullup */
317 };
318
319 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
320 atmel,pins =
321 <0 8 0x2 0x1 /* PA8 periph B with pullup */
322 0 9 0x2 0x1>; /* PA9 periph B with pullup */
323 };
324
325 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
326 atmel,pins =
327 <0 10 0x2 0x1 /* PA10 periph B with pullup */
328 0 11 0x2 0x1 /* PA11 periph B with pullup */
329 0 12 0x2 0x1>; /* PA12 periph B with pullup */
330 };
331 };
332
Joachim Eastwood883a07f2012-12-04 19:10:58 +0100333 ssc0 {
334 pinctrl_ssc0_tx: ssc0_tx-0 {
335 atmel,pins =
336 <1 0 0x1 0x0 /* PB0 periph A */
337 1 1 0x1 0x0 /* PB1 periph A */
338 1 2 0x1 0x0>; /* PB2 periph A */
339 };
340
341 pinctrl_ssc0_rx: ssc0_rx-0 {
342 atmel,pins =
343 <1 3 0x1 0x0 /* PB3 periph A */
344 1 4 0x1 0x0 /* PB4 periph A */
345 1 5 0x1 0x0>; /* PB5 periph A */
346 };
347 };
348
349 ssc1 {
350 pinctrl_ssc1_tx: ssc1_tx-0 {
351 atmel,pins =
352 <1 6 0x1 0x0 /* PB6 periph A */
353 1 7 0x1 0x0 /* PB7 periph A */
354 1 8 0x1 0x0>; /* PB8 periph A */
355 };
356
357 pinctrl_ssc1_rx: ssc1_rx-0 {
358 atmel,pins =
359 <1 9 0x1 0x0 /* PB9 periph A */
360 1 10 0x1 0x0 /* PB10 periph A */
361 1 11 0x1 0x0>; /* PB11 periph A */
362 };
363 };
364
365 ssc2 {
366 pinctrl_ssc2_tx: ssc2_tx-0 {
367 atmel,pins =
368 <1 12 0x1 0x0 /* PB12 periph A */
369 1 13 0x1 0x0 /* PB13 periph A */
370 1 14 0x1 0x0>; /* PB14 periph A */
371 };
372
373 pinctrl_ssc2_rx: ssc2_rx-0 {
374 atmel,pins =
375 <1 15 0x1 0x0 /* PB15 periph A */
376 1 16 0x1 0x0 /* PB16 periph A */
377 1 17 0x1 0x0>; /* PB17 periph A */
378 };
379 };
380
Joachim Eastwood2d252102013-02-08 02:25:54 +0100381 twi {
382 pinctrl_twi: twi-0 {
383 atmel,pins =
384 <0 25 0x1 0x2 /* PA25 periph A with multi drive */
385 0 26 0x1 0x2>; /* PA26 periph A with multi drive */
386 };
Joachim Eastwood83960c82013-02-08 02:25:55 +0100387
388 pinctrl_twi_gpio: twi_gpio-0 {
389 atmel,pins =
390 <0 25 0x0 0x2 /* PA25 GPIO with multi drive */
391 0 26 0x0 0x2>; /* PA26 GPIO with multi drive */
392 };
Joachim Eastwood2d252102013-02-08 02:25:54 +0100393 };
394
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +0000395 pioA: gpio@fffff400 {
396 compatible = "atmel,at91rm9200-gpio";
397 reg = <0xfffff400 0x200>;
398 interrupts = <2 4 1>;
399 #gpio-cells = <2>;
400 gpio-controller;
401 interrupt-controller;
402 #interrupt-cells = <2>;
403 };
404
405 pioB: gpio@fffff600 {
406 compatible = "atmel,at91rm9200-gpio";
407 reg = <0xfffff600 0x200>;
408 interrupts = <3 4 1>;
409 #gpio-cells = <2>;
410 gpio-controller;
411 interrupt-controller;
412 #interrupt-cells = <2>;
413 };
414
415 pioC: gpio@fffff800 {
416 compatible = "atmel,at91rm9200-gpio";
417 reg = <0xfffff800 0x200>;
418 interrupts = <4 4 1>;
419 #gpio-cells = <2>;
420 gpio-controller;
421 interrupt-controller;
422 #interrupt-cells = <2>;
423 };
424
425 pioD: gpio@fffffa00 {
426 compatible = "atmel,at91rm9200-gpio";
427 reg = <0xfffffa00 0x200>;
428 interrupts = <5 4 1>;
429 #gpio-cells = <2>;
430 gpio-controller;
431 interrupt-controller;
432 #interrupt-cells = <2>;
433 };
434 };
435
436 dbgu: serial@fffff200 {
437 compatible = "atmel,at91rm9200-usart";
438 reg = <0xfffff200 0x200>;
439 interrupts = <1 4 7>;
440 pinctrl-names = "default";
441 pinctrl-0 = <&pinctrl_dbgu>;
442 status = "disabled";
443 };
444
445 usart0: serial@fffc0000 {
446 compatible = "atmel,at91rm9200-usart";
447 reg = <0xfffc0000 0x200>;
448 interrupts = <6 4 5>;
449 atmel,use-dma-rx;
450 atmel,use-dma-tx;
451 pinctrl-names = "default";
452 pinctrl-0 = <&pinctrl_uart0>;
453 status = "disabled";
454 };
455
456 usart1: serial@fffc4000 {
457 compatible = "atmel,at91rm9200-usart";
458 reg = <0xfffc4000 0x200>;
459 interrupts = <7 4 5>;
460 atmel,use-dma-rx;
461 atmel,use-dma-tx;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pinctrl_uart1>;
464 status = "disabled";
465 };
466
467 usart2: serial@fffc8000 {
468 compatible = "atmel,at91rm9200-usart";
469 reg = <0xfffc8000 0x200>;
470 interrupts = <8 4 5>;
471 atmel,use-dma-rx;
472 atmel,use-dma-tx;
473 pinctrl-names = "default";
474 pinctrl-0 = <&pinctrl_uart2>;
475 status = "disabled";
476 };
477
478 usart3: serial@fffcc000 {
479 compatible = "atmel,at91rm9200-usart";
480 reg = <0xfffcc000 0x200>;
481 interrupts = <23 4 5>;
482 atmel,use-dma-rx;
483 atmel,use-dma-tx;
484 pinctrl-names = "default";
485 pinctrl-0 = <&pinctrl_uart3>;
486 status = "disabled";
487 };
488
489 usb1: gadget@fffb0000 {
490 compatible = "atmel,at91rm9200-udc";
491 reg = <0xfffb0000 0x4000>;
492 interrupts = <11 4 2>;
493 status = "disabled";
494 };
495 };
496
497 nand0: nand@40000000 {
498 compatible = "atmel,at91rm9200-nand";
499 #address-cells = <1>;
500 #size-cells = <1>;
501 reg = <0x40000000 0x10000000>;
502 atmel,nand-addr-offset = <21>;
503 atmel,nand-cmd-offset = <22>;
504 pinctrl-names = "default";
505 pinctrl-0 = <&pinctrl_nand>;
506 nand-ecc-mode = "soft";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800507 gpios = <&pioC 2 GPIO_ACTIVE_HIGH
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +0000508 0
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800509 &pioB 1 GPIO_ACTIVE_HIGH
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +0000510 >;
511 status = "disabled";
512 };
513
514 usb0: ohci@00300000 {
515 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
516 reg = <0x00300000 0x100000>;
517 interrupts = <23 4 2>;
518 status = "disabled";
519 };
520 };
521
522 i2c@0 {
523 compatible = "i2c-gpio";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800524 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
525 &pioA 26 GPIO_ACTIVE_HIGH /* scl */
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +0000526 >;
527 i2c-gpio,sda-open-drain;
528 i2c-gpio,scl-open-drain;
529 i2c-gpio,delay-us = <2>; /* ~100 kHz */
Joachim Eastwood83960c82013-02-08 02:25:55 +0100530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_twi_gpio>;
Joachim Eastwoodfe975cf2012-10-28 18:31:10 +0000532 #address-cells = <1>;
533 #size-cells = <0>;
534 status = "disabled";
535 };
536};