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review.evervolv.com / android_kernel_oneplus_msm8996 / 99b0d4b7b09edeacf4542bced5c01239375b51a9 / . / arch / arm / mach-s3c64xx / setup-sdhci.c
blob: 1a942037c4eff85966f4b72bbe88d34afb363467 [file] [log] [blame]
Ben Dooks431107e2010-01-26 10:11:04 +0900[diff] [blame]1/* linux/arch/arm/mach-s3c64xx/setup-sdhci.c
Ben Dooks4faf68672009-03-25 11:01:24 +0000[diff] [blame]2 *
3 * Copyright 2008 Simtec Electronics
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
Ben Dooks2f6c2ac2010-01-26 10:38:52 +0900[diff] [blame]8 * S3C6400/S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC)
Ben Dooks4faf68672009-03-25 11:01:24 +0000[diff] [blame]9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20
21#include <linux/mmc/card.h>
22#include <linux/mmc/host.h>
23
24#include <plat/regs-sdhci.h>
25#include <plat/sdhci.h>
26
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28
Ben Dooks2f6c2ac2010-01-26 10:38:52 +0900[diff] [blame]29char *s3c64xx_hsmmc_clksrcs[4] = {
Ben Dooks4faf68672009-03-25 11:01:24 +0000[diff] [blame]30 [0] = "hsmmc",
31 [1] = "hsmmc",
32 [2] = "mmc_bus",
André Goddard Rosaaf901ca2009-11-14 13:09:05 -0200[diff] [blame]33 /* [3] = "48m", - note not successfully used yet */
Ben Dooks4faf68672009-03-25 11:01:24 +0000[diff] [blame]34};
35
36void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
37 void __iomem *r,
38 struct mmc_ios *ios,
39 struct mmc_card *card)
40{
41 u32 ctrl2, ctrl3;
42
43 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
44 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
45 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
46 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
47 S3C_SDHCI_CTRL2_ENFBCLKRX |
48 S3C_SDHCI_CTRL2_DFCNT_NONE |
49 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
50
51 if (ios->clock < 25 * 1000000)
52 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
53 S3C_SDHCI_CTRL3_FCSEL2 |
54 S3C_SDHCI_CTRL3_FCSEL1 |
55 S3C_SDHCI_CTRL3_FCSEL0);
56 else
57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
58
59 printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
60 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
61 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
62}
63
Ben Dooks2f6c2ac2010-01-26 10:38:52 +0900[diff] [blame]64void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
65 void __iomem *r,
66 struct mmc_ios *ios,
67 struct mmc_card *card)
68{
69 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
70
71 s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
72}