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review.evervolv.com / android_kernel_oneplus_msm8996 / 99b0d4b7b09edeacf4542bced5c01239375b51a9 / . / arch / powerpc / kvm / booke_emulate.c
blob: cbc790ee192892fcc19f7a7d856fb1a2db6da2b6 [file] [log] [blame]
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2008
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
20#include <linux/kvm_host.h>
21#include <asm/disassemble.h>
22
23#include "booke.h"
24
25#define OP_19_XOP_RFI 50
26
27#define OP_31_XOP_MFMSR 83
28#define OP_31_XOP_WRTEE 131
29#define OP_31_XOP_MTMSR 146
30#define OP_31_XOP_WRTEEI 163
31
32static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
33{
34 vcpu->arch.pc = vcpu->arch.srr0;
35 kvmppc_set_msr(vcpu, vcpu->arch.srr1);
36}
37
38int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
39 unsigned int inst, int *advance)
40{
41 int emulated = EMULATE_DONE;
42 int rs;
43 int rt;
44
45 switch (get_op(inst)) {
46 case 19:
47 switch (get_xop(inst)) {
48 case OP_19_XOP_RFI:
49 kvmppc_emul_rfi(vcpu);
50 kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
51 *advance = 0;
52 break;
53
54 default:
55 emulated = EMULATE_FAIL;
56 break;
57 }
58 break;
59
60 case 31:
61 switch (get_xop(inst)) {
62
63 case OP_31_XOP_MFMSR:
64 rt = get_rt(inst);
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]65 kvmppc_set_gpr(vcpu, rt, vcpu->arch.msr);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]66 kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
67 break;
68
69 case OP_31_XOP_MTMSR:
70 rs = get_rs(inst);
71 kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]72 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]73 break;
74
75 case OP_31_XOP_WRTEE:
76 rs = get_rs(inst);
77 vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]78 | (kvmppc_get_gpr(vcpu, rs) & MSR_EE);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]79 kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
80 break;
81
82 case OP_31_XOP_WRTEEI:
83 vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
84 | (inst & MSR_EE);
85 kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
86 break;
87
88 default:
89 emulated = EMULATE_FAIL;
90 }
91
92 break;
93
94 default:
95 emulated = EMULATE_FAIL;
96 }
97
98 return emulated;
99}
100
101int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
102{
103 int emulated = EMULATE_DONE;
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]104 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]105
106 switch (sprn) {
107 case SPRN_DEAR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]108 vcpu->arch.dear = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]109 case SPRN_ESR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]110 vcpu->arch.esr = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]111 case SPRN_DBCR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]112 vcpu->arch.dbcr0 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]113 case SPRN_DBCR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]114 vcpu->arch.dbcr1 = spr_val; break;
Hollis Blanchardf7b200a2009-01-03 16:23:07 -0600[diff] [blame]115 case SPRN_DBSR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]116 vcpu->arch.dbsr &= ~spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]117 case SPRN_TSR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]118 vcpu->arch.tsr &= ~spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]119 case SPRN_TCR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]120 vcpu->arch.tcr = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]121 kvmppc_emulate_dec(vcpu);
122 break;
123
124 /* Note: SPRG4-7 are user-readable. These values are
125 * loaded into the real SPRGs when resuming the
126 * guest. */
127 case SPRN_SPRG4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]128 vcpu->arch.sprg4 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]129 case SPRN_SPRG5:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]130 vcpu->arch.sprg5 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]131 case SPRN_SPRG6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]132 vcpu->arch.sprg6 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]133 case SPRN_SPRG7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]134 vcpu->arch.sprg7 = spr_val; break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]135
136 case SPRN_IVPR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]137 vcpu->arch.ivpr = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]138 break;
139 case SPRN_IVOR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]140 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]141 break;
142 case SPRN_IVOR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]143 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]144 break;
145 case SPRN_IVOR2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]146 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]147 break;
148 case SPRN_IVOR3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]149 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]150 break;
151 case SPRN_IVOR4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]152 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]153 break;
154 case SPRN_IVOR5:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]155 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]156 break;
157 case SPRN_IVOR6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]158 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]159 break;
160 case SPRN_IVOR7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]161 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]162 break;
163 case SPRN_IVOR8:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]164 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]165 break;
166 case SPRN_IVOR9:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]167 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]168 break;
169 case SPRN_IVOR10:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]170 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]171 break;
172 case SPRN_IVOR11:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]173 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]174 break;
175 case SPRN_IVOR12:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]176 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]177 break;
178 case SPRN_IVOR13:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]179 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]180 break;
181 case SPRN_IVOR14:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]182 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]183 break;
184 case SPRN_IVOR15:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]185 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]186 break;
187
188 default:
189 emulated = EMULATE_FAIL;
190 }
191
192 return emulated;
193}
194
195int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
196{
197 int emulated = EMULATE_DONE;
198
199 switch (sprn) {
200 case SPRN_IVPR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]201 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivpr); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]202 case SPRN_DEAR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]203 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]204 case SPRN_ESR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]205 kvmppc_set_gpr(vcpu, rt, vcpu->arch.esr); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]206 case SPRN_DBCR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]207 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr0); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]208 case SPRN_DBCR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]209 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr1); break;
Hollis Blanchardf7b200a2009-01-03 16:23:07 -0600[diff] [blame]210 case SPRN_DBSR:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]211 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbsr); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]212
213 case SPRN_IVOR0:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]214 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]215 break;
216 case SPRN_IVOR1:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]217 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]218 break;
219 case SPRN_IVOR2:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]220 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]221 break;
222 case SPRN_IVOR3:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]223 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]224 break;
225 case SPRN_IVOR4:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]226 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]227 break;
228 case SPRN_IVOR5:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]229 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]230 break;
231 case SPRN_IVOR6:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]232 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]233 break;
234 case SPRN_IVOR7:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]235 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]236 break;
237 case SPRN_IVOR8:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]238 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]239 break;
240 case SPRN_IVOR9:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]241 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]242 break;
243 case SPRN_IVOR10:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]244 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]245 break;
246 case SPRN_IVOR11:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]247 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]248 break;
249 case SPRN_IVOR12:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]250 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]251 break;
252 case SPRN_IVOR13:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]253 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]254 break;
255 case SPRN_IVOR14:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]256 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]257 break;
258 case SPRN_IVOR15:
Alexander Graf8e5b26b2010-01-08 02:58:01 +0100[diff] [blame]259 kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]);
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600[diff] [blame]260 break;
261
262 default:
263 emulated = EMULATE_FAIL;
264 }
265
266 return emulated;
267}