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review.evervolv.com / android_kernel_oneplus_msm8996 / 99b0d4b7b09edeacf4542bced5c01239375b51a9 / . / include / linux / msi.h
blob: 6991ab5b24d1bbfd736df4d27315a83ee7271779 [file] [log] [blame]
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]1#ifndef LINUX_MSI_H
2#define LINUX_MSI_H
3
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000[diff] [blame]4#include <linux/list.h>
5
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]6struct msi_msg {
7 u32 address_lo; /* low 32 bits of msi message address */
8 u32 address_hi; /* high 32 bits of msi message address */
9 u32 data; /* 16 bits of msi message data */
10};
11
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900[diff] [blame]12/* Helper functions */
Yinghai Lu3145e942008-12-05 18:58:34 -0800[diff] [blame]13struct irq_desc;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]14extern void mask_msi_irq(unsigned int irq);
15extern void unmask_msi_irq(unsigned int irq);
Yinghai Lu3145e942008-12-05 18:58:34 -0800[diff] [blame]16extern void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg);
17extern void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]18extern void read_msi_msg(unsigned int irq, struct msi_msg *msg);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]19extern void write_msi_msg(unsigned int irq, struct msi_msg *msg);
20
21struct msi_desc {
22 struct {
Matthew Wilcox24d27552009-03-17 08:54:06 -0400[diff] [blame]23 __u8 is_msix : 1;
Matthew Wilcox1c8d7b02009-03-17 08:54:10 -0400[diff] [blame]24 __u8 multiple: 3; /* log2 number of messages */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]25 __u8 maskbit : 1; /* mask-pending bit supported ? */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]26 __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
27 __u8 pos; /* Location of the msi capability */
28 __u16 entry_nr; /* specific enabled entry */
29 unsigned default_irq; /* default pre-assigned irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400[diff] [blame]30 } msi_attrib;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]31
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400[diff] [blame]32 u32 masked; /* mask bits */
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000[diff] [blame]33 unsigned int irq;
34 struct list_head list;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]35
Matthew Wilcox264d9ca2009-03-17 08:54:08 -0400[diff] [blame]36 union {
37 void __iomem *mask_base;
38 u8 mask_pos;
39 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]40 struct pci_dev *dev;
41
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700[diff] [blame]42 /* Last set MSI message */
43 struct msi_msg msg;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]44};
45
46/*
47 * The arch hook for setup up msi irqs
48 */
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700[diff] [blame]49int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]50void arch_teardown_msi_irq(unsigned int irq);
Michael Ellerman9c831332007-04-18 19:39:21 +1000[diff] [blame]51extern int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
Michael Ellerman032de8e2007-04-18 19:39:22 +1000[diff] [blame]52extern void arch_teardown_msi_irqs(struct pci_dev *dev);
Michael Ellermanc9953a72007-04-05 17:19:08 +1000[diff] [blame]53extern int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]54
55
56#endif /* LINUX_MSI_H */