| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  *  linux/arch/arm26/lib/memcpy.S | 
 | 3 |  * | 
 | 4 |  *  Copyright (C) 1995-1999 Russell King | 
 | 5 |  * | 
 | 6 |  * This program is free software; you can redistribute it and/or modify | 
 | 7 |  * it under the terms of the GNU General Public License version 2 as | 
 | 8 |  * published by the Free Software Foundation. | 
 | 9 |  * | 
 | 10 |  *  ASM optimised string functions | 
 | 11 |  */ | 
 | 12 | #include <linux/linkage.h> | 
 | 13 | #include <asm/assembler.h> | 
 | 14 |  | 
 | 15 | 		.text | 
 | 16 |  | 
 | 17 | #define ENTER	\ | 
 | 18 | 		mov	ip,sp	;\ | 
 | 19 | 		stmfd	sp!,{r4-r9,fp,ip,lr,pc}	;\ | 
 | 20 | 		sub	fp,ip,#4 | 
 | 21 |  | 
 | 22 | #define EXIT	\ | 
 | 23 | 		LOADREGS(ea, fp, {r4 - r9, fp, sp, pc}) | 
 | 24 |  | 
 | 25 | #define EXITEQ	\ | 
 | 26 | 		LOADREGS(eqea, fp, {r4 - r9, fp, sp, pc}) | 
 | 27 |  | 
 | 28 | /* | 
 | 29 |  * Prototype: void memcpy(void *to,const void *from,unsigned long n); | 
 | 30 |  * ARM3: cant use memcopy here!!! | 
 | 31 |  */ | 
 | 32 | ENTRY(memcpy) | 
 | 33 | ENTRY(memmove) | 
 | 34 | 		ENTER | 
 | 35 | 		cmp	r1, r0 | 
 | 36 | 		bcc	19f | 
 | 37 | 		subs	r2, r2, #4 | 
 | 38 | 		blt	6f | 
 | 39 | 		ands	ip, r0, #3 | 
 | 40 | 		bne	7f | 
 | 41 | 		ands	ip, r1, #3 | 
 | 42 | 		bne	8f | 
 | 43 |  | 
 | 44 | 1:		subs	r2, r2, #8 | 
 | 45 | 		blt	5f | 
 | 46 | 		subs	r2, r2, #0x14 | 
 | 47 | 		blt	3f | 
 | 48 | 2:		ldmia	r1!,{r3 - r9, ip} | 
 | 49 | 		stmia	r0!,{r3 - r9, ip} | 
 | 50 | 		subs	r2, r2, #32 | 
 | 51 | 		bge	2b | 
 | 52 | 		cmn	r2, #16 | 
 | 53 | 		ldmgeia	r1!, {r3 - r6} | 
 | 54 | 		stmgeia	r0!, {r3 - r6} | 
 | 55 | 		subge	r2, r2, #0x10 | 
 | 56 | 3:		adds	r2, r2, #0x14 | 
 | 57 | 4:		ldmgeia	r1!, {r3 - r5} | 
 | 58 | 		stmgeia	r0!, {r3 - r5} | 
 | 59 | 		subges	r2, r2, #12 | 
 | 60 | 		bge	4b | 
 | 61 | 5:		adds	r2, r2, #8 | 
 | 62 | 		blt	6f | 
 | 63 | 		subs	r2, r2, #4 | 
 | 64 | 		ldrlt	r3, [r1], #4 | 
 | 65 | 		ldmgeia	r1!, {r4, r5} | 
 | 66 | 		strlt	r3, [r0], #4 | 
 | 67 | 		stmgeia	r0!, {r4, r5} | 
 | 68 | 		subge	r2, r2, #4 | 
 | 69 |  | 
 | 70 | 6:		adds	r2, r2, #4 | 
 | 71 | 		EXITEQ | 
 | 72 | 		cmp	r2, #2 | 
 | 73 | 		ldrb	r3, [r1], #1 | 
 | 74 | 		ldrgeb	r4, [r1], #1 | 
 | 75 | 		ldrgtb	r5, [r1], #1 | 
 | 76 | 		strb	r3, [r0], #1 | 
 | 77 | 		strgeb	r4, [r0], #1 | 
 | 78 | 		strgtb	r5, [r0], #1 | 
 | 79 | 		EXIT | 
 | 80 |  | 
 | 81 | 7:		rsb	ip, ip, #4 | 
 | 82 | 		cmp	ip, #2 | 
 | 83 | 		ldrb	r3, [r1], #1 | 
 | 84 | 		ldrgeb	r4, [r1], #1 | 
 | 85 | 		ldrgtb	r5, [r1], #1 | 
 | 86 | 		strb	r3, [r0], #1 | 
 | 87 | 		strgeb	r4, [r0], #1 | 
 | 88 | 		strgtb	r5, [r0], #1 | 
 | 89 | 		subs	r2, r2, ip | 
 | 90 | 		blt	6b | 
 | 91 | 		ands	ip, r1, #3 | 
 | 92 | 		beq	1b | 
 | 93 |  | 
 | 94 | 8:		bic	r1, r1, #3 | 
 | 95 | 		ldr	r7, [r1], #4 | 
 | 96 | 		cmp	ip, #2 | 
 | 97 | 		bgt	15f | 
 | 98 | 		beq	11f | 
 | 99 | 		cmp	r2, #12 | 
 | 100 | 		blt	10f | 
 | 101 | 		sub	r2, r2, #12 | 
 | 102 | 9:		mov	r3, r7, pull #8 | 
 | 103 | 		ldmia	r1!, {r4 - r7} | 
 | 104 | 		orr	r3, r3, r4, push #24 | 
 | 105 | 		mov	r4, r4, pull #8 | 
 | 106 | 		orr	r4, r4, r5, push #24 | 
 | 107 | 		mov	r5, r5, pull #8 | 
 | 108 | 		orr	r5, r5, r6, push #24 | 
 | 109 | 		mov	r6, r6, pull #8 | 
 | 110 | 		orr	r6, r6, r7, push #24 | 
 | 111 | 		stmia	r0!, {r3 - r6} | 
 | 112 | 		subs	r2, r2, #16 | 
 | 113 | 		bge	9b | 
 | 114 | 		adds	r2, r2, #12 | 
 | 115 | 		blt	100f | 
 | 116 | 10:		mov	r3, r7, pull #8 | 
 | 117 | 		ldr	r7, [r1], #4 | 
 | 118 | 		subs	r2, r2, #4 | 
 | 119 | 		orr	r3, r3, r7, push #24 | 
 | 120 | 		str	r3, [r0], #4 | 
 | 121 | 		bge	10b | 
 | 122 | 100:		sub	r1, r1, #3 | 
 | 123 | 		b	6b | 
 | 124 |  | 
 | 125 | 11:		cmp	r2, #12 | 
 | 126 | 		blt	13f		/* */ | 
 | 127 | 		sub	r2, r2, #12 | 
 | 128 | 12:		mov	r3, r7, pull #16 | 
 | 129 | 		ldmia	r1!, {r4 - r7} | 
 | 130 | 		orr	r3, r3, r4, push #16 | 
 | 131 | 		mov	r4, r4, pull #16 | 
 | 132 | 		orr	r4, r4, r5, push #16 | 
 | 133 | 		mov	r5, r5, pull #16 | 
 | 134 | 		orr	r5, r5, r6, push #16 | 
 | 135 | 		mov	r6, r6, pull #16 | 
 | 136 | 		orr	r6, r6, r7, push #16 | 
 | 137 | 		stmia	r0!, {r3 - r6} | 
 | 138 | 		subs	r2, r2, #16 | 
 | 139 | 		bge	12b | 
 | 140 | 		adds	r2, r2, #12 | 
 | 141 | 		blt	14f | 
 | 142 | 13:		mov	r3, r7, pull #16 | 
 | 143 | 		ldr	r7, [r1], #4 | 
 | 144 | 		subs	r2, r2, #4 | 
 | 145 | 		orr	r3, r3, r7, push #16 | 
 | 146 | 		str	r3, [r0], #4 | 
 | 147 | 		bge	13b | 
 | 148 | 14:		sub	r1, r1, #2 | 
 | 149 | 		b	6b | 
 | 150 |  | 
 | 151 | 15:		cmp	r2, #12 | 
 | 152 | 		blt	17f | 
 | 153 | 		sub	r2, r2, #12 | 
 | 154 | 16:		mov	r3, r7, pull #24 | 
 | 155 | 		ldmia	r1!, {r4 - r7} | 
 | 156 | 		orr	r3, r3, r4, push #8 | 
 | 157 | 		mov	r4, r4, pull #24 | 
 | 158 | 		orr	r4, r4, r5, push #8 | 
 | 159 | 		mov	r5, r5, pull #24 | 
 | 160 | 		orr	r5, r5, r6, push #8 | 
 | 161 | 		mov	r6, r6, pull #24 | 
 | 162 | 		orr	r6, r6, r7, push #8 | 
 | 163 | 		stmia	r0!, {r3 - r6} | 
 | 164 | 		subs	r2, r2, #16 | 
 | 165 | 		bge	16b | 
 | 166 | 		adds	r2, r2, #12 | 
 | 167 | 		blt	18f | 
 | 168 | 17:		mov	r3, r7, pull #24 | 
 | 169 | 		ldr	r7, [r1], #4 | 
 | 170 | 		subs	r2, r2, #4 | 
 | 171 | 		orr	r3, r3, r7, push #8 | 
 | 172 | 		str	r3, [r0], #4 | 
 | 173 | 		bge	17b | 
 | 174 | 18:		sub	r1, r1, #1 | 
 | 175 | 		b	6b | 
 | 176 |  | 
 | 177 |  | 
 | 178 | 19:		add	r1, r1, r2 | 
 | 179 | 		add	r0, r0, r2 | 
 | 180 | 		subs	r2, r2, #4 | 
 | 181 | 		blt	24f | 
 | 182 | 		ands	ip, r0, #3 | 
 | 183 | 		bne	25f | 
 | 184 | 		ands	ip, r1, #3 | 
 | 185 | 		bne	26f | 
 | 186 |  | 
 | 187 | 20:		subs	r2, r2, #8 | 
 | 188 | 		blt	23f | 
 | 189 | 		subs	r2, r2, #0x14 | 
 | 190 | 		blt	22f | 
 | 191 | 21:		ldmdb	r1!, {r3 - r9, ip} | 
 | 192 | 		stmdb	r0!, {r3 - r9, ip} | 
 | 193 | 		subs	r2, r2, #32 | 
 | 194 | 		bge	21b | 
 | 195 | 22:		cmn	r2, #16 | 
 | 196 | 		ldmgedb	r1!, {r3 - r6} | 
 | 197 | 		stmgedb	r0!, {r3 - r6} | 
 | 198 | 		subge	r2, r2, #16 | 
 | 199 | 		adds	r2, r2, #20 | 
 | 200 | 		ldmgedb	r1!, {r3 - r5} | 
 | 201 | 		stmgedb	r0!, {r3 - r5} | 
 | 202 | 		subge	r2, r2, #12 | 
 | 203 | 23:		adds	r2, r2, #8 | 
 | 204 | 		blt	24f | 
 | 205 | 		subs	r2, r2, #4 | 
 | 206 | 		ldrlt	r3, [r1, #-4]! | 
 | 207 | 		ldmgedb	r1!, {r4, r5} | 
 | 208 | 		strlt	r3, [r0, #-4]! | 
 | 209 | 		stmgedb	r0!, {r4, r5} | 
 | 210 | 		subge	r2, r2, #4 | 
 | 211 |  | 
 | 212 | 24:		adds	r2, r2, #4 | 
 | 213 | 		EXITEQ | 
 | 214 | 		cmp	r2, #2 | 
 | 215 | 		ldrb	r3, [r1, #-1]! | 
 | 216 | 		ldrgeb	r4, [r1, #-1]! | 
 | 217 | 		ldrgtb	r5, [r1, #-1]! | 
 | 218 | 		strb	r3, [r0, #-1]! | 
 | 219 | 		strgeb	r4, [r0, #-1]! | 
 | 220 | 		strgtb	r5, [r0, #-1]! | 
 | 221 | 		EXIT | 
 | 222 |  | 
 | 223 | 25:		cmp	ip, #2 | 
 | 224 | 		ldrb	r3, [r1, #-1]! | 
 | 225 | 		ldrgeb	r4, [r1, #-1]! | 
 | 226 | 		ldrgtb	r5, [r1, #-1]! | 
 | 227 | 		strb	r3, [r0, #-1]! | 
 | 228 | 		strgeb	r4, [r0, #-1]! | 
 | 229 | 		strgtb	r5, [r0, #-1]! | 
 | 230 | 		subs	r2, r2, ip | 
 | 231 | 		blt	24b | 
 | 232 | 		ands	ip, r1, #3 | 
 | 233 | 		beq	20b | 
 | 234 |  | 
 | 235 | 26:		bic	r1, r1, #3 | 
 | 236 | 		ldr	r3, [r1], #0 | 
 | 237 | 		cmp	ip, #2 | 
 | 238 | 		blt	34f | 
 | 239 | 		beq	30f | 
 | 240 | 		cmp	r2, #12 | 
 | 241 | 		blt	28f | 
 | 242 | 		sub	r2, r2, #12 | 
 | 243 | 27:		mov	r7, r3, push #8 | 
 | 244 | 		ldmdb	r1!, {r3, r4, r5, r6} | 
 | 245 | 		orr	r7, r7, r6, pull #24 | 
 | 246 | 		mov	r6, r6, push #8 | 
 | 247 | 		orr	r6, r6, r5, pull #24 | 
 | 248 | 		mov	r5, r5, push #8 | 
 | 249 | 		orr	r5, r5, r4, pull #24 | 
 | 250 | 		mov	r4, r4, push #8 | 
 | 251 | 		orr	r4, r4, r3, pull #24 | 
 | 252 | 		stmdb	r0!, {r4, r5, r6, r7} | 
 | 253 | 		subs	r2, r2, #16 | 
 | 254 | 		bge	27b | 
 | 255 | 		adds	r2, r2, #12 | 
 | 256 | 		blt	29f | 
 | 257 | 28:		mov	ip, r3, push #8 | 
 | 258 | 		ldr	r3, [r1, #-4]! | 
 | 259 | 		subs	r2, r2, #4 | 
 | 260 | 		orr	ip, ip, r3, pull #24 | 
 | 261 | 		str	ip, [r0, #-4]! | 
 | 262 | 		bge	28b | 
 | 263 | 29:		add	r1, r1, #3 | 
 | 264 | 		b	24b | 
 | 265 |  | 
 | 266 | 30:		cmp	r2, #12 | 
 | 267 | 		blt	32f | 
 | 268 | 		sub	r2, r2, #12 | 
 | 269 | 31:		mov	r7, r3, push #16 | 
 | 270 | 		ldmdb	r1!, {r3, r4, r5, r6} | 
 | 271 | 		orr	r7, r7, r6, pull #16 | 
 | 272 | 		mov	r6, r6, push #16 | 
 | 273 | 		orr	r6, r6, r5, pull #16 | 
 | 274 | 		mov	r5, r5, push #16 | 
 | 275 | 		orr	r5, r5, r4, pull #16 | 
 | 276 | 		mov	r4, r4, push #16 | 
 | 277 | 		orr	r4, r4, r3, pull #16 | 
 | 278 | 		stmdb	r0!, {r4, r5, r6, r7} | 
 | 279 | 		subs	r2, r2, #16 | 
 | 280 | 		bge	31b | 
 | 281 | 		adds	r2, r2, #12 | 
 | 282 | 		blt	33f | 
 | 283 | 32:		mov	ip, r3, push #16 | 
 | 284 | 		ldr	r3, [r1, #-4]! | 
 | 285 | 		subs	r2, r2, #4 | 
 | 286 | 		orr	ip, ip, r3, pull #16 | 
 | 287 | 		str	ip, [r0, #-4]! | 
 | 288 | 		bge	32b | 
 | 289 | 33:		add	r1, r1, #2 | 
 | 290 | 		b	24b | 
 | 291 |  | 
 | 292 | 34:		cmp	r2, #12 | 
 | 293 | 		blt	36f | 
 | 294 | 		sub	r2, r2, #12 | 
 | 295 | 35:		mov	r7, r3, push #24 | 
 | 296 | 		ldmdb	r1!, {r3, r4, r5, r6} | 
 | 297 | 		orr	r7, r7, r6, pull #8 | 
 | 298 | 		mov	r6, r6, push #24 | 
 | 299 | 		orr	r6, r6, r5, pull #8 | 
 | 300 | 		mov	r5, r5, push #24 | 
 | 301 | 		orr	r5, r5, r4, pull #8 | 
 | 302 | 		mov	r4, r4, push #24 | 
 | 303 | 		orr	r4, r4, r3, pull #8 | 
 | 304 | 		stmdb	r0!, {r4, r5, r6, r7} | 
 | 305 | 		subs	r2, r2, #16 | 
 | 306 | 		bge	35b | 
 | 307 | 		adds	r2, r2, #12 | 
 | 308 | 		blt	37f | 
 | 309 | 36:		mov	ip, r3, push #24 | 
 | 310 | 		ldr	r3, [r1, #-4]! | 
 | 311 | 		subs	r2, r2, #4 | 
 | 312 | 		orr	ip, ip, r3, pull #8 | 
 | 313 | 		str	ip, [r0, #-4]! | 
 | 314 | 		bge	36b | 
 | 315 | 37:		add	r1, r1, #1 | 
 | 316 | 		b	24b | 
 | 317 |  | 
 | 318 | 		.align |