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Erik Gillingc5f80062010-01-21 16:53:02 -08001/*
Peter De Schrijverc37c07d2011-12-14 17:03:17 +02002 * arch/arm/mach-tegra/common.c
Erik Gillingc5f80062010-01-21 16:53:02 -08003 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/io.h>
Colin Cross4de3a8f2010-04-05 13:16:42 -070022#include <linux/clk.h>
23#include <linux/delay.h>
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020024#include <linux/of_irq.h>
Erik Gillingc5f80062010-01-21 16:53:02 -080025
26#include <asm/hardware/cache-l2x0.h>
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020027#include <asm/hardware/gic.h>
Erik Gillingc5f80062010-01-21 16:53:02 -080028
29#include <mach/iomap.h>
Colin Cross699fe142010-08-23 18:37:25 -070030#include <mach/system.h>
Erik Gillingc5f80062010-01-21 16:53:02 -080031
32#include "board.h"
Colin Crossd8611962010-01-28 16:40:29 -080033#include "clock.h"
Colin Cross73625e32010-06-23 15:49:17 -070034#include "fuse.h"
Colin Crossd8611962010-01-28 16:40:29 -080035
Colin Cross699fe142010-08-23 18:37:25 -070036void (*arch_reset)(char mode, const char *cmd) = tegra_assert_system_reset;
37
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020038static const struct of_device_id tegra_dt_irq_match[] __initconst = {
39 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init },
40 { }
41};
42
43void __init tegra_dt_init_irq(void)
44{
45 tegra_init_irq();
46 of_irq_init(tegra_dt_irq_match);
47}
48
Colin Cross699fe142010-08-23 18:37:25 -070049void tegra_assert_system_reset(char mode, const char *cmd)
50{
Peter De Schrijver9bfc3f02011-12-14 17:03:19 +020051 void __iomem *reset = IO_ADDRESS(TEGRA_PMC_BASE + 0);
Colin Cross699fe142010-08-23 18:37:25 -070052 u32 reg;
53
Simon Glass375b19c2011-02-17 08:13:57 -080054 reg = readl_relaxed(reset);
Peter De Schrijver9bfc3f02011-12-14 17:03:19 +020055 reg |= 0x10;
Simon Glass375b19c2011-02-17 08:13:57 -080056 writel_relaxed(reg, reset);
Colin Cross699fe142010-08-23 18:37:25 -070057}
58
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020059#ifdef CONFIG_ARCH_TEGRA_2x_SOC
60static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = {
Colin Crossd8611962010-01-28 16:40:29 -080061 /* name parent rate enabled */
62 { "clk_m", NULL, 0, true },
63 { "pll_p", "clk_m", 216000000, true },
64 { "pll_p_out1", "pll_p", 28800000, true },
65 { "pll_p_out2", "pll_p", 48000000, true },
66 { "pll_p_out3", "pll_p", 72000000, true },
67 { "pll_p_out4", "pll_p", 108000000, true },
Colin Cross8486bdd2010-06-24 18:57:00 -070068 { "sclk", "pll_p_out4", 108000000, true },
69 { "hclk", "sclk", 108000000, true },
Colin Crossd8611962010-01-28 16:40:29 -080070 { "pclk", "hclk", 54000000, true },
Colin Crosscd51d0e2011-02-21 17:05:36 -080071 { "csite", NULL, 0, true },
72 { "emc", NULL, 0, true },
73 { "cpu", NULL, 0, true },
Colin Crossd8611962010-01-28 16:40:29 -080074 { NULL, NULL, 0, 0},
75};
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020076#endif
Erik Gillingc5f80062010-01-21 16:53:02 -080077
Olof Johansson74ae6c32011-09-08 17:31:32 -070078static void __init tegra_init_cache(void)
Erik Gillingc5f80062010-01-21 16:53:02 -080079{
80#ifdef CONFIG_CACHE_L2X0
81 void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
82
Colin Cross535371c2011-01-22 00:36:14 -080083 writel_relaxed(0x331, p + L2X0_TAG_LATENCY_CTRL);
84 writel_relaxed(0x441, p + L2X0_DATA_LATENCY_CTRL);
Erik Gillingc5f80062010-01-21 16:53:02 -080085
86 l2x0_init(p, 0x6C080001, 0x8200c3fe);
87#endif
Colin Cross4de3a8f2010-04-05 13:16:42 -070088
Erik Gillingc5f80062010-01-21 16:53:02 -080089}
90
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020091#ifdef CONFIG_ARCH_TEGRA_2x_SOC
92void __init tegra20_init_early(void)
Erik Gillingc5f80062010-01-21 16:53:02 -080093{
Colin Cross73625e32010-06-23 15:49:17 -070094 tegra_init_fuse();
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020095 tegra2_init_clocks();
96 tegra_clk_init_from_table(tegra20_clk_init_table);
Erik Gillingc5f80062010-01-21 16:53:02 -080097 tegra_init_cache();
Erik Gillingc5f80062010-01-21 16:53:02 -080098}
Peter De Schrijverc37c07d2011-12-14 17:03:17 +020099#endif