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Rabin Vincentfe052032011-02-11 17:07:21 -07001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 */
6
7#include <linux/kernel.h>
8#include <linux/init.h>
Paul Gortmaker50af5ea2012-01-20 18:35:53 -05009#include <linux/bug.h>
Linus Walleij1baa5742012-04-19 18:27:38 +020010#include <linux/string.h>
Linus Walleijed781d32012-05-03 00:44:52 +020011#include <linux/pinctrl/machine.h>
Rabin Vincentfe052032011-02-11 17:07:21 -070012
Bibek Basu4bc3a692011-02-15 10:46:59 +010013#include <asm/mach-types.h>
Rabin Vincentfe052032011-02-11 17:07:21 -070014#include <plat/pincfg.h>
Linus Walleij0f332862011-08-22 08:33:30 +010015#include <plat/gpio-nomadik.h>
Linus Walleij1baa5742012-04-19 18:27:38 +020016
Rabin Vincentfe052032011-02-11 17:07:21 -070017#include <mach/hardware.h>
18
19#include "pins-db8500.h"
Linus Walleij1baa5742012-04-19 18:27:38 +020020#include "board-mop500.h"
21
22enum custom_pin_cfg_t {
23 PINS_FOR_DEFAULT,
24 PINS_FOR_U9500,
25};
26
27static enum custom_pin_cfg_t pinsfor;
Rabin Vincentfe052032011-02-11 17:07:21 -070028
Linus Walleijed781d32012-05-03 00:44:52 +020029/* These simply sets bias for pins */
30#define BIAS(a,b) static unsigned long a[] = { b }
Bibek Basu4bc3a692011-02-15 10:46:59 +010031
Linus Walleijed781d32012-05-03 00:44:52 +020032BIAS(pd, PIN_PULL_DOWN);
Linus Walleijed781d32012-05-03 00:44:52 +020033BIAS(in_nopull, PIN_INPUT_NOPULL);
Linus Walleij4c854722012-09-18 13:23:02 +020034BIAS(in_nopull_slpm_nowkup, PIN_INPUT_NOPULL|PIN_SLPM_WAKEUP_DISABLE);
Linus Walleijed781d32012-05-03 00:44:52 +020035BIAS(in_pu, PIN_INPUT_PULLUP);
36BIAS(in_pd, PIN_INPUT_PULLDOWN);
Linus Walleijed781d32012-05-03 00:44:52 +020037BIAS(out_hi, PIN_OUTPUT_HIGH);
38BIAS(out_lo, PIN_OUTPUT_LOW);
Linus Walleij4c854722012-09-18 13:23:02 +020039BIAS(out_lo_slpm_nowkup, PIN_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE);
Linus Walleijed781d32012-05-03 00:44:52 +020040/* These also force them into GPIO mode */
41BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
42BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
43BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
44BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
45BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
46BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
Linus Walleija0980662012-05-07 01:33:24 +020047/* Sleep modes */
Patrice Chotard9cd9d652012-10-18 13:35:35 +020048BIAS(slpm_in_nopull_wkup, PIN_SLEEPMODE_ENABLED|
49 PIN_SLPM_DIR_INPUT|PIN_SLPM_PULL_NONE|PIN_SLPM_WAKEUP_ENABLE);
50BIAS(slpm_in_wkup_pdis, PIN_SLEEPMODE_ENABLED|
51 PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
52BIAS(slpm_wkup_pdis, PIN_SLEEPMODE_ENABLED|
53 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
54BIAS(slpm_out_wkup_pdis, PIN_SLEEPMODE_ENABLED|
55 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
56BIAS(slpm_out_hi_wkup_pdis, PIN_SLEEPMODE_ENABLED|
57 PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
58BIAS(slpm_out_lo_pdis, PIN_SLEEPMODE_ENABLED|
59 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_DISABLE|PIN_SLPM_PDIS_DISABLED);
60BIAS(slpm_out_lo_wkup, PIN_SLEEPMODE_ENABLED|
61 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE);
62BIAS(slpm_out_lo_wkup_pdis, PIN_SLEEPMODE_ENABLED|
63 PIN_SLPM_OUTPUT_LOW|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
64BIAS(slpm_in_nopull_wkup_pdis, PIN_SLEEPMODE_ENABLED|
65 PIN_SLPM_INPUT_NOPULL|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
66BIAS(slpm_in_pu_wkup_pdis_en, PIN_SLEEPMODE_ENABLED|PIN_SLPM_INPUT_PULLUP|
67 PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_ENABLED);
Bibek Basu4bc3a692011-02-15 10:46:59 +010068
Linus Walleijed781d32012-05-03 00:44:52 +020069/* We use these to define hog settings that are always done on boot */
70#define DB8500_MUX_HOG(group,func) \
71 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
72#define DB8500_PIN_HOG(pin,conf) \
73 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
Patrice Chotard4401e292012-09-20 13:55:27 +020074#define DB8500_PIN_SLEEP(pin, conf, dev) \
75 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
76 pin, conf)
Linus Walleij1baa5742012-04-19 18:27:38 +020077
Linus Walleijed781d32012-05-03 00:44:52 +020078/* These are default states associated with device and changed runtime */
79#define DB8500_MUX(group,func,dev) \
80 PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
81#define DB8500_PIN(pin,conf,dev) \
82 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
Patrice Chotardd0368092012-10-09 15:26:11 +020083#define DB8500_PIN_IDLE(pin, conf, dev) \
84 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_IDLE, "pinctrl-db8500", \
85 pin, conf)
Linus Walleij4c854722012-09-18 13:23:02 +020086#define DB8500_PIN_SLEEP(pin, conf, dev) \
87 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
88 pin, conf)
Bibek Basu4bc3a692011-02-15 10:46:59 +010089
Linus Walleijed781d32012-05-03 00:44:52 +020090/* Pin control settings */
91static struct pinctrl_map __initdata mop500_family_pinmap[] = {
92 /*
93 * uMSP0, mux in 4 pins, regular placement of RX/TX
94 * explicitly set the pins to no pull
Shreshtha Kumar Sahu1a7d4362011-06-13 10:11:44 +020095 */
Linus Walleijed781d32012-05-03 00:44:52 +020096 DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
97 DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
98 DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
99 DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
100 DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
101 DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
102 /* MSP2 for HDMI, pull down TXD, TCK, TFS */
103 DB8500_MUX_HOG("msp2_a_1", "msp2"),
104 DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
105 DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
106 DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
107 DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
108 /*
109 * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
110 * pull-up
111 * TODO: is this really correct? Snowball doesn't have a LCD.
112 */
113 DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
114 DB8500_PIN_HOG("GPIO68_E1", in_pu),
115 DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
116 /*
117 * STMPE1601/tc35893 keypad IRQ GPIO 218
118 * TODO: set for snowball and HREF really??
119 */
120 DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
121 /*
122 * UART0, we do not mux in u0 here.
123 * uart-0 pins gpio configuration should be kept intact to prevent
124 * a glitch in tx line when the tty dev is opened. Later these pins
125 * are configured to uart mop500_pins_uart0
126 */
127 DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
128 DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
129 DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
130 DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
131 /*
132 * Mux in UART2 on altfunction C and set pull-ups.
133 * TODO: is this used on U8500 variants and Snowball really?
134 * The setting on GPIO31 conflicts with magnetometer use on hrefv60
135 */
136 DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
137 DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
138 DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
139 DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
140 DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
141 DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
142 /*
143 * The following pin sets were known as "runtime pins" before being
144 * converted to the pinctrl model. Here we model them as "default"
145 * states.
146 */
Linus Walleija0980662012-05-07 01:33:24 +0200147 /* Mux in UART0 after initialization */
148 DB8500_MUX("u0_a_1", "u0", "uart0"),
149 DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
150 DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
151 DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
152 DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
Linus Walleij08d98fe2012-05-07 10:34:16 +0200153 /* UART0 sleep state */
Linus Walleij4c854722012-09-18 13:23:02 +0200154 DB8500_PIN_SLEEP("GPIO0_AJ5", slpm_in_wkup_pdis, "uart0"),
155 DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"),
156 DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"),
157 DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"),
Linus Walleij08d98fe2012-05-07 10:34:16 +0200158 /* MSP1 for ALSA codec */
159 DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
160 DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
Linus Walleij4c854722012-09-18 13:23:02 +0200161 DB8500_PIN("GPIO33_AF2", out_lo_slpm_nowkup, "ux500-msp-i2s.1"),
162 DB8500_PIN("GPIO34_AE1", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
163 DB8500_PIN("GPIO35_AE2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
164 DB8500_PIN("GPIO36_AG2", in_nopull_slpm_nowkup, "ux500-msp-i2s.1"),
Linus Walleij08d98fe2012-05-07 10:34:16 +0200165 /* MSP1 sleep state */
Linus Walleij4c854722012-09-18 13:23:02 +0200166 DB8500_PIN_SLEEP("GPIO33_AF2", slpm_out_lo_wkup, "ux500-msp-i2s.1"),
167 DB8500_PIN_SLEEP("GPIO34_AE1", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
168 DB8500_PIN_SLEEP("GPIO35_AE2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
169 DB8500_PIN_SLEEP("GPIO36_AG2", slpm_in_nopull_wkup, "ux500-msp-i2s.1"),
Linus Walleijed781d32012-05-03 00:44:52 +0200170 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
171 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
172 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
173 /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
Patrice Chotard9728df92012-09-26 13:10:29 +0200174 DB8500_MUX("lcdvsi1_a_1", "lcd", "0-0070"),
175 DB8500_PIN("GPIO69_E2", in_pu, "0-0070"),
176 /* LCD VSI1 sleep state */
177 DB8500_PIN_SLEEP("GPIO69_E2", slpm_in_wkup_pdis, "0-0070"),
Patrice Chotard4401e292012-09-20 13:55:27 +0200178 /* Mux in i2c0 block, default state */
Linus Walleijed781d32012-05-03 00:44:52 +0200179 DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
Patrice Chotard4401e292012-09-20 13:55:27 +0200180 /* i2c0 sleep state */
181 DB8500_PIN_SLEEP("GPIO147_C15", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SDA */
182 DB8500_PIN_SLEEP("GPIO148_B16", slpm_in_nopull_wkup_pdis, "nmk-i2c.0"), /* SCL */
183 /* Mux in i2c1 block, default state */
Linus Walleijed781d32012-05-03 00:44:52 +0200184 DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
Patrice Chotard4401e292012-09-20 13:55:27 +0200185 /* i2c1 sleep state */
186 DB8500_PIN_SLEEP("GPIO16_AD3", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SDA */
187 DB8500_PIN_SLEEP("GPIO17_AD4", slpm_in_nopull_wkup_pdis, "nmk-i2c.1"), /* SCL */
188 /* Mux in i2c2 block, default state */
Linus Walleijed781d32012-05-03 00:44:52 +0200189 DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
Patrice Chotard4401e292012-09-20 13:55:27 +0200190 /* i2c2 sleep state */
191 DB8500_PIN_SLEEP("GPIO10_AF5", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SDA */
192 DB8500_PIN_SLEEP("GPIO11_AG4", slpm_in_nopull_wkup_pdis, "nmk-i2c.2"), /* SCL */
193 /* Mux in i2c3 block, default state */
Linus Walleijed781d32012-05-03 00:44:52 +0200194 DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
Patrice Chotard4401e292012-09-20 13:55:27 +0200195 /* i2c3 sleep state */
196 DB8500_PIN_SLEEP("GPIO229_AG7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SDA */
197 DB8500_PIN_SLEEP("GPIO230_AF7", slpm_in_nopull_wkup_pdis, "nmk-i2c.3"), /* SCL */
Linus Walleijed781d32012-05-03 00:44:52 +0200198 /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
199 DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
200 DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
201 DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
202 DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
203 DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
204 DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
205 DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
206 DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
207 DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
208 DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
209 DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
210 /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
211 DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
212 DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
213 DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
214 DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
215 DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
216 DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
217 DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
218 DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
219 /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
220 DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
221 DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
222 DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
223 DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
224 DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
225 DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
226 DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
227 DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
228 DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
229 DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
230 DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
231 DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
232 /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
233 DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
234 DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
235 DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
236 DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
237 DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
238 DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
239 DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
240 DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
241 DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
242 DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
243 DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
244 DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
245 /* Mux in USB pins, drive STP high */
246 DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
247 DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
248 /* Mux in SPI2 pins on the "other C1" altfunction */
Patrice Chotard0fda8f02012-09-17 18:52:15 +0200249 DB8500_MUX("spi2_oc1_2", "spi2", "spi2"),
Linus Walleijed781d32012-05-03 00:44:52 +0200250 DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
251 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
252 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
253 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
Patrice Chotardd0368092012-10-09 15:26:11 +0200254 /* SPI2 idle state */
255 DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
256 DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
257 DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
Linus Walleij4c854722012-09-18 13:23:02 +0200258 /* SPI2 sleep state */
Patrice Chotardd0368092012-10-09 15:26:11 +0200259 DB8500_PIN_SLEEP("GPIO216_AG12", slpm_in_wkup_pdis, "spi2"), /* FRM */
Linus Walleij4c854722012-09-18 13:23:02 +0200260 DB8500_PIN_SLEEP("GPIO218_AH11", slpm_in_wkup_pdis, "spi2"), /* RXD */
261 DB8500_PIN_SLEEP("GPIO215_AH13", slpm_out_lo_wkup_pdis, "spi2"), /* TXD */
262 DB8500_PIN_SLEEP("GPIO217_AH12", slpm_wkup_pdis, "spi2"), /* CLK */
Patrice Chotard9cd9d652012-10-18 13:35:35 +0200263
264 /* ske default state */
265 DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
266 DB8500_PIN("GPIO153_B17", in_pd, "nmk-ske-keypad"), /* I7 */
267 DB8500_PIN("GPIO154_C16", in_pd, "nmk-ske-keypad"), /* I6 */
268 DB8500_PIN("GPIO155_C19", in_pd, "nmk-ske-keypad"), /* I5 */
269 DB8500_PIN("GPIO156_C17", in_pd, "nmk-ske-keypad"), /* I4 */
270 DB8500_PIN("GPIO161_D21", in_pd, "nmk-ske-keypad"), /* I3 */
271 DB8500_PIN("GPIO162_D20", in_pd, "nmk-ske-keypad"), /* I2 */
272 DB8500_PIN("GPIO163_C20", in_pd, "nmk-ske-keypad"), /* I1 */
273 DB8500_PIN("GPIO164_B21", in_pd, "nmk-ske-keypad"), /* I0 */
274 DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
275 DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
276 DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
277 DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
278 DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
279 DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
280 DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
281 DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
282 /* ske sleep state */
283 DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
284 DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
285 DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
286 DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
287 DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
288 DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
289 DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
290 DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
291 DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
292 DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
293 DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
294 DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
295 DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
296 DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
297 DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
298 DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
Robert Marklundc41fac82011-06-21 09:39:13 +0200299};
300
Linus Walleij1baa5742012-04-19 18:27:38 +0200301/*
Linus Walleijed781d32012-05-03 00:44:52 +0200302 * These are specifically for the MOP500 and HREFP (pre-v60) version of the
303 * board, which utilized a TC35892 GPIO expander instead of using a lot of
304 * on-chip pins as the HREFv60 and later does.
Linus Walleij1baa5742012-04-19 18:27:38 +0200305 */
Linus Walleijed781d32012-05-03 00:44:52 +0200306static struct pinctrl_map __initdata mop500_pinmap[] = {
307 /* Mux in SSP0, pull down RXD pin */
308 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
309 DB8500_PIN_HOG("GPIO145_C13", pd),
310 /*
311 * XENON Flashgun on image processor GPIO (controlled from image
312 * processor firmware), mux in these image processor GPIO lines 0
313 * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
314 * the pins.
315 */
316 DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
317 DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
318 DB8500_PIN_HOG("GPIO6_AF6", in_pu),
319 DB8500_PIN_HOG("GPIO7_AG5", in_pu),
320 /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
321 DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
322 /* Mux in UART1 and set the pull-ups */
323 DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
324 DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
325 DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
326 DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
327 DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
328 DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
329 /*
330 * Runtime stuff: make it possible to mux in the SKE keypad
331 * and bias the pins
332 */
Patrice Chotard9cd9d652012-10-18 13:35:35 +0200333 /* ske default state */
334 DB8500_MUX("kp_a_2", "kp", "nmk-ske-keypad"),
335 DB8500_PIN("GPIO153_B17", in_pu, "nmk-ske-keypad"), /* I7 */
336 DB8500_PIN("GPIO154_C16", in_pu, "nmk-ske-keypad"), /* I6 */
337 DB8500_PIN("GPIO155_C19", in_pu, "nmk-ske-keypad"), /* I5 */
338 DB8500_PIN("GPIO156_C17", in_pu, "nmk-ske-keypad"), /* I4 */
339 DB8500_PIN("GPIO161_D21", in_pu, "nmk-ske-keypad"), /* I3 */
340 DB8500_PIN("GPIO162_D20", in_pu, "nmk-ske-keypad"), /* I2 */
341 DB8500_PIN("GPIO163_C20", in_pu, "nmk-ske-keypad"), /* I1 */
342 DB8500_PIN("GPIO164_B21", in_pu, "nmk-ske-keypad"), /* I0 */
343 DB8500_PIN("GPIO157_A18", out_lo, "nmk-ske-keypad"), /* O7 */
344 DB8500_PIN("GPIO158_C18", out_lo, "nmk-ske-keypad"), /* O6 */
345 DB8500_PIN("GPIO159_B19", out_lo, "nmk-ske-keypad"), /* O5 */
346 DB8500_PIN("GPIO160_B20", out_lo, "nmk-ske-keypad"), /* O4 */
347 DB8500_PIN("GPIO165_C21", out_lo, "nmk-ske-keypad"), /* O3 */
348 DB8500_PIN("GPIO166_A22", out_lo, "nmk-ske-keypad"), /* O2 */
349 DB8500_PIN("GPIO167_B24", out_lo, "nmk-ske-keypad"), /* O1 */
350 DB8500_PIN("GPIO168_C22", out_lo, "nmk-ske-keypad"), /* O0 */
351 /* ske sleep state */
352 DB8500_PIN_SLEEP("GPIO153_B17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I7 */
353 DB8500_PIN_SLEEP("GPIO154_C16", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I6 */
354 DB8500_PIN_SLEEP("GPIO155_C19", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I5 */
355 DB8500_PIN_SLEEP("GPIO156_C17", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I4 */
356 DB8500_PIN_SLEEP("GPIO161_D21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I3 */
357 DB8500_PIN_SLEEP("GPIO162_D20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I2 */
358 DB8500_PIN_SLEEP("GPIO163_C20", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I1 */
359 DB8500_PIN_SLEEP("GPIO164_B21", slpm_in_pu_wkup_pdis_en, "nmk-ske-keypad"), /* I0 */
360 DB8500_PIN_SLEEP("GPIO157_A18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O7 */
361 DB8500_PIN_SLEEP("GPIO158_C18", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O6 */
362 DB8500_PIN_SLEEP("GPIO159_B19", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O5 */
363 DB8500_PIN_SLEEP("GPIO160_B20", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O4 */
364 DB8500_PIN_SLEEP("GPIO165_C21", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O3 */
365 DB8500_PIN_SLEEP("GPIO166_A22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O2 */
366 DB8500_PIN_SLEEP("GPIO167_B24", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O1 */
367 DB8500_PIN_SLEEP("GPIO168_C22", slpm_out_lo_pdis, "nmk-ske-keypad"), /* O0 */
368
Linus Walleijed781d32012-05-03 00:44:52 +0200369 /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
370 DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
371 DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
Linus Walleij1baa5742012-04-19 18:27:38 +0200372};
373
Linus Walleijed781d32012-05-03 00:44:52 +0200374/*
375 * The HREFv60 series of platforms is using available pins on the DB8500
376 * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
377 * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
378 */
379static struct pinctrl_map __initdata hrefv60_pinmap[] = {
380 /* Drive WLAN_ENA low */
381 DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
382 /*
383 * XENON Flashgun on image processor GPIO (controlled from image
384 * processor firmware), mux in these image processor GPIO lines 0
385 * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
386 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
387 * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
388 */
389 DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
390 DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
391 DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
392 DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
393 DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
394 DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
395 DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
396 /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
397 DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
398 DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
399 /*
400 * Display Interface 1 uses GPIO 65 for RST (reset).
401 * Display Interface 2 uses GPIO 66 for RST (reset).
402 * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
403 */
404 DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
405 DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
406 /*
407 * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
408 * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
409 * reset signals low.
410 */
411 DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
412 DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
413 DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
414 /*
415 * Drive D19-D23 for the ETM PTM trace interface low,
416 * (presumably pins are unconnected therefore grounded here,
417 * the "other alt C1" setting enables these pins)
418 */
419 DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
420 DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
421 DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
422 DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
423 DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
424 /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
425 DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
426 DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
427 /* NFC ENA and RESET to low, pulldown IRQ line */
428 DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
429 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
430 DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
431 /*
432 * SKE keyboard partly on alt A and partly on "Other alt C1"
433 * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
434 * rows of 6 keys, then pull up force sensing interrup and
435 * drive reset and force sensing WU low.
436 */
437 DB8500_MUX_HOG("kp_a_1", "kp"),
438 DB8500_MUX_HOG("kp_oc1_1", "kp"),
439 DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
440 DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
441 DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
442 DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
443 DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
444 DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
445 DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
446 DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
447 DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
448 DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
449 DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
450 /* DiPro Sensor interrupt */
451 DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
452 /* Audio Amplifier HF enable */
453 DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
454 /* GBF interface, pull low to reset state */
455 DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
456 /* MSP : HDTV INTERFACE GPIO line */
457 DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
458 /* Accelerometer interrupt lines */
459 DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
460 DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
461 /* SD card detect GPIO pin */
462 DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
463 /*
464 * Runtime stuff
465 * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
466 * etc.
467 */
468 DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
469 DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
470 DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
Linus Walleij1baa5742012-04-19 18:27:38 +0200471};
472
Linus Walleijed781d32012-05-03 00:44:52 +0200473static struct pinctrl_map __initdata u9500_pinmap[] = {
474 /* Mux in UART1 (just RX/TX) and set the pull-ups */
475 DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
476 DB8500_PIN_HOG("GPIO4_AH6", in_pu),
477 DB8500_PIN_HOG("GPIO5_AG6", out_hi),
478 /* WLAN_IRQ line */
479 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
480 /* HSI */
481 DB8500_MUX_HOG("hsir_a_1", "hsi"),
Patrice Chotard6fc84b8412012-09-05 10:52:25 +0200482 DB8500_MUX_HOG("hsit_a_2", "hsi"),
Linus Walleijed781d32012-05-03 00:44:52 +0200483 DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
484 DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
485 DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
486 DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
487 DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
488 DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
489 DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
Patrice Chotard6fc84b8412012-09-05 10:52:25 +0200490 DB8500_PIN_HOG("GPIO226_AF8", gpio_out_hi), /* ACWAKE0 */
Linus Walleijed781d32012-05-03 00:44:52 +0200491};
492
493static struct pinctrl_map __initdata u8500_pinmap[] = {
494 DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
495 DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
496};
497
498static struct pinctrl_map __initdata snowball_pinmap[] = {
499 /* Mux in SSP0 connected to AB8500, pull down RXD pin */
500 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
501 DB8500_PIN_HOG("GPIO145_C13", pd),
502 /* Always drive the MC0 DAT31DIR line high on these boards */
503 DB8500_PIN_HOG("GPIO21_AB3", out_hi),
504 /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
505 DB8500_MUX_HOG("sm_b_1", "sm"),
506 /* Drive RSTn_LAN high */
507 DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
508 /* Accelerometer/Magnetometer */
509 DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
510 DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
511 DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
512 /* WLAN/GBF */
513 DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
514 DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
515 DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
516 DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
Linus Walleij1baa5742012-04-19 18:27:38 +0200517};
518
519/*
520 * passing "pinsfor=" in kernel cmdline allows for custom
521 * configuration of GPIOs on u8500 derived boards.
522 */
523static int __init early_pinsfor(char *p)
524{
525 pinsfor = PINS_FOR_DEFAULT;
526
527 if (strcmp(p, "u9500-21") == 0)
528 pinsfor = PINS_FOR_U9500;
529
530 return 0;
531}
532early_param("pinsfor", early_pinsfor);
533
534int pins_for_u9500(void)
535{
536 if (pinsfor == PINS_FOR_U9500)
537 return 1;
538
539 return 0;
540}
541
Linus Walleijed781d32012-05-03 00:44:52 +0200542static void __init mop500_href_family_pinmaps_init(void)
Rabin Vincentfe052032011-02-11 17:07:21 -0700543{
Linus Walleij1baa5742012-04-19 18:27:38 +0200544 switch (pinsfor) {
545 case PINS_FOR_U9500:
Linus Walleijed781d32012-05-03 00:44:52 +0200546 pinctrl_register_mappings(u9500_pinmap,
547 ARRAY_SIZE(u9500_pinmap));
Linus Walleij1baa5742012-04-19 18:27:38 +0200548 break;
Linus Walleij1baa5742012-04-19 18:27:38 +0200549 case PINS_FOR_DEFAULT:
Linus Walleijed781d32012-05-03 00:44:52 +0200550 pinctrl_register_mappings(u8500_pinmap,
551 ARRAY_SIZE(u8500_pinmap));
Linus Walleij1baa5742012-04-19 18:27:38 +0200552 default:
553 break;
554 }
Lee Jones110c2c22011-08-26 16:54:07 +0100555}
556
Linus Walleijed781d32012-05-03 00:44:52 +0200557void __init mop500_pinmaps_init(void)
Lee Jones110c2c22011-08-26 16:54:07 +0100558{
Linus Walleijed781d32012-05-03 00:44:52 +0200559 pinctrl_register_mappings(mop500_family_pinmap,
560 ARRAY_SIZE(mop500_family_pinmap));
561 pinctrl_register_mappings(mop500_pinmap,
562 ARRAY_SIZE(mop500_pinmap));
563 mop500_href_family_pinmaps_init();
Lee Jones110c2c22011-08-26 16:54:07 +0100564}
565
Linus Walleijed781d32012-05-03 00:44:52 +0200566void __init snowball_pinmaps_init(void)
Lee Jones110c2c22011-08-26 16:54:07 +0100567{
Linus Walleijed781d32012-05-03 00:44:52 +0200568 pinctrl_register_mappings(mop500_family_pinmap,
569 ARRAY_SIZE(mop500_family_pinmap));
570 pinctrl_register_mappings(snowball_pinmap,
571 ARRAY_SIZE(snowball_pinmap));
572 pinctrl_register_mappings(u8500_pinmap,
573 ARRAY_SIZE(u8500_pinmap));
574}
Lee Jones110c2c22011-08-26 16:54:07 +0100575
Linus Walleijed781d32012-05-03 00:44:52 +0200576void __init hrefv60_pinmaps_init(void)
577{
578 pinctrl_register_mappings(mop500_family_pinmap,
579 ARRAY_SIZE(mop500_family_pinmap));
580 pinctrl_register_mappings(hrefv60_pinmap,
581 ARRAY_SIZE(hrefv60_pinmap));
582 mop500_href_family_pinmaps_init();
Rabin Vincentfe052032011-02-11 17:07:21 -0700583}