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Huang Shijie45dfc1a2011-09-08 10:47:10 +08001/*
2 * Freescale GPMI NAND Flash Driver
3 *
4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
5 * Copyright 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21#ifndef __GPMI_NAND_BCH_REGS_H
22#define __GPMI_NAND_BCH_REGS_H
23
24#define HW_BCH_CTRL 0x00000000
25#define HW_BCH_CTRL_SET 0x00000004
26#define HW_BCH_CTRL_CLR 0x00000008
27#define HW_BCH_CTRL_TOG 0x0000000c
28
29#define BM_BCH_CTRL_COMPLETE_IRQ_EN (1 << 8)
30#define BM_BCH_CTRL_COMPLETE_IRQ (1 << 0)
31
32#define HW_BCH_STATUS0 0x00000010
33#define HW_BCH_MODE 0x00000020
34#define HW_BCH_ENCODEPTR 0x00000030
35#define HW_BCH_DATAPTR 0x00000040
36#define HW_BCH_METAPTR 0x00000050
37#define HW_BCH_LAYOUTSELECT 0x00000070
38
39#define HW_BCH_FLASH0LAYOUT0 0x00000080
40
41#define BP_BCH_FLASH0LAYOUT0_NBLOCKS 24
42#define BM_BCH_FLASH0LAYOUT0_NBLOCKS (0xff << BP_BCH_FLASH0LAYOUT0_NBLOCKS)
43#define BF_BCH_FLASH0LAYOUT0_NBLOCKS(v) \
44 (((v) << BP_BCH_FLASH0LAYOUT0_NBLOCKS) & BM_BCH_FLASH0LAYOUT0_NBLOCKS)
45
46#define BP_BCH_FLASH0LAYOUT0_META_SIZE 16
47#define BM_BCH_FLASH0LAYOUT0_META_SIZE (0xff << BP_BCH_FLASH0LAYOUT0_META_SIZE)
48#define BF_BCH_FLASH0LAYOUT0_META_SIZE(v) \
49 (((v) << BP_BCH_FLASH0LAYOUT0_META_SIZE)\
50 & BM_BCH_FLASH0LAYOUT0_META_SIZE)
51
52#define BP_BCH_FLASH0LAYOUT0_ECC0 12
53#define BM_BCH_FLASH0LAYOUT0_ECC0 (0xf << BP_BCH_FLASH0LAYOUT0_ECC0)
Huang Shijie9013bb42012-05-04 21:42:06 -040054#define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0 11
55#define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0 (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)
56#define BF_BCH_FLASH0LAYOUT0_ECC0(v, x) \
57 (GPMI_IS_MX6Q(x) \
58 ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0) \
59 & MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0) \
60 : (((v) << BP_BCH_FLASH0LAYOUT0_ECC0) \
61 & BM_BCH_FLASH0LAYOUT0_ECC0) \
62 )
Huang Shijie45dfc1a2011-09-08 10:47:10 +080063
Huang Shijie9ff16f02013-01-25 14:04:07 +080064#define MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14 10
65#define MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14 \
66 (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14)
67#define BF_BCH_FLASH0LAYOUT0_GF(v, x) \
68 ((GPMI_IS_MX6Q(x) && ((v) == 14)) \
69 ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14) \
70 & MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14) \
71 : 0 \
72 )
73
Huang Shijie45dfc1a2011-09-08 10:47:10 +080074#define BP_BCH_FLASH0LAYOUT0_DATA0_SIZE 0
75#define BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \
76 (0xfff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
Huang Shijie9013bb42012-05-04 21:42:06 -040077#define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE \
78 (0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
79#define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x) \
80 (GPMI_IS_MX6Q(x) \
81 ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \
82 : ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE) \
83 )
Huang Shijie45dfc1a2011-09-08 10:47:10 +080084
85#define HW_BCH_FLASH0LAYOUT1 0x00000090
86
87#define BP_BCH_FLASH0LAYOUT1_PAGE_SIZE 16
88#define BM_BCH_FLASH0LAYOUT1_PAGE_SIZE \
89 (0xffff << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE)
90#define BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(v) \
91 (((v) << BP_BCH_FLASH0LAYOUT1_PAGE_SIZE) \
92 & BM_BCH_FLASH0LAYOUT1_PAGE_SIZE)
93
94#define BP_BCH_FLASH0LAYOUT1_ECCN 12
95#define BM_BCH_FLASH0LAYOUT1_ECCN (0xf << BP_BCH_FLASH0LAYOUT1_ECCN)
Huang Shijie9013bb42012-05-04 21:42:06 -040096#define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN 11
97#define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN (0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)
98#define BF_BCH_FLASH0LAYOUT1_ECCN(v, x) \
99 (GPMI_IS_MX6Q(x) \
100 ? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN) \
101 & MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN) \
102 : (((v) << BP_BCH_FLASH0LAYOUT1_ECCN) \
103 & BM_BCH_FLASH0LAYOUT1_ECCN) \
104 )
Huang Shijie45dfc1a2011-09-08 10:47:10 +0800105
Huang Shijie9ff16f02013-01-25 14:04:07 +0800106#define MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14 10
107#define MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14 \
108 (0x1 << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14)
109#define BF_BCH_FLASH0LAYOUT1_GF(v, x) \
110 ((GPMI_IS_MX6Q(x) && ((v) == 14)) \
111 ? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14) \
112 & MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14) \
113 : 0 \
114 )
115
Huang Shijie45dfc1a2011-09-08 10:47:10 +0800116#define BP_BCH_FLASH0LAYOUT1_DATAN_SIZE 0
117#define BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \
118 (0xfff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
Huang Shijie9013bb42012-05-04 21:42:06 -0400119#define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE \
120 (0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
121#define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x) \
122 (GPMI_IS_MX6Q(x) \
123 ? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \
124 : ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE) \
125 )
Huang Shijief7226892013-01-14 15:19:29 +0800126
127#define HW_BCH_VERSION 0x00000160
Huang Shijie45dfc1a2011-09-08 10:47:10 +0800128#endif