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Rabin Vincentfe052032011-02-11 17:07:21 -07001/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License terms: GNU General Public License (GPL) version 2
5 */
6
7#include <linux/kernel.h>
8#include <linux/init.h>
Paul Gortmaker50af5ea2012-01-20 18:35:53 -05009#include <linux/bug.h>
Linus Walleij1baa5742012-04-19 18:27:38 +020010#include <linux/string.h>
Linus Walleijed781d32012-05-03 00:44:52 +020011#include <linux/pinctrl/machine.h>
Rabin Vincentfe052032011-02-11 17:07:21 -070012
Bibek Basu4bc3a692011-02-15 10:46:59 +010013#include <asm/mach-types.h>
Rabin Vincentfe052032011-02-11 17:07:21 -070014#include <plat/pincfg.h>
Linus Walleij0f332862011-08-22 08:33:30 +010015#include <plat/gpio-nomadik.h>
Linus Walleij1baa5742012-04-19 18:27:38 +020016
Rabin Vincentfe052032011-02-11 17:07:21 -070017#include <mach/hardware.h>
18
19#include "pins-db8500.h"
Linus Walleij1baa5742012-04-19 18:27:38 +020020#include "board-mop500.h"
21
22enum custom_pin_cfg_t {
23 PINS_FOR_DEFAULT,
24 PINS_FOR_U9500,
25};
26
27static enum custom_pin_cfg_t pinsfor;
Rabin Vincentfe052032011-02-11 17:07:21 -070028
Linus Walleijed781d32012-05-03 00:44:52 +020029/* These simply sets bias for pins */
30#define BIAS(a,b) static unsigned long a[] = { b }
Bibek Basu4bc3a692011-02-15 10:46:59 +010031
Linus Walleijed781d32012-05-03 00:44:52 +020032BIAS(pd, PIN_PULL_DOWN);
33BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
34BIAS(in_nopull, PIN_INPUT_NOPULL);
35BIAS(in_pu, PIN_INPUT_PULLUP);
36BIAS(in_pd, PIN_INPUT_PULLDOWN);
37BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
38BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
39BIAS(out_hi, PIN_OUTPUT_HIGH);
40BIAS(out_lo, PIN_OUTPUT_LOW);
41/* These also force them into GPIO mode */
42BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
43BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
44BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
45BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
46BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
47BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
Linus Walleija0980662012-05-07 01:33:24 +020048/* Sleep modes */
49BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
50BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
51BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
Bibek Basu4bc3a692011-02-15 10:46:59 +010052
Linus Walleijed781d32012-05-03 00:44:52 +020053/* We use these to define hog settings that are always done on boot */
54#define DB8500_MUX_HOG(group,func) \
55 PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
56#define DB8500_PIN_HOG(pin,conf) \
57 PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
Linus Walleij1baa5742012-04-19 18:27:38 +020058
Linus Walleijed781d32012-05-03 00:44:52 +020059/* These are default states associated with device and changed runtime */
60#define DB8500_MUX(group,func,dev) \
61 PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
62#define DB8500_PIN(pin,conf,dev) \
63 PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
Bibek Basu4bc3a692011-02-15 10:46:59 +010064
Linus Walleija0980662012-05-07 01:33:24 +020065#define DB8500_PIN_SLEEP(pin,conf,dev) \
66 PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
67 pin, conf)
68
Linus Walleijed781d32012-05-03 00:44:52 +020069/* Pin control settings */
70static struct pinctrl_map __initdata mop500_family_pinmap[] = {
71 /*
72 * uMSP0, mux in 4 pins, regular placement of RX/TX
73 * explicitly set the pins to no pull
Shreshtha Kumar Sahu1a7d4362011-06-13 10:11:44 +020074 */
Linus Walleijed781d32012-05-03 00:44:52 +020075 DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
76 DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
77 DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
78 DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
79 DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
80 DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
81 /* MSP2 for HDMI, pull down TXD, TCK, TFS */
82 DB8500_MUX_HOG("msp2_a_1", "msp2"),
83 DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
84 DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
85 DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
86 DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
87 /*
88 * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
89 * pull-up
90 * TODO: is this really correct? Snowball doesn't have a LCD.
91 */
92 DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
93 DB8500_PIN_HOG("GPIO68_E1", in_pu),
94 DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
95 /*
96 * STMPE1601/tc35893 keypad IRQ GPIO 218
97 * TODO: set for snowball and HREF really??
98 */
99 DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
100 /*
101 * UART0, we do not mux in u0 here.
102 * uart-0 pins gpio configuration should be kept intact to prevent
103 * a glitch in tx line when the tty dev is opened. Later these pins
104 * are configured to uart mop500_pins_uart0
105 */
106 DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
107 DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
108 DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
109 DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
110 /*
111 * Mux in UART2 on altfunction C and set pull-ups.
112 * TODO: is this used on U8500 variants and Snowball really?
113 * The setting on GPIO31 conflicts with magnetometer use on hrefv60
114 */
115 DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
116 DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
117 DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
118 DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
119 DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
120 DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
121 /*
122 * The following pin sets were known as "runtime pins" before being
123 * converted to the pinctrl model. Here we model them as "default"
124 * states.
125 */
Linus Walleija0980662012-05-07 01:33:24 +0200126 /* Mux in UART0 after initialization */
127 DB8500_MUX("u0_a_1", "u0", "uart0"),
128 DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
129 DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
130 DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
131 DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
132 /* Sleep state for UART0 */
133 DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"),
134 DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"),
135 DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"),
136 DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"),
Linus Walleijed781d32012-05-03 00:44:52 +0200137 /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
138 DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
139 DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
140 /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
141 DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"),
142 /* Mux in I2C blocks, put pins into GPIO in sleepmode no pull-up */
143 DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
144 DB8500_PIN("GPIO147_C15", slpm_gpio_nopull, "nmk-i2c.0"),
145 DB8500_PIN("GPIO148_B16", slpm_gpio_nopull, "nmk-i2c.0"),
146 DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
147 DB8500_PIN("GPIO16_AD3", slpm_gpio_nopull, "nmk-i2c.1"),
148 DB8500_PIN("GPIO17_AD4", slpm_gpio_nopull, "nmk-i2c.1"),
149 DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
150 DB8500_PIN("GPIO10_AF5", slpm_gpio_nopull, "nmk-i2c.2"),
151 DB8500_PIN("GPIO11_AG4", slpm_gpio_nopull, "nmk-i2c.2"),
152 DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
153 DB8500_PIN("GPIO229_AG7", slpm_gpio_nopull, "nmk-i2c.3"),
154 DB8500_PIN("GPIO230_AF7", slpm_gpio_nopull, "nmk-i2c.3"),
155 /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
156 DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
157 DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
158 DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
159 DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
160 DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
161 DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
162 DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
163 DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
164 DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
165 DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
166 DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
167 /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
168 DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
169 DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
170 DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
171 DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
172 DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
173 DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
174 DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
175 DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
176 /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
177 DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
178 DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
179 DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
180 DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
181 DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
182 DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
183 DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
184 DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
185 DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
186 DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
187 DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
188 DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
189 /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
190 DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
191 DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
192 DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
193 DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
194 DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
195 DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
196 DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
197 DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
198 DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
199 DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
200 DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
201 DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
202 /* Mux in USB pins, drive STP high */
203 DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
204 DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
205 /* Mux in SPI2 pins on the "other C1" altfunction */
206 DB8500_MUX("spi2_oc1_1", "spi2", "spi2"),
207 DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
208 DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
209 DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
210 DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
Robert Marklundc41fac82011-06-21 09:39:13 +0200211};
212
Linus Walleij1baa5742012-04-19 18:27:38 +0200213/*
Linus Walleijed781d32012-05-03 00:44:52 +0200214 * These are specifically for the MOP500 and HREFP (pre-v60) version of the
215 * board, which utilized a TC35892 GPIO expander instead of using a lot of
216 * on-chip pins as the HREFv60 and later does.
Linus Walleij1baa5742012-04-19 18:27:38 +0200217 */
Linus Walleijed781d32012-05-03 00:44:52 +0200218static struct pinctrl_map __initdata mop500_pinmap[] = {
219 /* Mux in SSP0, pull down RXD pin */
220 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
221 DB8500_PIN_HOG("GPIO145_C13", pd),
222 /*
223 * XENON Flashgun on image processor GPIO (controlled from image
224 * processor firmware), mux in these image processor GPIO lines 0
225 * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
226 * the pins.
227 */
228 DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
229 DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
230 DB8500_PIN_HOG("GPIO6_AF6", in_pu),
231 DB8500_PIN_HOG("GPIO7_AG5", in_pu),
232 /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
233 DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
234 /* Mux in UART1 and set the pull-ups */
235 DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
236 DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
237 DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
238 DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
239 DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
240 DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
241 /*
242 * Runtime stuff: make it possible to mux in the SKE keypad
243 * and bias the pins
244 */
245 DB8500_MUX("kp_a_2", "kp", "ske"),
246 DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
247 DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
248 DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
249 DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
250 DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
251 DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
252 DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
253 DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
254 DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
255 DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
256 DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
257 DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
258 DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
259 DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
260 DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
261 DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
262 /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
263 DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
264 DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
Linus Walleij1baa5742012-04-19 18:27:38 +0200265};
266
Linus Walleijed781d32012-05-03 00:44:52 +0200267/*
268 * The HREFv60 series of platforms is using available pins on the DB8500
269 * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
270 * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
271 */
272static struct pinctrl_map __initdata hrefv60_pinmap[] = {
273 /* Drive WLAN_ENA low */
274 DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
275 /*
276 * XENON Flashgun on image processor GPIO (controlled from image
277 * processor firmware), mux in these image processor GPIO lines 0
278 * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
279 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
280 * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
281 */
282 DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
283 DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
284 DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
285 DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
286 DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
287 DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
288 DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
289 /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
290 DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
291 DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
292 /*
293 * Display Interface 1 uses GPIO 65 for RST (reset).
294 * Display Interface 2 uses GPIO 66 for RST (reset).
295 * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
296 */
297 DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
298 DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
299 /*
300 * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
301 * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
302 * reset signals low.
303 */
304 DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
305 DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
306 DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
307 /*
308 * Drive D19-D23 for the ETM PTM trace interface low,
309 * (presumably pins are unconnected therefore grounded here,
310 * the "other alt C1" setting enables these pins)
311 */
312 DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
313 DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
314 DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
315 DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
316 DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
317 /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
318 DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
319 DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
320 /* NFC ENA and RESET to low, pulldown IRQ line */
321 DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
322 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
323 DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
324 /*
325 * SKE keyboard partly on alt A and partly on "Other alt C1"
326 * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
327 * rows of 6 keys, then pull up force sensing interrup and
328 * drive reset and force sensing WU low.
329 */
330 DB8500_MUX_HOG("kp_a_1", "kp"),
331 DB8500_MUX_HOG("kp_oc1_1", "kp"),
332 DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
333 DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
334 DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
335 DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
336 DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
337 DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
338 DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
339 DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
340 DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
341 DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
342 DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
343 /* DiPro Sensor interrupt */
344 DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
345 /* Audio Amplifier HF enable */
346 DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
347 /* GBF interface, pull low to reset state */
348 DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
349 /* MSP : HDTV INTERFACE GPIO line */
350 DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
351 /* Accelerometer interrupt lines */
352 DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
353 DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
354 /* SD card detect GPIO pin */
355 DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
356 /*
357 * Runtime stuff
358 * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
359 * etc.
360 */
361 DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
362 DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
363 DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
364 /*
365 * Make it possible to mux in the SKE keypad and bias the pins
366 * FIXME: what's the point with this on HREFv60? KP/SKE is already
367 * muxed in at another place! Enabling this will bork.
368 */
369 DB8500_MUX("kp_a_2", "kp", "ske"),
370 DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
371 DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
372 DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
373 DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
374 DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
375 DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
376 DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
377 DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
378 DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
379 DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
380 DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
381 DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
382 DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
383 DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
384 DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
385 DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
Linus Walleij1baa5742012-04-19 18:27:38 +0200386};
387
Linus Walleijed781d32012-05-03 00:44:52 +0200388static struct pinctrl_map __initdata u9500_pinmap[] = {
389 /* Mux in UART1 (just RX/TX) and set the pull-ups */
390 DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
391 DB8500_PIN_HOG("GPIO4_AH6", in_pu),
392 DB8500_PIN_HOG("GPIO5_AG6", out_hi),
393 /* WLAN_IRQ line */
394 DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
395 /* HSI */
396 DB8500_MUX_HOG("hsir_a_1", "hsi"),
397 DB8500_MUX_HOG("hsit_a_1", "hsi"),
398 DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
399 DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
400 DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
401 DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
402 DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
403 DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
404 DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
405 DB8500_PIN_HOG("GPIO226_AF8", out_hi), /* ACWAKE0 */
406};
407
408static struct pinctrl_map __initdata u8500_pinmap[] = {
409 DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
410 DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
411};
412
413static struct pinctrl_map __initdata snowball_pinmap[] = {
414 /* Mux in SSP0 connected to AB8500, pull down RXD pin */
415 DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
416 DB8500_PIN_HOG("GPIO145_C13", pd),
417 /* Always drive the MC0 DAT31DIR line high on these boards */
418 DB8500_PIN_HOG("GPIO21_AB3", out_hi),
419 /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
420 DB8500_MUX_HOG("sm_b_1", "sm"),
421 /* Drive RSTn_LAN high */
422 DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
423 /* Accelerometer/Magnetometer */
424 DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
425 DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
426 DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
427 /* WLAN/GBF */
428 DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
429 DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
430 DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
431 DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
Linus Walleij1baa5742012-04-19 18:27:38 +0200432};
433
434/*
435 * passing "pinsfor=" in kernel cmdline allows for custom
436 * configuration of GPIOs on u8500 derived boards.
437 */
438static int __init early_pinsfor(char *p)
439{
440 pinsfor = PINS_FOR_DEFAULT;
441
442 if (strcmp(p, "u9500-21") == 0)
443 pinsfor = PINS_FOR_U9500;
444
445 return 0;
446}
447early_param("pinsfor", early_pinsfor);
448
449int pins_for_u9500(void)
450{
451 if (pinsfor == PINS_FOR_U9500)
452 return 1;
453
454 return 0;
455}
456
Linus Walleijed781d32012-05-03 00:44:52 +0200457static void __init mop500_href_family_pinmaps_init(void)
Rabin Vincentfe052032011-02-11 17:07:21 -0700458{
Linus Walleij1baa5742012-04-19 18:27:38 +0200459 switch (pinsfor) {
460 case PINS_FOR_U9500:
Linus Walleijed781d32012-05-03 00:44:52 +0200461 pinctrl_register_mappings(u9500_pinmap,
462 ARRAY_SIZE(u9500_pinmap));
Linus Walleij1baa5742012-04-19 18:27:38 +0200463 break;
Linus Walleij1baa5742012-04-19 18:27:38 +0200464 case PINS_FOR_DEFAULT:
Linus Walleijed781d32012-05-03 00:44:52 +0200465 pinctrl_register_mappings(u8500_pinmap,
466 ARRAY_SIZE(u8500_pinmap));
Linus Walleij1baa5742012-04-19 18:27:38 +0200467 default:
468 break;
469 }
Lee Jones110c2c22011-08-26 16:54:07 +0100470}
471
Linus Walleijed781d32012-05-03 00:44:52 +0200472void __init mop500_pinmaps_init(void)
Lee Jones110c2c22011-08-26 16:54:07 +0100473{
Linus Walleijed781d32012-05-03 00:44:52 +0200474 pinctrl_register_mappings(mop500_family_pinmap,
475 ARRAY_SIZE(mop500_family_pinmap));
476 pinctrl_register_mappings(mop500_pinmap,
477 ARRAY_SIZE(mop500_pinmap));
478 mop500_href_family_pinmaps_init();
Lee Jones110c2c22011-08-26 16:54:07 +0100479}
480
Linus Walleijed781d32012-05-03 00:44:52 +0200481void __init snowball_pinmaps_init(void)
Lee Jones110c2c22011-08-26 16:54:07 +0100482{
Linus Walleijed781d32012-05-03 00:44:52 +0200483 pinctrl_register_mappings(mop500_family_pinmap,
484 ARRAY_SIZE(mop500_family_pinmap));
485 pinctrl_register_mappings(snowball_pinmap,
486 ARRAY_SIZE(snowball_pinmap));
487 pinctrl_register_mappings(u8500_pinmap,
488 ARRAY_SIZE(u8500_pinmap));
489}
Lee Jones110c2c22011-08-26 16:54:07 +0100490
Linus Walleijed781d32012-05-03 00:44:52 +0200491void __init hrefv60_pinmaps_init(void)
492{
493 pinctrl_register_mappings(mop500_family_pinmap,
494 ARRAY_SIZE(mop500_family_pinmap));
495 pinctrl_register_mappings(hrefv60_pinmap,
496 ARRAY_SIZE(hrefv60_pinmap));
497 mop500_href_family_pinmaps_init();
Rabin Vincentfe052032011-02-11 17:07:21 -0700498}