blob: 7f37484ca362ea27467d330eed9ea787b0beb985 [file] [log] [blame]
Peter Chenc10b4f02013-08-14 12:44:06 +03001/*
2 * otg.c - ChipIdea USB IP core OTG driver
3 *
4 * Copyright (C) 2013 Freescale Semiconductor, Inc.
5 *
6 * Author: Peter Chen
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
14 * This file mainly handles otgsc register, it may include OTG operation
15 * in the future.
16 */
17
18#include <linux/usb/otg.h>
19#include <linux/usb/gadget.h>
20#include <linux/usb/chipidea.h>
21
22#include "ci.h"
23#include "bits.h"
24#include "otg.h"
25
26/**
Peter Chencbec6bd2013-08-14 12:44:10 +030027 * ci_otg_role - pick role based on ID pin state
28 * @ci: the controller
29 */
30enum ci_role ci_otg_role(struct ci_hdrc *ci)
31{
32 u32 sts = hw_read(ci, OP_OTGSC, ~0);
33 enum ci_role role = sts & OTGSC_ID
34 ? CI_ROLE_GADGET
35 : CI_ROLE_HOST;
36
37 return role;
38}
39
Peter Chena107f8c2013-08-14 12:44:11 +030040void ci_handle_vbus_change(struct ci_hdrc *ci)
Peter Chencbec6bd2013-08-14 12:44:10 +030041{
Peter Chena107f8c2013-08-14 12:44:11 +030042 u32 otgsc;
43
44 if (!ci->is_otg)
45 return;
46
47 otgsc = hw_read(ci, OP_OTGSC, ~0);
48
49 if (otgsc & OTGSC_BSV)
50 usb_gadget_vbus_connect(&ci->gadget);
51 else
52 usb_gadget_vbus_disconnect(&ci->gadget);
53}
54
55static void ci_handle_id_switch(struct ci_hdrc *ci)
56{
Peter Chencbec6bd2013-08-14 12:44:10 +030057 enum ci_role role = ci_otg_role(ci);
58
59 if (role != ci->role) {
60 dev_dbg(ci->dev, "switching from %s to %s\n",
61 ci_role(ci)->name, ci->roles[role]->name);
62
63 ci_role_stop(ci);
64 ci_role_start(ci, role);
65 }
Peter Chena107f8c2013-08-14 12:44:11 +030066}
67/**
68 * ci_otg_work - perform otg (vbus/id) event handle
69 * @work: work struct
70 */
71static void ci_otg_work(struct work_struct *work)
72{
73 struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
74
75 if (ci->id_event) {
76 ci->id_event = false;
77 ci_handle_id_switch(ci);
78 } else if (ci->b_sess_valid_event) {
79 ci->b_sess_valid_event = false;
80 ci_handle_vbus_change(ci);
81 } else
82 dev_err(ci->dev, "unexpected event occurs at %s\n", __func__);
Peter Chencbec6bd2013-08-14 12:44:10 +030083
84 enable_irq(ci->irq);
85}
86
Peter Chena107f8c2013-08-14 12:44:11 +030087
Peter Chencbec6bd2013-08-14 12:44:10 +030088/**
89 * ci_hdrc_otg_init - initialize otg struct
Peter Chenc10b4f02013-08-14 12:44:06 +030090 * ci: the controller
91 */
92int ci_hdrc_otg_init(struct ci_hdrc *ci)
93{
Peter Chena107f8c2013-08-14 12:44:11 +030094 INIT_WORK(&ci->work, ci_otg_work);
Peter Chencbec6bd2013-08-14 12:44:10 +030095 ci->wq = create_singlethread_workqueue("ci_otg");
96 if (!ci->wq) {
97 dev_err(ci->dev, "can't create workqueue\n");
98 return -ENODEV;
99 }
Peter Chenc10b4f02013-08-14 12:44:06 +0300100
101 return 0;
102}
Peter Chencbec6bd2013-08-14 12:44:10 +0300103
104/**
105 * ci_hdrc_otg_destroy - destroy otg struct
106 * ci: the controller
107 */
108void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
109{
110 if (ci->wq) {
111 flush_workqueue(ci->wq);
112 destroy_workqueue(ci->wq);
113 }
114 ci_disable_otg_interrupt(ci, OTGSC_INT_EN_BITS);
115 ci_clear_otg_interrupt(ci, OTGSC_INT_STATUS_BITS);
116}