| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 1 | /* | 
|  | 2 | * Generate definitions needed by assembly language modules. | 
|  | 3 | * This code generates raw asm output which is post-processed | 
|  | 4 | * to extract and format the required data. | 
|  | 5 | */ | 
|  | 6 |  | 
|  | 7 | #include <linux/crypto.h> | 
|  | 8 | #include <linux/sched.h> | 
|  | 9 | #include <linux/signal.h> | 
|  | 10 | #include <linux/personality.h> | 
|  | 11 | #include <linux/suspend.h> | 
| Christoph Lameter | 66916cd | 2008-04-29 01:03:54 -0700 | [diff] [blame] | 12 | #include <linux/kbuild.h> | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 13 | #include <asm/ucontext.h> | 
| Hiroshi Shimamoto | 41af86f | 2008-12-17 18:50:32 -0800 | [diff] [blame] | 14 | #include <asm/sigframe.h> | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 15 | #include <asm/pgtable.h> | 
|  | 16 | #include <asm/fixmap.h> | 
|  | 17 | #include <asm/processor.h> | 
|  | 18 | #include <asm/thread_info.h> | 
| Rusty Russell | e5371ac | 2007-10-21 16:41:33 -0700 | [diff] [blame] | 19 | #include <asm/bootparam.h> | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 20 | #include <asm/elf.h> | 
| Magnus Damm | a8af789 | 2009-03-31 15:23:37 -0700 | [diff] [blame] | 21 | #include <asm/suspend.h> | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 22 |  | 
|  | 23 | #include <xen/interface/xen.h> | 
|  | 24 |  | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 25 | #include <linux/lguest.h> | 
|  | 26 | #include "../../../drivers/lguest/lg.h" | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 27 |  | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 28 | /* workaround for a warning with -Wmissing-prototypes */ | 
|  | 29 | void foo(void); | 
|  | 30 |  | 
|  | 31 | void foo(void) | 
|  | 32 | { | 
| H. Peter Anvin | 742fa54 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 33 | OFFSET(IA32_SIGCONTEXT_ax, sigcontext, ax); | 
|  | 34 | OFFSET(IA32_SIGCONTEXT_bx, sigcontext, bx); | 
|  | 35 | OFFSET(IA32_SIGCONTEXT_cx, sigcontext, cx); | 
|  | 36 | OFFSET(IA32_SIGCONTEXT_dx, sigcontext, dx); | 
|  | 37 | OFFSET(IA32_SIGCONTEXT_si, sigcontext, si); | 
|  | 38 | OFFSET(IA32_SIGCONTEXT_di, sigcontext, di); | 
|  | 39 | OFFSET(IA32_SIGCONTEXT_bp, sigcontext, bp); | 
|  | 40 | OFFSET(IA32_SIGCONTEXT_sp, sigcontext, sp); | 
|  | 41 | OFFSET(IA32_SIGCONTEXT_ip, sigcontext, ip); | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 42 | BLANK(); | 
|  | 43 |  | 
|  | 44 | OFFSET(CPUINFO_x86, cpuinfo_x86, x86); | 
|  | 45 | OFFSET(CPUINFO_x86_vendor, cpuinfo_x86, x86_vendor); | 
|  | 46 | OFFSET(CPUINFO_x86_model, cpuinfo_x86, x86_model); | 
|  | 47 | OFFSET(CPUINFO_x86_mask, cpuinfo_x86, x86_mask); | 
|  | 48 | OFFSET(CPUINFO_hard_math, cpuinfo_x86, hard_math); | 
|  | 49 | OFFSET(CPUINFO_cpuid_level, cpuinfo_x86, cpuid_level); | 
|  | 50 | OFFSET(CPUINFO_x86_capability, cpuinfo_x86, x86_capability); | 
|  | 51 | OFFSET(CPUINFO_x86_vendor_id, cpuinfo_x86, x86_vendor_id); | 
|  | 52 | BLANK(); | 
|  | 53 |  | 
|  | 54 | OFFSET(TI_task, thread_info, task); | 
|  | 55 | OFFSET(TI_exec_domain, thread_info, exec_domain); | 
|  | 56 | OFFSET(TI_flags, thread_info, flags); | 
|  | 57 | OFFSET(TI_status, thread_info, status); | 
|  | 58 | OFFSET(TI_preempt_count, thread_info, preempt_count); | 
|  | 59 | OFFSET(TI_addr_limit, thread_info, addr_limit); | 
|  | 60 | OFFSET(TI_restart_block, thread_info, restart_block); | 
|  | 61 | OFFSET(TI_sysenter_return, thread_info, sysenter_return); | 
|  | 62 | OFFSET(TI_cpu, thread_info, cpu); | 
|  | 63 | BLANK(); | 
|  | 64 |  | 
| Glauber de Oliveira Costa | 6b68f01 | 2008-01-30 13:31:12 +0100 | [diff] [blame] | 65 | OFFSET(GDS_size, desc_ptr, size); | 
|  | 66 | OFFSET(GDS_address, desc_ptr, address); | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 67 | BLANK(); | 
|  | 68 |  | 
| H. Peter Anvin | 65ea5b0 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 69 | OFFSET(PT_EBX, pt_regs, bx); | 
|  | 70 | OFFSET(PT_ECX, pt_regs, cx); | 
|  | 71 | OFFSET(PT_EDX, pt_regs, dx); | 
|  | 72 | OFFSET(PT_ESI, pt_regs, si); | 
|  | 73 | OFFSET(PT_EDI, pt_regs, di); | 
|  | 74 | OFFSET(PT_EBP, pt_regs, bp); | 
|  | 75 | OFFSET(PT_EAX, pt_regs, ax); | 
|  | 76 | OFFSET(PT_DS,  pt_regs, ds); | 
|  | 77 | OFFSET(PT_ES,  pt_regs, es); | 
|  | 78 | OFFSET(PT_FS,  pt_regs, fs); | 
| Tejun Heo | ccbeed3 | 2009-02-09 22:17:40 +0900 | [diff] [blame] | 79 | OFFSET(PT_GS,  pt_regs, gs); | 
| H. Peter Anvin | 65ea5b0 | 2008-01-30 13:30:56 +0100 | [diff] [blame] | 80 | OFFSET(PT_ORIG_EAX, pt_regs, orig_ax); | 
|  | 81 | OFFSET(PT_EIP, pt_regs, ip); | 
|  | 82 | OFFSET(PT_CS,  pt_regs, cs); | 
|  | 83 | OFFSET(PT_EFLAGS, pt_regs, flags); | 
|  | 84 | OFFSET(PT_OLDESP, pt_regs, sp); | 
|  | 85 | OFFSET(PT_OLDSS,  pt_regs, ss); | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 86 | BLANK(); | 
|  | 87 |  | 
|  | 88 | OFFSET(EXEC_DOMAIN_handler, exec_domain, handler); | 
| Roland McGrath | 108b545 | 2008-01-30 13:30:41 +0100 | [diff] [blame] | 89 | OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe, uc.uc_mcontext); | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 90 | BLANK(); | 
|  | 91 |  | 
|  | 92 | OFFSET(pbe_address, pbe, address); | 
|  | 93 | OFFSET(pbe_orig_address, pbe, orig_address); | 
|  | 94 | OFFSET(pbe_next, pbe, next); | 
|  | 95 |  | 
| H. Peter Anvin | faca622 | 2008-01-30 13:31:02 +0100 | [diff] [blame] | 96 | /* Offset from the sysenter stack to tss.sp0 */ | 
|  | 97 | DEFINE(TSS_sysenter_sp0, offsetof(struct tss_struct, x86_tss.sp0) - | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 98 | sizeof(struct tss_struct)); | 
|  | 99 |  | 
|  | 100 | DEFINE(PAGE_SIZE_asm, PAGE_SIZE); | 
|  | 101 | DEFINE(PAGE_SHIFT_asm, PAGE_SHIFT); | 
|  | 102 | DEFINE(PTRS_PER_PTE, PTRS_PER_PTE); | 
|  | 103 | DEFINE(PTRS_PER_PMD, PTRS_PER_PMD); | 
|  | 104 | DEFINE(PTRS_PER_PGD, PTRS_PER_PGD); | 
|  | 105 |  | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 106 | OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); | 
|  | 107 |  | 
|  | 108 | #ifdef CONFIG_PARAVIRT | 
|  | 109 | BLANK(); | 
| Jeremy Fitzhardinge | 93b1eab | 2007-10-16 11:51:29 -0700 | [diff] [blame] | 110 | OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled); | 
|  | 111 | OFFSET(PARAVIRT_PATCH_pv_cpu_ops, paravirt_patch_template, pv_cpu_ops); | 
|  | 112 | OFFSET(PARAVIRT_PATCH_pv_irq_ops, paravirt_patch_template, pv_irq_ops); | 
|  | 113 | OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable); | 
|  | 114 | OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable); | 
|  | 115 | OFFSET(PV_CPU_iret, pv_cpu_ops, iret); | 
| Jeremy Fitzhardinge | d75cd22 | 2008-06-25 00:19:26 -0400 | [diff] [blame] | 116 | OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit); | 
| Jeremy Fitzhardinge | 93b1eab | 2007-10-16 11:51:29 -0700 | [diff] [blame] | 117 | OFFSET(PV_CPU_read_cr0, pv_cpu_ops, read_cr0); | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 118 | #endif | 
|  | 119 |  | 
|  | 120 | #ifdef CONFIG_XEN | 
|  | 121 | BLANK(); | 
|  | 122 | OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask); | 
|  | 123 | OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending); | 
|  | 124 | #endif | 
|  | 125 |  | 
| Tony Breeds | db342d2 | 2008-02-19 08:16:03 +0100 | [diff] [blame] | 126 | #if defined(CONFIG_LGUEST) || defined(CONFIG_LGUEST_GUEST) || defined(CONFIG_LGUEST_MODULE) | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 127 | BLANK(); | 
|  | 128 | OFFSET(LGUEST_DATA_irq_enabled, lguest_data, irq_enabled); | 
| Rusty Russell | 47436aa | 2007-10-22 11:03:36 +1000 | [diff] [blame] | 129 | OFFSET(LGUEST_DATA_pgdir, lguest_data, pgdir); | 
| Rusty Russell | f6c540c | 2008-02-04 07:11:10 +1100 | [diff] [blame] | 130 |  | 
| Rusty Russell | f6c540c | 2008-02-04 07:11:10 +1100 | [diff] [blame] | 131 | BLANK(); | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 132 | OFFSET(LGUEST_PAGES_host_gdt_desc, lguest_pages, state.host_gdt_desc); | 
|  | 133 | OFFSET(LGUEST_PAGES_host_idt_desc, lguest_pages, state.host_idt_desc); | 
|  | 134 | OFFSET(LGUEST_PAGES_host_cr3, lguest_pages, state.host_cr3); | 
|  | 135 | OFFSET(LGUEST_PAGES_host_sp, lguest_pages, state.host_sp); | 
|  | 136 | OFFSET(LGUEST_PAGES_guest_gdt_desc, lguest_pages,state.guest_gdt_desc); | 
|  | 137 | OFFSET(LGUEST_PAGES_guest_idt_desc, lguest_pages,state.guest_idt_desc); | 
|  | 138 | OFFSET(LGUEST_PAGES_guest_gdt, lguest_pages, state.guest_gdt); | 
|  | 139 | OFFSET(LGUEST_PAGES_regs_trapnum, lguest_pages, regs.trapnum); | 
|  | 140 | OFFSET(LGUEST_PAGES_regs_errcode, lguest_pages, regs.errcode); | 
|  | 141 | OFFSET(LGUEST_PAGES_regs, lguest_pages, regs); | 
|  | 142 | #endif | 
| Rusty Russell | e5371ac | 2007-10-21 16:41:33 -0700 | [diff] [blame] | 143 |  | 
|  | 144 | BLANK(); | 
|  | 145 | OFFSET(BP_scratch, boot_params, scratch); | 
|  | 146 | OFFSET(BP_loadflags, boot_params, hdr.loadflags); | 
|  | 147 | OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); | 
|  | 148 | OFFSET(BP_version, boot_params, hdr.version); | 
| Thomas Gleixner | 8d0d37c | 2007-10-11 11:12:08 +0200 | [diff] [blame] | 149 | } |