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review.evervolv.com / android_kernel_oneplus_msm8996 / a41b51a1f7c15a1b00f30a3ad2d0373ad51b883d / . / arch / arm / mach-tegra / Kconfig
blob: 6a113a9bb87a73b17368267715aec791127fcd83 [file] [log] [blame]
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]1if ARCH_TEGRA
2
3comment "NVIDIA Tegra options"
4
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]5config ARCH_TEGRA_2x_SOC
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]6 bool "Enable support for Tegra20 family"
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]7 select CPU_V7
8 select ARM_GIC
Erik Gilling3c92db92010-03-15 19:40:06 -0700[diff] [blame]9 select ARCH_REQUIRE_GPIOLIB
Stephen Warrenf1f1ffa2012-02-01 14:04:48 -0700[diff] [blame]10 select PINCTRL
11 select PINCTRL_TEGRA20
Benoit Goby91525d02011-03-09 16:28:55 -0800[diff] [blame]12 select USB_ARCH_HAS_EHCI if USB_SUPPORT
Arnd Bergmann279b6582012-03-02 17:26:00 -0500[diff] [blame]13 select USB_ULPI if USB
Benoit Goby91525d02011-03-09 16:28:55 -0800[diff] [blame]14 select USB_ULPI_VIEWPORT if USB_SUPPORT
Stephen Warrenf35b4312012-02-14 13:39:39 -0700[diff] [blame]15 select ARM_ERRATA_720789
16 select ARM_ERRATA_742230
17 select ARM_ERRATA_751472
18 select ARM_ERRATA_754327
19 select ARM_ERRATA_764369
20 select PL310_ERRATA_727915 if CACHE_L2X0
21 select PL310_ERRATA_769419 if CACHE_L2X0
Arnd Bergmann013df382012-03-02 15:58:28 -0500[diff] [blame]22 select CPU_FREQ_TABLE if CPU_FREQ
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]23 help
24 Support for NVIDIA Tegra AP20 and T20 processors, based on the
25 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
26
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]27config ARCH_TEGRA_3x_SOC
28 bool "Enable support for Tegra30 family"
29 select CPU_V7
30 select ARM_GIC
31 select ARCH_REQUIRE_GPIOLIB
Stephen Warrenf1f1ffa2012-02-01 14:04:48 -0700[diff] [blame]32 select PINCTRL
33 select PINCTRL_TEGRA30
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]34 select USB_ARCH_HAS_EHCI if USB_SUPPORT
Arnd Bergmann279b6582012-03-02 17:26:00 -0500[diff] [blame]35 select USB_ULPI if USB
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]36 select USB_ULPI_VIEWPORT if USB_SUPPORT
37 select USE_OF
Stephen Warrenf35b4312012-02-14 13:39:39 -0700[diff] [blame]38 select ARM_ERRATA_743622
39 select ARM_ERRATA_751472
40 select ARM_ERRATA_754322
41 select ARM_ERRATA_764369
42 select PL310_ERRATA_769419 if CACHE_L2X0
Arnd Bergmann013df382012-03-02 15:58:28 -0500[diff] [blame]43 select CPU_FREQ_TABLE if CPU_FREQ
Peter De Schrijver44107d82011-12-14 17:03:25 +0200[diff] [blame]44 help
45 Support for NVIDIA Tegra T30 processor family, based on the
46 ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]47
Mike Rapoport77ffc142010-09-27 11:26:33 +0200[diff] [blame]48config TEGRA_PCI
49 bool "PCI Express support"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]50 depends on ARCH_TEGRA_2x_SOC
Mike Rapoport77ffc142010-09-27 11:26:33 +0200[diff] [blame]51 select PCI
52
Hiroshi DOYU87d0bab2012-05-07 12:24:48 +0200[diff] [blame]53config TEGRA_AHB
54 bool "Enable AHB driver for NVIDIA Tegra SoCs"
55 default y
56 help
57 Adds AHB configuration functionality for NVIDIA Tegra SoCs,
58 which controls AHB bus master arbitration and some
59 perfomance parameters(priority, prefech size).
60
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]61comment "Tegra board type"
62
63config MACH_HARMONY
64 bool "Harmony board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]65 depends on ARCH_TEGRA_2x_SOC
Uwe Kleine-König885f24e2011-07-26 10:15:59 +0200[diff] [blame]66 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]67 help
68 Support for nVidia Harmony development platform
69
Olof Johanssond9a51fe2011-02-19 17:25:32 -0800[diff] [blame]70config MACH_KAEN
71 bool "Kaen board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]72 depends on ARCH_TEGRA_2x_SOC
Olof Johanssond9a51fe2011-02-19 17:25:32 -0800[diff] [blame]73 select MACH_SEABOARD
Uwe Kleine-König885f24e2011-07-26 10:15:59 +0200[diff] [blame]74 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
Olof Johanssond9a51fe2011-02-19 17:25:32 -0800[diff] [blame]75 help
76 Support for the Kaen version of Seaboard
77
Marc Dietrich65b935a2011-03-07 21:01:31 +0100[diff] [blame]78config MACH_PAZ00
79 bool "Paz00 board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]80 depends on ARCH_TEGRA_2x_SOC
Marc Dietrich65b935a2011-03-07 21:01:31 +0100[diff] [blame]81 help
82 Support for the Toshiba AC100/Dynabook AZ netbook
83
Olof Johanssond9a51fe2011-02-19 17:25:32 -0800[diff] [blame]84config MACH_SEABOARD
85 bool "Seaboard board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]86 depends on ARCH_TEGRA_2x_SOC
Uwe Kleine-König885f24e2011-07-26 10:15:59 +0200[diff] [blame]87 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
Olof Johanssond9a51fe2011-02-19 17:25:32 -0800[diff] [blame]88 help
89 Support for nVidia Seaboard development platform. It will
90 also be included for some of the derivative boards that
91 have large similarities with the seaboard design.
92
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]93config MACH_TEGRA_DT
Peter De Schrijvera2385dc2011-12-14 17:03:18 +0200[diff] [blame]94 bool "Generic Tegra20 board (FDT support)"
Stephen Warren24692c02011-12-19 12:24:04 -0700[diff] [blame]95 depends on ARCH_TEGRA_2x_SOC
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]96 select USE_OF
97 help
Peter De Schrijvera2385dc2011-12-14 17:03:18 +0200[diff] [blame]98 Support for generic NVIDIA Tegra20 boards using Flattened Device Tree
Grant Likely8e267f32011-07-19 17:26:54 -0600[diff] [blame]99
Mike Rapoportcca414b2011-02-07 10:10:53 +0200[diff] [blame]100config MACH_TRIMSLICE
101 bool "TrimSlice board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]102 depends on ARCH_TEGRA_2x_SOC
Mike Rapoportcca414b2011-02-07 10:10:53 +0200[diff] [blame]103 select TEGRA_PCI
104 help
105 Support for CompuLab TrimSlice platform
106
Olof Johanssond9a51fe2011-02-19 17:25:32 -0800[diff] [blame]107config MACH_WARIO
108 bool "Wario board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]109 depends on ARCH_TEGRA_2x_SOC
Olof Johanssond9a51fe2011-02-19 17:25:32 -0800[diff] [blame]110 select MACH_SEABOARD
111 help
112 Support for the Wario version of Seaboard
113
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]114config MACH_VENTANA
115 bool "Ventana board"
Peter De Schrijverb2bbbc42011-12-14 17:03:14 +0200[diff] [blame]116 depends on ARCH_TEGRA_2x_SOC
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300[diff] [blame]117 select MACH_TEGRA_DT
118 help
119 Support for the nVidia Ventana development platform
120
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]121choice
Stephen Warren80881da2012-03-26 12:49:57 -0600[diff] [blame]122 prompt "Default low-level debug console UART"
Erik Gillingc5f80062010-01-21 16:53:02 -0800[diff] [blame]123 default TEGRA_DEBUG_UART_NONE
124
125config TEGRA_DEBUG_UART_NONE
126 bool "None"
127
128config TEGRA_DEBUG_UARTA
129 bool "UART-A"
130
131config TEGRA_DEBUG_UARTB
132 bool "UART-B"
133
134config TEGRA_DEBUG_UARTC
135 bool "UART-C"
136
137config TEGRA_DEBUG_UARTD
138 bool "UART-D"
139
140config TEGRA_DEBUG_UARTE
141 bool "UART-E"
142
143endchoice
144
Stephen Warren80881da2012-03-26 12:49:57 -0600[diff] [blame]145choice
146 prompt "Automatic low-level debug console UART"
147 default TEGRA_DEBUG_UART_AUTO_NONE
148
149config TEGRA_DEBUG_UART_AUTO_NONE
150 bool "None"
151
152config TEGRA_DEBUG_UART_AUTO_ODMDATA
153 bool "Via ODMDATA"
154 help
155 Automatically determines which UART to use for low-level debug based
156 on the ODMDATA value. This value is part of the BCT, and is written
157 to the boot memory device using nvflash, or other flashing tool.
158 When bits 19:18 are 3, then bits 17:15 indicate which UART to use;
159 0/1/2/3/4 are UART A/B/C/D/E.
160
161config TEGRA_DEBUG_UART_AUTO_SCRATCH
162 bool "Via UART scratch register"
163 help
164 Automatically determines which UART to use for low-level debug based
165 on the UART scratch register value. Some bootloaders put ASCII 'D'
166 in this register when they initialize their own console UART output.
167 Using this option allows the kernel to automatically pick the same
168 UART.
169
170endchoice
171
Colin Cross4de3a8f2010-04-05 13:16:42 -0700[diff] [blame]172config TEGRA_SYSTEM_DMA
173 bool "Enable system DMA driver for NVIDIA Tegra SoCs"
174 default y
175 help
176 Adds system DMA functionality for NVIDIA Tegra SoCs, used by
177 several Tegra device drivers
178
Colin Crossefdf72a2011-02-12 18:22:49 -0800[diff] [blame]179config TEGRA_EMC_SCALING_ENABLE
180 bool "Enable scaling the memory frequency"
Mark Brown38376862011-02-22 20:35:24 +0000[diff] [blame]181
182endif