Andreas Westin | 2789c08 | 2012-04-30 10:11:17 +0200 | [diff] [blame] | 1 | /** |
| 2 | * Copyright (C) ST-Ericsson SA 2010 |
| 3 | * Author: Shujuan Chen <shujuan.chen@stericsson.com> for ST-Ericsson. |
| 4 | * Author: Jonas Linde <jonas.linde@stericsson.com> for ST-Ericsson. |
| 5 | * Author: Joakim Bech <joakim.xx.bech@stericsson.com> for ST-Ericsson. |
| 6 | * Author: Berne Hebark <berne.herbark@stericsson.com> for ST-Ericsson. |
| 7 | * Author: Niklas Hernaeus <niklas.hernaeus@stericsson.com> for ST-Ericsson. |
| 8 | * License terms: GNU General Public License (GPL) version 2 |
| 9 | */ |
| 10 | |
| 11 | #ifndef _CRYP_H_ |
| 12 | #define _CRYP_H_ |
| 13 | |
| 14 | #include <linux/completion.h> |
| 15 | #include <linux/dmaengine.h> |
| 16 | #include <linux/klist.h> |
| 17 | #include <linux/mutex.h> |
| 18 | |
| 19 | #define DEV_DBG_NAME "crypX crypX:" |
| 20 | |
| 21 | /* CRYP enable/disable */ |
| 22 | enum cryp_crypen { |
| 23 | CRYP_CRYPEN_DISABLE = 0, |
| 24 | CRYP_CRYPEN_ENABLE = 1 |
| 25 | }; |
| 26 | |
| 27 | /* CRYP Start Computation enable/disable */ |
| 28 | enum cryp_start { |
| 29 | CRYP_START_DISABLE = 0, |
| 30 | CRYP_START_ENABLE = 1 |
| 31 | }; |
| 32 | |
| 33 | /* CRYP Init Signal enable/disable */ |
| 34 | enum cryp_init { |
| 35 | CRYP_INIT_DISABLE = 0, |
| 36 | CRYP_INIT_ENABLE = 1 |
| 37 | }; |
| 38 | |
| 39 | /* Cryp State enable/disable */ |
| 40 | enum cryp_state { |
| 41 | CRYP_STATE_DISABLE = 0, |
| 42 | CRYP_STATE_ENABLE = 1 |
| 43 | }; |
| 44 | |
| 45 | /* Key preparation bit enable */ |
| 46 | enum cryp_key_prep { |
| 47 | KSE_DISABLED = 0, |
| 48 | KSE_ENABLED = 1 |
| 49 | }; |
| 50 | |
| 51 | /* Key size for AES */ |
| 52 | #define CRYP_KEY_SIZE_128 (0) |
| 53 | #define CRYP_KEY_SIZE_192 (1) |
| 54 | #define CRYP_KEY_SIZE_256 (2) |
| 55 | |
| 56 | /* AES modes */ |
| 57 | enum cryp_algo_mode { |
| 58 | CRYP_ALGO_TDES_ECB, |
| 59 | CRYP_ALGO_TDES_CBC, |
| 60 | CRYP_ALGO_DES_ECB, |
| 61 | CRYP_ALGO_DES_CBC, |
| 62 | CRYP_ALGO_AES_ECB, |
| 63 | CRYP_ALGO_AES_CBC, |
| 64 | CRYP_ALGO_AES_CTR, |
| 65 | CRYP_ALGO_AES_XTS |
| 66 | }; |
| 67 | |
| 68 | /* Cryp Encryption or Decryption */ |
| 69 | enum cryp_algorithm_dir { |
| 70 | CRYP_ALGORITHM_ENCRYPT, |
| 71 | CRYP_ALGORITHM_DECRYPT |
| 72 | }; |
| 73 | |
| 74 | /* Hardware access method */ |
| 75 | enum cryp_mode { |
| 76 | CRYP_MODE_POLLING, |
| 77 | CRYP_MODE_INTERRUPT, |
| 78 | CRYP_MODE_DMA |
| 79 | }; |
| 80 | |
| 81 | /** |
| 82 | * struct cryp_config - |
| 83 | * @keysize: Key size for AES |
| 84 | * @algomode: AES modes |
| 85 | * @algodir: Cryp Encryption or Decryption |
| 86 | * |
| 87 | * CRYP configuration structure to be passed to set configuration |
| 88 | */ |
| 89 | struct cryp_config { |
| 90 | int keysize; |
| 91 | enum cryp_algo_mode algomode; |
| 92 | enum cryp_algorithm_dir algodir; |
| 93 | }; |
| 94 | |
| 95 | /** |
| 96 | * struct cryp_protection_config - |
| 97 | * @privilege_access: Privileged cryp state enable/disable |
| 98 | * @secure_access: Secure cryp state enable/disable |
| 99 | * |
| 100 | * Protection configuration structure for setting privilage access |
| 101 | */ |
| 102 | struct cryp_protection_config { |
| 103 | enum cryp_state privilege_access; |
| 104 | enum cryp_state secure_access; |
| 105 | }; |
| 106 | |
| 107 | /* Cryp status */ |
| 108 | enum cryp_status_id { |
| 109 | CRYP_STATUS_BUSY = 0x10, |
| 110 | CRYP_STATUS_OUTPUT_FIFO_FULL = 0x08, |
| 111 | CRYP_STATUS_OUTPUT_FIFO_NOT_EMPTY = 0x04, |
| 112 | CRYP_STATUS_INPUT_FIFO_NOT_FULL = 0x02, |
| 113 | CRYP_STATUS_INPUT_FIFO_EMPTY = 0x01 |
| 114 | }; |
| 115 | |
| 116 | /* Cryp DMA interface */ |
| 117 | enum cryp_dma_req_type { |
| 118 | CRYP_DMA_DISABLE_BOTH, |
| 119 | CRYP_DMA_ENABLE_IN_DATA, |
| 120 | CRYP_DMA_ENABLE_OUT_DATA, |
| 121 | CRYP_DMA_ENABLE_BOTH_DIRECTIONS |
| 122 | }; |
| 123 | |
| 124 | enum cryp_dma_channel { |
| 125 | CRYP_DMA_RX = 0, |
| 126 | CRYP_DMA_TX |
| 127 | }; |
| 128 | |
| 129 | /* Key registers */ |
| 130 | enum cryp_key_reg_index { |
| 131 | CRYP_KEY_REG_1, |
| 132 | CRYP_KEY_REG_2, |
| 133 | CRYP_KEY_REG_3, |
| 134 | CRYP_KEY_REG_4 |
| 135 | }; |
| 136 | |
| 137 | /* Key register left and right */ |
| 138 | struct cryp_key_value { |
| 139 | u32 key_value_left; |
| 140 | u32 key_value_right; |
| 141 | }; |
| 142 | |
| 143 | /* Cryp Initialization structure */ |
| 144 | enum cryp_init_vector_index { |
| 145 | CRYP_INIT_VECTOR_INDEX_0, |
| 146 | CRYP_INIT_VECTOR_INDEX_1 |
| 147 | }; |
| 148 | |
| 149 | /* struct cryp_init_vector_value - |
| 150 | * @init_value_left |
| 151 | * @init_value_right |
| 152 | * */ |
| 153 | struct cryp_init_vector_value { |
| 154 | u32 init_value_left; |
| 155 | u32 init_value_right; |
| 156 | }; |
| 157 | |
| 158 | /** |
| 159 | * struct cryp_device_context - structure for a cryp context. |
| 160 | * @cr: control register |
| 161 | * @dmacr: DMA control register |
| 162 | * @imsc: Interrupt mask set/clear register |
| 163 | * @key_1_l: Key 1l register |
| 164 | * @key_1_r: Key 1r register |
| 165 | * @key_2_l: Key 2l register |
| 166 | * @key_2_r: Key 2r register |
| 167 | * @key_3_l: Key 3l register |
| 168 | * @key_3_r: Key 3r register |
| 169 | * @key_4_l: Key 4l register |
| 170 | * @key_4_r: Key 4r register |
| 171 | * @init_vect_0_l: Initialization vector 0l register |
| 172 | * @init_vect_0_r: Initialization vector 0r register |
| 173 | * @init_vect_1_l: Initialization vector 1l register |
| 174 | * @init_vect_1_r: Initialization vector 0r register |
| 175 | * @din: Data in register |
| 176 | * @dout: Data out register |
| 177 | * |
| 178 | * CRYP power management specifc structure. |
| 179 | */ |
| 180 | struct cryp_device_context { |
| 181 | u32 cr; |
| 182 | u32 dmacr; |
| 183 | u32 imsc; |
| 184 | |
| 185 | u32 key_1_l; |
| 186 | u32 key_1_r; |
| 187 | u32 key_2_l; |
| 188 | u32 key_2_r; |
| 189 | u32 key_3_l; |
| 190 | u32 key_3_r; |
| 191 | u32 key_4_l; |
| 192 | u32 key_4_r; |
| 193 | |
| 194 | u32 init_vect_0_l; |
| 195 | u32 init_vect_0_r; |
| 196 | u32 init_vect_1_l; |
| 197 | u32 init_vect_1_r; |
| 198 | |
| 199 | u32 din; |
| 200 | u32 dout; |
| 201 | }; |
| 202 | |
| 203 | struct cryp_dma { |
| 204 | dma_cap_mask_t mask; |
| 205 | struct completion cryp_dma_complete; |
| 206 | struct dma_chan *chan_cryp2mem; |
| 207 | struct dma_chan *chan_mem2cryp; |
| 208 | struct stedma40_chan_cfg *cfg_cryp2mem; |
| 209 | struct stedma40_chan_cfg *cfg_mem2cryp; |
| 210 | int sg_src_len; |
| 211 | int sg_dst_len; |
| 212 | struct scatterlist *sg_src; |
| 213 | struct scatterlist *sg_dst; |
| 214 | int nents_src; |
| 215 | int nents_dst; |
| 216 | }; |
| 217 | |
| 218 | /** |
| 219 | * struct cryp_device_data - structure for a cryp device. |
| 220 | * @base: Pointer to the hardware base address. |
| 221 | * @dev: Pointer to the devices dev structure. |
| 222 | * @clk: Pointer to the device's clock control. |
| 223 | * @pwr_regulator: Pointer to the device's power control. |
| 224 | * @power_status: Current status of the power. |
| 225 | * @ctx_lock: Lock for current_ctx. |
| 226 | * @current_ctx: Pointer to the currently allocated context. |
| 227 | * @list_node: For inclusion into a klist. |
| 228 | * @dma: The dma structure holding channel configuration. |
| 229 | * @power_state: TRUE = power state on, FALSE = power state off. |
| 230 | * @power_state_spinlock: Spinlock for power_state. |
| 231 | * @restore_dev_ctx: TRUE = saved ctx, FALSE = no saved ctx. |
| 232 | */ |
| 233 | struct cryp_device_data { |
| 234 | struct cryp_register __iomem *base; |
| 235 | struct device *dev; |
| 236 | struct clk *clk; |
| 237 | struct regulator *pwr_regulator; |
| 238 | int power_status; |
| 239 | struct spinlock ctx_lock; |
| 240 | struct cryp_ctx *current_ctx; |
| 241 | struct klist_node list_node; |
| 242 | struct cryp_dma dma; |
| 243 | bool power_state; |
| 244 | struct spinlock power_state_spinlock; |
| 245 | bool restore_dev_ctx; |
| 246 | }; |
| 247 | |
| 248 | void cryp_wait_until_done(struct cryp_device_data *device_data); |
| 249 | |
| 250 | /* Initialization functions */ |
| 251 | |
| 252 | int cryp_check(struct cryp_device_data *device_data); |
| 253 | |
| 254 | void cryp_activity(struct cryp_device_data *device_data, |
| 255 | enum cryp_crypen cryp_crypen); |
| 256 | |
| 257 | void cryp_flush_inoutfifo(struct cryp_device_data *device_data); |
| 258 | |
| 259 | int cryp_set_configuration(struct cryp_device_data *device_data, |
| 260 | struct cryp_config *cryp_config, |
| 261 | u32 *control_register); |
| 262 | |
| 263 | void cryp_configure_for_dma(struct cryp_device_data *device_data, |
| 264 | enum cryp_dma_req_type dma_req); |
| 265 | |
| 266 | int cryp_configure_key_values(struct cryp_device_data *device_data, |
| 267 | enum cryp_key_reg_index key_reg_index, |
| 268 | struct cryp_key_value key_value); |
| 269 | |
| 270 | int cryp_configure_init_vector(struct cryp_device_data *device_data, |
| 271 | enum cryp_init_vector_index |
| 272 | init_vector_index, |
| 273 | struct cryp_init_vector_value |
| 274 | init_vector_value); |
| 275 | |
| 276 | int cryp_configure_protection(struct cryp_device_data *device_data, |
| 277 | struct cryp_protection_config *p_protect_config); |
| 278 | |
| 279 | /* Power management funtions */ |
| 280 | void cryp_save_device_context(struct cryp_device_data *device_data, |
| 281 | struct cryp_device_context *ctx, |
| 282 | int cryp_mode); |
| 283 | |
| 284 | void cryp_restore_device_context(struct cryp_device_data *device_data, |
| 285 | struct cryp_device_context *ctx); |
| 286 | |
| 287 | /* Data transfer and status bits. */ |
| 288 | int cryp_is_logic_busy(struct cryp_device_data *device_data); |
| 289 | |
| 290 | int cryp_get_status(struct cryp_device_data *device_data); |
| 291 | |
| 292 | /** |
| 293 | * cryp_write_indata - This routine writes 32 bit data into the data input |
| 294 | * register of the cryptography IP. |
| 295 | * @device_data: Pointer to the device data struct for base address. |
| 296 | * @write_data: Data to write. |
| 297 | */ |
| 298 | int cryp_write_indata(struct cryp_device_data *device_data, u32 write_data); |
| 299 | |
| 300 | /** |
| 301 | * cryp_read_outdata - This routine reads the data from the data output |
| 302 | * register of the CRYP logic |
| 303 | * @device_data: Pointer to the device data struct for base address. |
| 304 | * @read_data: Read the data from the output FIFO. |
| 305 | */ |
| 306 | int cryp_read_outdata(struct cryp_device_data *device_data, u32 *read_data); |
| 307 | |
| 308 | #endif /* _CRYP_H_ */ |