| Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 1 | Atmel NAND flash |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible : "atmel,at91rm9200-nand". |
| 5 | - reg : should specify localbus address and size used for the chip, |
| 6 | and if availlable the ECC. |
| 7 | - atmel,nand-addr-offset : offset for the address latch. |
| 8 | - atmel,nand-cmd-offset : offset for the command latch. |
| 9 | - #address-cells, #size-cells : Must be present if the device has sub-nodes |
| 10 | representing partitions. |
| 11 | |
| 12 | - gpios : specifies the gpio pins to control the NAND device. detect is an |
| 13 | optional gpio and may be set to 0 if not present. |
| 14 | |
| 15 | Optional properties: |
| 16 | - nand-ecc-mode : String, operation mode of the NAND ecc mode, soft by default. |
| 17 | Supported values are: "none", "soft", "hw", "hw_syndrome", "hw_oob_first", |
| 18 | "soft_bch". |
| 19 | - nand-bus-width : 8 or 16 bus width if not present 8 |
| 20 | - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false |
| 21 | |
| 22 | Examples: |
| 23 | nand0: nand@40000000,0 { |
| 24 | compatible = "atmel,at91rm9200-nand"; |
| 25 | #address-cells = <1>; |
| 26 | #size-cells = <1>; |
| 27 | reg = <0x40000000 0x10000000 |
| 28 | 0xffffe800 0x200 |
| 29 | >; |
| Nicolas Ferre | c16524e | 2012-03-22 14:48:47 +0100 | [diff] [blame] | 30 | atmel,nand-addr-offset = <21>; /* ale */ |
| 31 | atmel,nand-cmd-offset = <22>; /* cle */ |
| Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 32 | nand-on-flash-bbt; |
| 33 | nand-ecc-mode = "soft"; |
| Nicolas Ferre | c16524e | 2012-03-22 14:48:47 +0100 | [diff] [blame] | 34 | gpios = <&pioC 13 0 /* rdy */ |
| 35 | &pioC 14 0 /* nce */ |
| 36 | 0 /* cd */ |
| Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 37 | >; |
| 38 | partition@0 { |
| 39 | ... |
| 40 | }; |
| 41 | }; |